/art/compiler/utils/mips64/ |
H A D | managed_register_mips64.h | 101 explicit Mips64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 103 static Mips64ManagedRegister FromRegId(int reg_id) { argument 104 Mips64ManagedRegister reg(reg_id);
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/art/compiler/utils/arm64/ |
H A D | managed_register_arm64.h | 205 explicit Arm64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 207 static Arm64ManagedRegister FromRegId(int reg_id) { argument 208 Arm64ManagedRegister reg(reg_id);
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/art/compiler/utils/mips/ |
H A D | managed_register_mips.h | 208 explicit MipsManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 210 static MipsManagedRegister FromRegId(int reg_id) { argument 211 MipsManagedRegister reg(reg_id);
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/art/compiler/utils/x86/ |
H A D | managed_register_x86.h | 205 explicit X86ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 207 static X86ManagedRegister FromRegId(int reg_id) { argument 208 X86ManagedRegister reg(reg_id);
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/art/compiler/utils/x86_64/ |
H A D | managed_register_x86_64.h | 191 explicit X86_64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 193 static X86_64ManagedRegister FromRegId(int reg_id) { argument 194 X86_64ManagedRegister reg(reg_id);
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/art/compiler/dex/quick/ |
H A D | local_optimizations.cc | 93 inline void Mir2Lir::EliminateLoad(LIR* lir, int reg_id) { argument 94 DCHECK(RegStorage::SameRegType(lir->operands[0], reg_id)); 98 if (lir->operands[0] == reg_id) { 104 switch (reg_id & RegStorage::kShapeTypeMask) { 107 src_reg = RegStorage::Solo32(reg_id); 111 src_reg = RegStorage::Solo64(reg_id); 115 src_reg = RegStorage::FloatSolo32(reg_id); 119 src_reg = RegStorage::FloatSolo64(reg_id);
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H A D | codegen_util.cc | 181 void Mir2Lir::AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, argument 190 lir->flags.alias_info = ENCODE_ALIAS_INFO(reg_id, is64bit);
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H A D | mir_to_lir.h | 645 void AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, bool is64bit); 649 void EliminateLoad(LIR* lir, int reg_id);
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/art/compiler/utils/ |
H A D | managed_register.h | 78 explicit ManagedRegister(int reg_id) : id_(reg_id) { } argument
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/art/compiler/utils/arm/ |
H A D | managed_register_arm.h | 254 explicit ArmManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument 256 static ArmManagedRegister FromRegId(int reg_id) { argument 257 ArmManagedRegister reg(reg_id);
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/art/compiler/optimizing/ |
H A D | code_generator_arm.h | 213 size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 214 size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 215 size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 216 size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE;
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H A D | code_generator_mips64.h | 242 size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id); 243 size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id); 244 size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id); 245 size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id);
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H A D | code_generator_x86.h | 206 size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 207 size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 208 size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 209 size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE;
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H A D | code_generator_x86_64.h | 207 size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 208 size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 209 size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE; 210 size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) OVERRIDE;
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H A D | code_generator.h | 200 virtual size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 202 virtual size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 204 virtual size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) = 0; 205 virtual size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) = 0;
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H A D | code_generator_arm64.h | 282 size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id); 283 size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id); 284 size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id); 285 size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id);
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H A D | locations.h | 543 void SetRegisterBit(uint32_t reg_id) { 544 register_mask_ |= (1 << reg_id); 551 bool RegisterContainsObject(uint32_t reg_id) { 552 return RegisterSet::Contains(register_mask_, reg_id);
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H A D | code_generator_arm64.cc | 668 size_t CodeGeneratorARM64::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { argument 669 Register reg = Register(VIXLRegCodeFromART(reg_id), kXRegSize); 674 size_t CodeGeneratorARM64::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { argument 675 Register reg = Register(VIXLRegCodeFromART(reg_id), kXRegSize); 680 size_t CodeGeneratorARM64::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 681 FPRegister reg = FPRegister(reg_id, kDRegSize); 686 size_t CodeGeneratorARM64::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 687 FPRegister reg = FPRegister(reg_id, kDRegSize);
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H A D | code_generator_mips64.cc | 922 size_t CodeGeneratorMIPS64::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { argument 923 __ StoreToOffset(kStoreDoubleword, GpuRegister(reg_id), SP, stack_index); 927 size_t CodeGeneratorMIPS64::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { argument 928 __ LoadFromOffset(kLoadDoubleword, GpuRegister(reg_id), SP, stack_index); 932 size_t CodeGeneratorMIPS64::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 933 __ StoreFpuToOffset(kStoreDoubleword, FpuRegister(reg_id), SP, stack_index); 937 size_t CodeGeneratorMIPS64::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 938 __ LoadFpuFromOffset(kLoadDoubleword, FpuRegister(reg_id), SP, stack_index);
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H A D | code_generator_arm.cc | 357 size_t CodeGeneratorARM::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { argument 358 __ StoreToOffset(kStoreWord, static_cast<Register>(reg_id), SP, stack_index); 362 size_t CodeGeneratorARM::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { argument 363 __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index); 367 size_t CodeGeneratorARM::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 368 __ StoreSToOffset(static_cast<SRegister>(reg_id), SP, stack_index); 372 size_t CodeGeneratorARM::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 373 __ LoadSFromOffset(static_cast<SRegister>(reg_id), SP, stack_index);
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H A D | code_generator_x86.cc | 350 size_t CodeGeneratorX86::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { argument 351 __ movl(Address(ESP, stack_index), static_cast<Register>(reg_id)); 355 size_t CodeGeneratorX86::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { argument 356 __ movl(static_cast<Register>(reg_id), Address(ESP, stack_index)); 360 size_t CodeGeneratorX86::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 361 __ movsd(Address(ESP, stack_index), XmmRegister(reg_id)); 365 size_t CodeGeneratorX86::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 366 __ movsd(XmmRegister(reg_id), Address(ESP, stack_index));
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H A D | code_generator_x86_64.cc | 407 size_t CodeGeneratorX86_64::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { argument 408 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); 412 size_t CodeGeneratorX86_64::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { argument 413 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); 417 size_t CodeGeneratorX86_64::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 418 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); 422 size_t CodeGeneratorX86_64::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { argument 423 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index));
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/art/compiler/dex/quick/arm/ |
H A D | target_arm.cc | 304 int reg_id = i; local 306 reg_id = rs_rARM_LR.GetRegNum(); 308 reg_id = rs_rARM_PC.GetRegNum(); 311 snprintf(buf + strlen(buf), buf_size - strlen(buf), ", r%d", reg_id); 314 snprintf(buf, buf_size, "r%d", reg_id);
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/art/compiler/dex/quick/x86/ |
H A D | int_x86.cc | 1188 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; local 1189 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); 1195 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; local 1196 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false);
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H A D | target_x86.cc | 1365 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; local 1366 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false);
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