| /art/compiler/utils/arm/ |
| H A D | assembler_thumb2.h | 244 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
246 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
248 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
250 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
252 void Rrx(Register rd, Register rm, bool setcc = false,
255 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
257 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
259 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
261 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
436 void EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc
[all...] |
| H A D | assembler_arm32.h | 205 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
207 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
209 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
211 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
213 void Rrx(Register rd, Register rm, bool setcc = false,
216 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
218 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
220 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
222 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| H A D | assembler_arm32.cc | 1154 bool setcc, Condition cond) {
1156 if (setcc) {
1165 bool setcc, Condition cond) {
1168 if (setcc) {
1177 bool setcc, Condition cond) {
1180 if (setcc) {
1189 bool setcc, Condition cond) {
1191 if (setcc) {
1198 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { argument
1199 if (setcc) {
1153 Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
1164 Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
1176 Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
1188 Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
1207 Lsl(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
1217 Lsr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
1227 Asr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
1237 Ror(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
[all...] |
| H A D | assembler_arm.h | 622 virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
624 virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
626 virtual void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
628 virtual void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
630 virtual void Rrx(Register rd, Register rm, bool setcc = false,
633 virtual void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
635 virtual void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
637 virtual void Asr(Register rd, Register rm, Register rn, bool setcc = false,
639 virtual void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| H A D | assembler_thumb2.cc | 1202 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) { argument
1218 0xf << 16 | (setcc ? B20 : 0);
1241 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) { argument
1261 0xf << 12 | (setcc ? B20 : 0);
2321 bool setcc, Condition cond) {
2324 EmitShift(rd, rm, LSL, shift_imm, setcc);
2329 bool setcc, Condition cond) {
2333 EmitShift(rd, rm, LSR, shift_imm, setcc);
2338 bool setcc, Condition cond) {
2342 EmitShift(rd, rm, ASR, shift_imm, setcc);
2320 Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
2328 Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
2337 Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
2346 Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument
2354 Rrx(Register rd, Register rm, bool setcc, Condition cond) argument
2360 Lsl(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
2367 Lsr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
2374 Asr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
2381 Ror(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument
[all...] |
| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64.h | 600 void setcc(Condition condition, CpuRegister dst);
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| H A D | assembler_x86_64_test.cc | 1078 assembler->setcc(static_cast<x86_64::Condition>(i), *reg);
1087 DriverFn(&setcc_test_fn, "setcc");
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| H A D | assembler_x86_64.cc | 2042 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { function in class:art::x86_64::X86_64Assembler
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| /art/compiler/optimizing/ |
| H A D | intrinsics_x86_64.cc | 1481 __ setcc(kZero, out);
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| H A D | code_generator_x86_64.cc | 962 // Clear register: setcc only sets the low byte.
978 __ setcc(X86_64Condition(comp->GetCondition()), reg);
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