Searched refs:_mm_add_epi32 (Results 1 - 25 of 51) sorted by relevance

123

/external/libhevc/common/x86/
H A Dihevc_32x32_itrans_recon_sse42_intr.c362 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_40, m_temp_reg_30);
376 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_44, m_temp_reg_30);
389 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_41, m_temp_reg_30);
403 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_45, m_temp_reg_30);
417 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_42, m_temp_reg_30);
431 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_46, m_temp_reg_30);
448 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_43, m_temp_reg_30);
462 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_47, m_temp_reg_30);
477 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_43, m_temp_reg_30);
490 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_4
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H A Dihevc_itrans_recon_32x32_ssse3_intr.c373 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_40, m_temp_reg_30);
387 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_44, m_temp_reg_30);
400 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_41, m_temp_reg_30);
414 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_45, m_temp_reg_30);
428 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_42, m_temp_reg_30);
442 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_46, m_temp_reg_30);
459 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_43, m_temp_reg_30);
473 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_47, m_temp_reg_30);
488 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_43, m_temp_reg_30);
501 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_4
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H A Dihevc_itrans_recon_ssse3_intr.c194 m_temp_reg_23 = _mm_add_epi32(m_temp_reg_20, m_temp_reg_21);
195 m_temp_reg_13 = _mm_add_epi32(m_temp_reg_22, m_temp_reg_23);
201 m_temp_reg_10 = _mm_add_epi32(m_temp_reg_0, m_temp_reg_2);
206 m_temp_reg_11 = _mm_add_epi32(m_temp_reg_2, m_temp_reg_3);
217 m_temp_reg_14 = _mm_add_epi32(m_temp_reg_14, m_temp_reg_3);
265 m_temp_reg_23 = _mm_add_epi32(m_temp_reg_20, m_temp_reg_21);
266 m_temp_reg_36 = _mm_add_epi32(m_temp_reg_22, m_temp_reg_23);
272 m_temp_reg_20 = _mm_add_epi32(m_temp_reg_30, m_temp_reg_31);
273 m_temp_reg_4 = _mm_add_epi32(m_rdng_factor, m_temp_reg_13);
274 m_temp_reg_20 = _mm_add_epi32(m_temp_reg_2
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H A Dihevc_weighted_pred_sse42_intr.c176 src_temp0_4x32b = _mm_add_epi32(src_temp0_4x32b, lvl_shift_4x32b);
177 src_temp1_4x32b = _mm_add_epi32(src_temp1_4x32b, lvl_shift_4x32b);
178 src_temp2_4x32b = _mm_add_epi32(src_temp2_4x32b, lvl_shift_4x32b);
179 src_temp3_4x32b = _mm_add_epi32(src_temp3_4x32b, lvl_shift_4x32b);
194 src_temp4_4x32b = _mm_add_epi32(src_temp4_4x32b, lvl_shift_4x32b);
195 src_temp5_4x32b = _mm_add_epi32(src_temp5_4x32b, lvl_shift_4x32b);
196 src_temp6_4x32b = _mm_add_epi32(src_temp6_4x32b, lvl_shift_4x32b);
197 src_temp7_4x32b = _mm_add_epi32(src_temp7_4x32b, lvl_shift_4x32b);
206 src_temp0_4x32b = _mm_add_epi32(src_temp0_4x32b, const_temp_4x32b);
207 src_temp1_4x32b = _mm_add_epi32(src_temp1_4x32
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H A Dihevc_itrans_recon_sse42_intr.c182 m_temp_reg_10 = _mm_add_epi32(m_temp_reg_0, m_temp_reg_2);
187 m_temp_reg_11 = _mm_add_epi32(m_temp_reg_2, m_temp_reg_3);
198 m_temp_reg_14 = _mm_add_epi32(m_temp_reg_14, m_temp_reg_3);
223 m_temp_reg_20 = _mm_add_epi32(m_temp_reg_30, m_temp_reg_31);
224 m_temp_reg_4 = _mm_add_epi32(m_rdng_factor, m_temp_reg_13);
225 m_temp_reg_20 = _mm_add_epi32(m_temp_reg_20, m_temp_reg_4);
228 m_temp_reg_21 = _mm_add_epi32(m_temp_reg_21, m_temp_reg_4);
230 m_temp_reg_23 = _mm_add_epi32(m_temp_reg_34, m_temp_reg_35);
232 m_temp_reg_23 = _mm_add_epi32(m_temp_reg_23, m_temp_reg_4);
234 m_temp_reg_22 = _mm_add_epi32(m_temp_reg_3
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H A Dihevc_16x16_itrans_recon_sse42_intr.c262 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_30);
281 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_25, m_temp_reg_31);
300 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_26, m_temp_reg_30);
317 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_27, m_temp_reg_31);
335 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_26, m_temp_reg_30);
351 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_27, m_temp_reg_31);
369 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_30);
384 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_25, m_temp_reg_31);
445 m_temp_reg_40 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_20);
450 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_4
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H A Dihevc_itrans_recon_16x16_ssse3_intr.c268 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_30);
287 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_25, m_temp_reg_31);
306 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_26, m_temp_reg_30);
323 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_27, m_temp_reg_31);
341 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_26, m_temp_reg_30);
357 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_27, m_temp_reg_31);
375 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_30);
390 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_25, m_temp_reg_31);
449 m_temp_reg_40 = _mm_add_epi32(m_temp_reg_24, m_temp_reg_20);
454 m_temp_reg_34 = _mm_add_epi32(m_temp_reg_4
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H A Dihevc_weighted_pred_ssse3_intr.c152 lvl_shift_4x32b = _mm_add_epi32(lvl_shift_4x32b, const_temp_4x32b);
197 res_temp4_4x32b = _mm_add_epi32(res_temp4_4x32b, lvl_shift_4x32b);
198 res_temp5_4x32b = _mm_add_epi32(res_temp5_4x32b, lvl_shift_4x32b);
199 res_temp6_4x32b = _mm_add_epi32(res_temp6_4x32b, lvl_shift_4x32b);
200 res_temp7_4x32b = _mm_add_epi32(res_temp7_4x32b, lvl_shift_4x32b);
201 res_temp0_4x32b = _mm_add_epi32(res_temp0_4x32b, lvl_shift_4x32b);
202 res_temp1_4x32b = _mm_add_epi32(res_temp1_4x32b, lvl_shift_4x32b);
203 res_temp2_4x32b = _mm_add_epi32(res_temp2_4x32b, lvl_shift_4x32b);
204 res_temp3_4x32b = _mm_add_epi32(res_temp3_4x32b, lvl_shift_4x32b);
219 res_temp0_4x32b = _mm_add_epi32(res_temp0_4x32
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/external/libmpeg2/common/x86/
H A Dimpeg2_idct_recon_sse42_intr.c263 m_temp_reg_42 = _mm_add_epi32(m_temp_reg_12, m_temp_reg_16);
266 m_temp_reg_40 = _mm_add_epi32(m_temp_reg_10, m_temp_reg_14);
294 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_40, m_temp_reg_30);
297 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_62, m_rdng_factor);
298 m_temp_reg_66 = _mm_add_epi32(m_temp_reg_66, m_rdng_factor);
324 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_42, m_temp_reg_32);
327 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_62, m_rdng_factor);
328 m_temp_reg_66 = _mm_add_epi32(m_temp_reg_66, m_rdng_factor);
354 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_44, m_temp_reg_34);
357 m_temp_reg_62 = _mm_add_epi32(m_temp_reg_6
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/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_rast_tri.c160 __m128i cstep1 = _mm_add_epi32(cstep0, xdcdy);
161 __m128i cstep2 = _mm_add_epi32(cstep1, xdcdy);
162 __m128i cstep3 = _mm_add_epi32(cstep2, xdcdy);
179 cstep0 = _mm_add_epi32(cstep0, cio4);
180 cstep1 = _mm_add_epi32(cstep1, cio4);
181 cstep2 = _mm_add_epi32(cstep2, cio4);
182 cstep3 = _mm_add_epi32(cstep3, cio4);
201 __m128i cstep1 = _mm_add_epi32(cstep0, xdcdy);
202 __m128i cstep2 = _mm_add_epi32(cstep1, xdcdy);
203 __m128i cstep3 = _mm_add_epi32(cstep
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/external/libvpx/libvpx/vp9/encoder/x86/
H A Dvp9_dct32x32_sse2.c349 const __m128i s2_20_4 = _mm_add_epi32(s2_20_2, k__DCT_CONST_ROUNDING);
350 const __m128i s2_20_5 = _mm_add_epi32(s2_20_3, k__DCT_CONST_ROUNDING);
351 const __m128i s2_21_4 = _mm_add_epi32(s2_21_2, k__DCT_CONST_ROUNDING);
352 const __m128i s2_21_5 = _mm_add_epi32(s2_21_3, k__DCT_CONST_ROUNDING);
353 const __m128i s2_22_4 = _mm_add_epi32(s2_22_2, k__DCT_CONST_ROUNDING);
354 const __m128i s2_22_5 = _mm_add_epi32(s2_22_3, k__DCT_CONST_ROUNDING);
355 const __m128i s2_23_4 = _mm_add_epi32(s2_23_2, k__DCT_CONST_ROUNDING);
356 const __m128i s2_23_5 = _mm_add_epi32(s2_23_3, k__DCT_CONST_ROUNDING);
357 const __m128i s2_24_4 = _mm_add_epi32(s2_24_2, k__DCT_CONST_ROUNDING);
358 const __m128i s2_24_5 = _mm_add_epi32(s2_24_
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H A Dvp9_dct_sse2.c32 tmp = _mm_add_epi32(in0, in1);
36 tmp = _mm_add_epi32(in0, in1);
39 in1 = _mm_add_epi32(tmp, in0);
163 const __m128i v0 = _mm_add_epi32(u0, k__DCT_CONST_ROUNDING);
164 const __m128i v1 = _mm_add_epi32(u1, k__DCT_CONST_ROUNDING);
165 const __m128i v2 = _mm_add_epi32(u2, k__DCT_CONST_ROUNDING);
166 const __m128i v3 = _mm_add_epi32(u3, k__DCT_CONST_ROUNDING);
208 const __m128i v0 = _mm_add_epi32(u0, k__DCT_CONST_ROUNDING2);
209 const __m128i v1 = _mm_add_epi32(u1, k__DCT_CONST_ROUNDING2);
210 const __m128i v2 = _mm_add_epi32(u
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/external/libavc/common/x86/
H A Dih264_ihadamard_scaling_ssse3.c136 temp0 = _mm_add_epi32(src_r0, src_r3);
137 temp1 = _mm_add_epi32(src_r1, src_r2);
141 src_r0 = _mm_add_epi32(temp0, temp1);
142 src_r1 = _mm_add_epi32(temp2, temp3);
165 temp0 = _mm_add_epi32(src_r0, src_r3);
166 temp1 = _mm_add_epi32(src_r1, src_r2);
170 src_r0 = _mm_add_epi32(temp0, temp1);
171 src_r1 = _mm_add_epi32(temp2, temp3);
195 temp0 = _mm_add_epi32(src_r0, add_rshift);
196 temp1 = _mm_add_epi32(src_r
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H A Dih264_iquant_itrans_recon_sse42.c160 temp4 = _mm_add_epi32(temp4, add_rshift);
161 temp5 = _mm_add_epi32(temp5, add_rshift);
162 temp6 = _mm_add_epi32(temp6, add_rshift);
163 temp7 = _mm_add_epi32(temp7, add_rshift);
194 temp0 = _mm_add_epi32(resq_r0, resq_r2);
202 temp3 = _mm_add_epi32(temp3, resq_r1);
205 resq_r0 = _mm_add_epi32(temp0, temp3);
207 resq_r1 = _mm_add_epi32(temp1, temp2);
246 temp0 = _mm_add_epi32(resq_r0, resq_r2);
254 temp3 = _mm_add_epi32(temp
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H A Dih264_iquant_itrans_recon_ssse3.c161 temp4 = _mm_add_epi32(temp4, add_rshift);
162 temp5 = _mm_add_epi32(temp5, add_rshift);
163 temp6 = _mm_add_epi32(temp6, add_rshift);
164 temp7 = _mm_add_epi32(temp7, add_rshift);
201 temp0 = _mm_add_epi32(resq_r0, resq_r2);
209 temp3 = _mm_add_epi32(temp3, resq_r1);
212 resq_r0 = _mm_add_epi32(temp0, temp3);
214 resq_r1 = _mm_add_epi32(temp1, temp2);
260 temp0 = _mm_add_epi32(resq_r0, resq_r2);
268 temp3 = _mm_add_epi32(temp
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H A Dih264_ihadamard_scaling_sse42.c134 temp0 = _mm_add_epi32(src_r0, src_r3);
135 temp1 = _mm_add_epi32(src_r1, src_r2);
139 src_r0 = _mm_add_epi32(temp0, temp1);
140 src_r1 = _mm_add_epi32(temp2, temp3);
163 temp0 = _mm_add_epi32(src_r0, src_r3);
164 temp1 = _mm_add_epi32(src_r1, src_r2);
168 src_r0 = _mm_add_epi32(temp0, temp1);
169 src_r1 = _mm_add_epi32(temp2, temp3);
188 temp0 = _mm_add_epi32(src_r0, add_rshift);
189 temp1 = _mm_add_epi32(src_r
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/external/libvpx/libvpx/vp9/common/x86/
H A Dvp9_idct_intrin_ssse3.c89 u[0] = _mm_add_epi32(v[0], k__DCT_CONST_ROUNDING);
90 u[1] = _mm_add_epi32(v[1], k__DCT_CONST_ROUNDING);
91 u[2] = _mm_add_epi32(v[2], k__DCT_CONST_ROUNDING);
92 u[3] = _mm_add_epi32(v[3], k__DCT_CONST_ROUNDING);
93 u[4] = _mm_add_epi32(v[4], k__DCT_CONST_ROUNDING);
94 u[5] = _mm_add_epi32(v[5], k__DCT_CONST_ROUNDING);
95 u[6] = _mm_add_epi32(v[6], k__DCT_CONST_ROUNDING);
96 u[7] = _mm_add_epi32(v[7], k__DCT_CONST_ROUNDING);
97 u[8] = _mm_add_epi32(v[8], k__DCT_CONST_ROUNDING);
98 u[9] = _mm_add_epi32(
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H A Dvp9_idct_intrin_sse2.c54 input0 = _mm_add_epi32(input0, rounding);
55 input1 = _mm_add_epi32(input1, rounding);
56 input2 = _mm_add_epi32(input2, rounding);
57 input3 = _mm_add_epi32(input3, rounding);
93 input0 = _mm_add_epi32(input0, rounding);
94 input1 = _mm_add_epi32(input1, rounding);
95 input2 = _mm_add_epi32(input2, rounding);
96 input3 = _mm_add_epi32(input3, rounding);
195 u[0] = _mm_add_epi32(v[0], k__DCT_CONST_ROUNDING);
196 u[1] = _mm_add_epi32(
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/external/neven/Embedded/common/src/b_BasicEm/
H A DMathSSE2.c56 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM4 );
59 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM6 );
72 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM0 );
81 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM2 );
89 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM4 );
91 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM6 );
97 m_XMM7 = _mm_add_epi32( m_XMM7, m_XMM0 );
166 m_XMM5 = _mm_add_epi32( m_XMM5, m_XMM6 );
174 m_XMM5 = _mm_add_epi32( m_XMM5, m_XMM0 );
186 m_XMM5 = _mm_add_epi32( m_XMM
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/external/scrypt/lib/crypto/
H A Dcrypto_scrypt-sse.c98 T = _mm_add_epi32(X0, X3);
101 T = _mm_add_epi32(X1, X0);
104 T = _mm_add_epi32(X2, X1);
107 T = _mm_add_epi32(X3, X2);
117 T = _mm_add_epi32(X0, X1);
120 T = _mm_add_epi32(X3, X0);
123 T = _mm_add_epi32(X2, X3);
126 T = _mm_add_epi32(X1, X2);
136 B[0] = _mm_add_epi32(B[0], X0);
137 B[1] = _mm_add_epi32(
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/external/skia/src/opts/
H A DSkMath_opts_SSE2.h36 testDiv = _mm_add_epi32(testDiv, _mm_set1_epi32(1));
42 __m128i root2 = _mm_andnot_si128(cmp, _mm_add_epi32(root, one128));
H A DSkXfermode_opts_SSE2.cpp21 __m128i prod = _mm_add_epi32(a, _mm_set1_epi32(128)); // prod += 128;
22 prod = _mm_add_epi32(prod, _mm_srli_epi32(prod, 8)); // prod + (prod >> 8)
29 __m128i sum = _mm_add_epi32(a, b);
71 return _mm_add_epi32(src, SkAlphaMulQ_SSE2(dst, isa));
76 return _mm_add_epi32(dst, SkAlphaMulQ_SSE2(src, ida));
108 __m128i r = _mm_add_epi32(r1, r2);
112 __m128i g = _mm_add_epi32(g1, g2);
116 __m128i b = _mm_add_epi32(b1, b2);
130 __m128i r = _mm_add_epi32(r1, r2);
134 __m128i g = _mm_add_epi32(g
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H A DSkBitmapFilter_opts_SSE2.cpp95 accum = _mm_add_epi32(accum, t);
98 accum = _mm_add_epi32(accum, t);
113 accum = _mm_add_epi32(accum, t);
116 accum = _mm_add_epi32(accum, t);
144 accum = _mm_add_epi32(accum, t);
146 accum = _mm_add_epi32(accum, t);
154 accum = _mm_add_epi32(accum, t);
223 accum = _mm_add_epi32(accum, t); \
225 accum = _mm_add_epi32(accum, t); \
230 accum = _mm_add_epi32(accu
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H A DSkBlurImage_opts_SSE2.cpp51 sum = _mm_add_epi32(sum, expand(*p));
66 result = _mm_add_epi32(result, half);
83 sum = _mm_add_epi32(sum, expand(r));
/external/libavc/encoder/x86/
H A Dih264e_half_pel_ssse3.c411 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t2_4x32b);
412 res_t3_4x32b = _mm_add_epi32(res_t3_4x32b, const_val512_4x32b);
413 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t3_4x32b);
424 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t2_4x32b);
425 res_t3_4x32b = _mm_add_epi32(res_t3_4x32b, const_val512_4x32b);
426 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t3_4x32b);
449 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t2_4x32b);
450 res_t3_4x32b = _mm_add_epi32(res_t3_4x32b, const_val512_4x32b);
451 res_t1_4x32b = _mm_add_epi32(res_t1_4x32b, res_t3_4x32b);
462 res_t1_4x32b = _mm_add_epi32(res_t1_4x32
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