1//===---------------------------- libunwind.h -----------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is dual licensed under the MIT and the University of Illinois Open
6// Source Licenses. See LICENSE.TXT for details.
7//
8//
9// Compatible with libuwind API documented at:
10//   http://www.nongnu.org/libunwind/man/libunwind(3).html
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef __LIBUNWIND__
15#define __LIBUNWIND__
16
17#include <stdint.h>
18#include <stddef.h>
19
20#include <__cxxabi_config.h>
21
22#ifdef __APPLE__
23  #include <Availability.h>
24    #ifdef __arm__
25       #define LIBUNWIND_AVAIL __attribute__((unavailable))
26    #else
27      #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0)
28    #endif
29#else
30  #define LIBUNWIND_AVAIL
31#endif
32
33/* error codes */
34enum {
35  UNW_ESUCCESS      = 0,     /* no error */
36  UNW_EUNSPEC       = -6540, /* unspecified (general) error */
37  UNW_ENOMEM        = -6541, /* out of memory */
38  UNW_EBADREG       = -6542, /* bad register number */
39  UNW_EREADONLYREG  = -6543, /* attempt to write read-only register */
40  UNW_ESTOPUNWIND   = -6544, /* stop unwinding */
41  UNW_EINVALIDIP    = -6545, /* invalid IP */
42  UNW_EBADFRAME     = -6546, /* bad frame */
43  UNW_EINVAL        = -6547, /* unsupported operation or bad value */
44  UNW_EBADVERSION   = -6548, /* unwind info has unsupported version */
45  UNW_ENOINFO       = -6549  /* no unwind info found */
46};
47
48struct unw_context_t {
49  uint64_t data[128];
50};
51typedef struct unw_context_t unw_context_t;
52
53struct unw_cursor_t {
54  uint64_t data[140];
55};
56typedef struct unw_cursor_t unw_cursor_t;
57
58typedef struct unw_addr_space *unw_addr_space_t;
59
60typedef int unw_regnum_t;
61#if LIBCXXABI_ARM_EHABI
62typedef uint32_t unw_word_t;
63typedef uint64_t unw_fpreg_t;
64#else
65typedef uint64_t unw_word_t;
66typedef double unw_fpreg_t;
67#endif
68
69struct unw_proc_info_t {
70  unw_word_t  start_ip;         /* start address of function */
71  unw_word_t  end_ip;           /* address after end of function */
72  unw_word_t  lsda;             /* address of language specific data area, */
73                                /*  or zero if not used */
74  unw_word_t  handler;          /* personality routine, or zero if not used */
75  unw_word_t  gp;               /* not used */
76  unw_word_t  flags;            /* not used */
77  uint32_t    format;           /* compact unwind encoding, or zero if none */
78  uint32_t    unwind_info_size; /* size of dwarf unwind info, or zero if none */
79  unw_word_t  unwind_info;      /* address of dwarf unwind info, or zero */
80  unw_word_t  extra;            /* mach_header of mach-o image containing func */
81};
82typedef struct unw_proc_info_t unw_proc_info_t;
83
84#ifdef __cplusplus
85extern "C" {
86#endif
87
88extern int unw_getcontext(unw_context_t *) LIBUNWIND_AVAIL;
89extern int unw_init_local(unw_cursor_t *, unw_context_t *) LIBUNWIND_AVAIL;
90extern int unw_step(unw_cursor_t *) LIBUNWIND_AVAIL;
91extern int unw_get_reg(unw_cursor_t *, unw_regnum_t, unw_word_t *) LIBUNWIND_AVAIL;
92extern int unw_get_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t *) LIBUNWIND_AVAIL;
93extern int unw_set_reg(unw_cursor_t *, unw_regnum_t, unw_word_t) LIBUNWIND_AVAIL;
94extern int unw_set_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t)  LIBUNWIND_AVAIL;
95extern int unw_resume(unw_cursor_t *) LIBUNWIND_AVAIL;
96
97#ifdef __arm__
98/* Save VFP registers in FSTMX format (instead of FSTMD). */
99extern void unw_save_vfp_as_X(unw_cursor_t *) LIBUNWIND_AVAIL;
100#endif
101
102
103extern const char *unw_regname(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
104extern int unw_get_proc_info(unw_cursor_t *, unw_proc_info_t *) LIBUNWIND_AVAIL;
105extern int unw_is_fpreg(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
106extern int unw_is_signal_frame(unw_cursor_t *) LIBUNWIND_AVAIL;
107extern int unw_get_proc_name(unw_cursor_t *, char *, size_t, unw_word_t *) LIBUNWIND_AVAIL;
108//extern int       unw_get_save_loc(unw_cursor_t*, int, unw_save_loc_t*);
109
110extern unw_addr_space_t unw_local_addr_space;
111
112#ifdef UNW_REMOTE
113/*
114 * Mac OS X "remote" API for unwinding other processes on same machine
115 *
116 */
117extern unw_addr_space_t unw_create_addr_space_for_task(task_t);
118extern void unw_destroy_addr_space(unw_addr_space_t);
119extern int unw_init_remote_thread(unw_cursor_t *, unw_addr_space_t, thread_t *);
120#endif /* UNW_REMOTE */
121
122/*
123 * traditional libuwind "remote" API
124 *   NOT IMPLEMENTED on Mac OS X
125 *
126 * extern int               unw_init_remote(unw_cursor_t*, unw_addr_space_t,
127 *                                          thread_t*);
128 * extern unw_accessors_t   unw_get_accessors(unw_addr_space_t);
129 * extern unw_addr_space_t  unw_create_addr_space(unw_accessors_t, int);
130 * extern void              unw_flush_cache(unw_addr_space_t, unw_word_t,
131 *                                          unw_word_t);
132 * extern int               unw_set_caching_policy(unw_addr_space_t,
133 *                                                 unw_caching_policy_t);
134 * extern void              _U_dyn_register(unw_dyn_info_t*);
135 * extern void              _U_dyn_cancel(unw_dyn_info_t*);
136 */
137
138#ifdef __cplusplus
139}
140#endif
141
142// architecture independent register numbers
143enum {
144  UNW_REG_IP = -1, // instruction pointer
145  UNW_REG_SP = -2, // stack pointer
146};
147
148// 32-bit x86 registers
149enum {
150  UNW_X86_EAX = 0,
151  UNW_X86_ECX = 1,
152  UNW_X86_EDX = 2,
153  UNW_X86_EBX = 3,
154  UNW_X86_EBP = 4,
155  UNW_X86_ESP = 5,
156  UNW_X86_ESI = 6,
157  UNW_X86_EDI = 7
158};
159
160// 64-bit x86_64 registers
161enum {
162  UNW_X86_64_RAX = 0,
163  UNW_X86_64_RDX = 1,
164  UNW_X86_64_RCX = 2,
165  UNW_X86_64_RBX = 3,
166  UNW_X86_64_RSI = 4,
167  UNW_X86_64_RDI = 5,
168  UNW_X86_64_RBP = 6,
169  UNW_X86_64_RSP = 7,
170  UNW_X86_64_R8  = 8,
171  UNW_X86_64_R9  = 9,
172  UNW_X86_64_R10 = 10,
173  UNW_X86_64_R11 = 11,
174  UNW_X86_64_R12 = 12,
175  UNW_X86_64_R13 = 13,
176  UNW_X86_64_R14 = 14,
177  UNW_X86_64_R15 = 15
178};
179
180
181// 32-bit ppc register numbers
182enum {
183  UNW_PPC_R0  = 0,
184  UNW_PPC_R1  = 1,
185  UNW_PPC_R2  = 2,
186  UNW_PPC_R3  = 3,
187  UNW_PPC_R4  = 4,
188  UNW_PPC_R5  = 5,
189  UNW_PPC_R6  = 6,
190  UNW_PPC_R7  = 7,
191  UNW_PPC_R8  = 8,
192  UNW_PPC_R9  = 9,
193  UNW_PPC_R10 = 10,
194  UNW_PPC_R11 = 11,
195  UNW_PPC_R12 = 12,
196  UNW_PPC_R13 = 13,
197  UNW_PPC_R14 = 14,
198  UNW_PPC_R15 = 15,
199  UNW_PPC_R16 = 16,
200  UNW_PPC_R17 = 17,
201  UNW_PPC_R18 = 18,
202  UNW_PPC_R19 = 19,
203  UNW_PPC_R20 = 20,
204  UNW_PPC_R21 = 21,
205  UNW_PPC_R22 = 22,
206  UNW_PPC_R23 = 23,
207  UNW_PPC_R24 = 24,
208  UNW_PPC_R25 = 25,
209  UNW_PPC_R26 = 26,
210  UNW_PPC_R27 = 27,
211  UNW_PPC_R28 = 28,
212  UNW_PPC_R29 = 29,
213  UNW_PPC_R30 = 30,
214  UNW_PPC_R31 = 31,
215  UNW_PPC_F0  = 32,
216  UNW_PPC_F1  = 33,
217  UNW_PPC_F2  = 34,
218  UNW_PPC_F3  = 35,
219  UNW_PPC_F4  = 36,
220  UNW_PPC_F5  = 37,
221  UNW_PPC_F6  = 38,
222  UNW_PPC_F7  = 39,
223  UNW_PPC_F8  = 40,
224  UNW_PPC_F9  = 41,
225  UNW_PPC_F10 = 42,
226  UNW_PPC_F11 = 43,
227  UNW_PPC_F12 = 44,
228  UNW_PPC_F13 = 45,
229  UNW_PPC_F14 = 46,
230  UNW_PPC_F15 = 47,
231  UNW_PPC_F16 = 48,
232  UNW_PPC_F17 = 49,
233  UNW_PPC_F18 = 50,
234  UNW_PPC_F19 = 51,
235  UNW_PPC_F20 = 52,
236  UNW_PPC_F21 = 53,
237  UNW_PPC_F22 = 54,
238  UNW_PPC_F23 = 55,
239  UNW_PPC_F24 = 56,
240  UNW_PPC_F25 = 57,
241  UNW_PPC_F26 = 58,
242  UNW_PPC_F27 = 59,
243  UNW_PPC_F28 = 60,
244  UNW_PPC_F29 = 61,
245  UNW_PPC_F30 = 62,
246  UNW_PPC_F31 = 63,
247  UNW_PPC_MQ  = 64,
248  UNW_PPC_LR  = 65,
249  UNW_PPC_CTR = 66,
250  UNW_PPC_AP  = 67,
251  UNW_PPC_CR0 = 68,
252  UNW_PPC_CR1 = 69,
253  UNW_PPC_CR2 = 70,
254  UNW_PPC_CR3 = 71,
255  UNW_PPC_CR4 = 72,
256  UNW_PPC_CR5 = 73,
257  UNW_PPC_CR6 = 74,
258  UNW_PPC_CR7 = 75,
259  UNW_PPC_XER = 76,
260  UNW_PPC_V0  = 77,
261  UNW_PPC_V1  = 78,
262  UNW_PPC_V2  = 79,
263  UNW_PPC_V3  = 80,
264  UNW_PPC_V4  = 81,
265  UNW_PPC_V5  = 82,
266  UNW_PPC_V6  = 83,
267  UNW_PPC_V7  = 84,
268  UNW_PPC_V8  = 85,
269  UNW_PPC_V9  = 86,
270  UNW_PPC_V10 = 87,
271  UNW_PPC_V11 = 88,
272  UNW_PPC_V12 = 89,
273  UNW_PPC_V13 = 90,
274  UNW_PPC_V14 = 91,
275  UNW_PPC_V15 = 92,
276  UNW_PPC_V16 = 93,
277  UNW_PPC_V17 = 94,
278  UNW_PPC_V18 = 95,
279  UNW_PPC_V19 = 96,
280  UNW_PPC_V20 = 97,
281  UNW_PPC_V21 = 98,
282  UNW_PPC_V22 = 99,
283  UNW_PPC_V23 = 100,
284  UNW_PPC_V24 = 101,
285  UNW_PPC_V25 = 102,
286  UNW_PPC_V26 = 103,
287  UNW_PPC_V27 = 104,
288  UNW_PPC_V28 = 105,
289  UNW_PPC_V29 = 106,
290  UNW_PPC_V30 = 107,
291  UNW_PPC_V31 = 108,
292  UNW_PPC_VRSAVE  = 109,
293  UNW_PPC_VSCR    = 110,
294  UNW_PPC_SPE_ACC = 111,
295  UNW_PPC_SPEFSCR = 112
296};
297
298// 64-bit ARM64 registers
299enum {
300  UNW_ARM64_X0  = 0,
301  UNW_ARM64_X1  = 1,
302  UNW_ARM64_X2  = 2,
303  UNW_ARM64_X3  = 3,
304  UNW_ARM64_X4  = 4,
305  UNW_ARM64_X5  = 5,
306  UNW_ARM64_X6  = 6,
307  UNW_ARM64_X7  = 7,
308  UNW_ARM64_X8  = 8,
309  UNW_ARM64_X9  = 9,
310  UNW_ARM64_X10 = 10,
311  UNW_ARM64_X11 = 11,
312  UNW_ARM64_X12 = 12,
313  UNW_ARM64_X13 = 13,
314  UNW_ARM64_X14 = 14,
315  UNW_ARM64_X15 = 15,
316  UNW_ARM64_X16 = 16,
317  UNW_ARM64_X17 = 17,
318  UNW_ARM64_X18 = 18,
319  UNW_ARM64_X19 = 19,
320  UNW_ARM64_X20 = 20,
321  UNW_ARM64_X21 = 21,
322  UNW_ARM64_X22 = 22,
323  UNW_ARM64_X23 = 23,
324  UNW_ARM64_X24 = 24,
325  UNW_ARM64_X25 = 25,
326  UNW_ARM64_X26 = 26,
327  UNW_ARM64_X27 = 27,
328  UNW_ARM64_X28 = 28,
329  UNW_ARM64_X29 = 29,
330  UNW_ARM64_FP  = 29,
331  UNW_ARM64_X30 = 30,
332  UNW_ARM64_LR  = 30,
333  UNW_ARM64_X31 = 31,
334  UNW_ARM64_SP  = 31,
335  // reserved block
336  UNW_ARM64_D0  = 64,
337  UNW_ARM64_D1  = 65,
338  UNW_ARM64_D2  = 66,
339  UNW_ARM64_D3  = 67,
340  UNW_ARM64_D4  = 68,
341  UNW_ARM64_D5  = 69,
342  UNW_ARM64_D6  = 70,
343  UNW_ARM64_D7  = 71,
344  UNW_ARM64_D8  = 72,
345  UNW_ARM64_D9  = 73,
346  UNW_ARM64_D10 = 74,
347  UNW_ARM64_D11 = 75,
348  UNW_ARM64_D12 = 76,
349  UNW_ARM64_D13 = 77,
350  UNW_ARM64_D14 = 78,
351  UNW_ARM64_D15 = 79,
352  UNW_ARM64_D16 = 80,
353  UNW_ARM64_D17 = 81,
354  UNW_ARM64_D18 = 82,
355  UNW_ARM64_D19 = 83,
356  UNW_ARM64_D20 = 84,
357  UNW_ARM64_D21 = 85,
358  UNW_ARM64_D22 = 86,
359  UNW_ARM64_D23 = 87,
360  UNW_ARM64_D24 = 88,
361  UNW_ARM64_D25 = 89,
362  UNW_ARM64_D26 = 90,
363  UNW_ARM64_D27 = 91,
364  UNW_ARM64_D28 = 92,
365  UNW_ARM64_D29 = 93,
366  UNW_ARM64_D30 = 94,
367  UNW_ARM64_D31 = 95,
368};
369
370// 32-bit ARM registers. Numbers match DWARF for ARM spec #3.1 Table 1.
371// Naming scheme uses recommendations given in Note 4 for VFP-v2 and VFP-v3.
372// In this scheme, even though the 64-bit floating point registers D0-D31
373// overlap physically with the 32-bit floating pointer registers S0-S31,
374// they are given a non-overlapping range of register numbers.
375//
376// Commented out ranges are not preserved during unwinding.
377enum {
378  UNW_ARM_R0  = 0,
379  UNW_ARM_R1  = 1,
380  UNW_ARM_R2  = 2,
381  UNW_ARM_R3  = 3,
382  UNW_ARM_R4  = 4,
383  UNW_ARM_R5  = 5,
384  UNW_ARM_R6  = 6,
385  UNW_ARM_R7  = 7,
386  UNW_ARM_R8  = 8,
387  UNW_ARM_R9  = 9,
388  UNW_ARM_R10 = 10,
389  UNW_ARM_R11 = 11,
390  UNW_ARM_R12 = 12,
391  UNW_ARM_SP  = 13,  // Logical alias for UNW_REG_SP
392  UNW_ARM_R13 = 13,
393  UNW_ARM_LR  = 14,
394  UNW_ARM_R14 = 14,
395  UNW_ARM_IP  = 15,  // Logical alias for UNW_REG_IP
396  UNW_ARM_R15 = 15,
397  // 16-63 -- OBSOLETE. Used in VFP1 to represent both S0-S31 and D0-D31.
398  UNW_ARM_S0  = 64,
399  UNW_ARM_S1  = 65,
400  UNW_ARM_S2  = 66,
401  UNW_ARM_S3  = 67,
402  UNW_ARM_S4  = 68,
403  UNW_ARM_S5  = 69,
404  UNW_ARM_S6  = 70,
405  UNW_ARM_S7  = 71,
406  UNW_ARM_S8  = 72,
407  UNW_ARM_S9  = 73,
408  UNW_ARM_S10 = 74,
409  UNW_ARM_S11 = 75,
410  UNW_ARM_S12 = 76,
411  UNW_ARM_S13 = 77,
412  UNW_ARM_S14 = 78,
413  UNW_ARM_S15 = 79,
414  UNW_ARM_S16 = 80,
415  UNW_ARM_S17 = 81,
416  UNW_ARM_S18 = 82,
417  UNW_ARM_S19 = 83,
418  UNW_ARM_S20 = 84,
419  UNW_ARM_S21 = 85,
420  UNW_ARM_S22 = 86,
421  UNW_ARM_S23 = 87,
422  UNW_ARM_S24 = 88,
423  UNW_ARM_S25 = 89,
424  UNW_ARM_S26 = 90,
425  UNW_ARM_S27 = 91,
426  UNW_ARM_S28 = 92,
427  UNW_ARM_S29 = 93,
428  UNW_ARM_S30 = 94,
429  UNW_ARM_S31 = 95,
430  //  96-103 -- OBSOLETE. F0-F7. Used by the FPA system. Superseded by VFP.
431  // 104-111 -- wCGR0-wCGR7, ACC0-ACC7 (Intel wireless MMX)
432  UNW_ARM_WR0 = 112,
433  UNW_ARM_WR1 = 113,
434  UNW_ARM_WR2 = 114,
435  UNW_ARM_WR3 = 115,
436  UNW_ARM_WR4 = 116,
437  UNW_ARM_WR5 = 117,
438  UNW_ARM_WR6 = 118,
439  UNW_ARM_WR7 = 119,
440  UNW_ARM_WR8 = 120,
441  UNW_ARM_WR9 = 121,
442  UNW_ARM_WR10 = 122,
443  UNW_ARM_WR11 = 123,
444  UNW_ARM_WR12 = 124,
445  UNW_ARM_WR13 = 125,
446  UNW_ARM_WR14 = 126,
447  UNW_ARM_WR15 = 127,
448  // 128-133 -- SPSR, SPSR_{FIQ|IRQ|ABT|UND|SVC}
449  // 134-143 -- Reserved
450  // 144-150 -- R8_USR-R14_USR
451  // 151-157 -- R8_FIQ-R14_FIQ
452  // 158-159 -- R13_IRQ-R14_IRQ
453  // 160-161 -- R13_ABT-R14_ABT
454  // 162-163 -- R13_UND-R14_UND
455  // 164-165 -- R13_SVC-R14_SVC
456  // 166-191 -- Reserved
457  UNW_ARM_WC0 = 192,
458  UNW_ARM_WC1 = 193,
459  UNW_ARM_WC2 = 194,
460  UNW_ARM_WC3 = 195,
461  // 196-199 -- wC4-wC7 (Intel wireless MMX control)
462  // 200-255 -- Reserved
463  UNW_ARM_D0  = 256,
464  UNW_ARM_D1  = 257,
465  UNW_ARM_D2  = 258,
466  UNW_ARM_D3  = 259,
467  UNW_ARM_D4  = 260,
468  UNW_ARM_D5  = 261,
469  UNW_ARM_D6  = 262,
470  UNW_ARM_D7  = 263,
471  UNW_ARM_D8  = 264,
472  UNW_ARM_D9  = 265,
473  UNW_ARM_D10 = 266,
474  UNW_ARM_D11 = 267,
475  UNW_ARM_D12 = 268,
476  UNW_ARM_D13 = 269,
477  UNW_ARM_D14 = 270,
478  UNW_ARM_D15 = 271,
479  UNW_ARM_D16 = 272,
480  UNW_ARM_D17 = 273,
481  UNW_ARM_D18 = 274,
482  UNW_ARM_D19 = 275,
483  UNW_ARM_D20 = 276,
484  UNW_ARM_D21 = 277,
485  UNW_ARM_D22 = 278,
486  UNW_ARM_D23 = 279,
487  UNW_ARM_D24 = 280,
488  UNW_ARM_D25 = 281,
489  UNW_ARM_D26 = 282,
490  UNW_ARM_D27 = 283,
491  UNW_ARM_D28 = 284,
492  UNW_ARM_D29 = 285,
493  UNW_ARM_D30 = 286,
494  UNW_ARM_D31 = 287,
495  // 288-319 -- Reserved for VFP/Neon
496  // 320-8191 -- Reserved
497  // 8192-16383 -- Unspecified vendor co-processor register.
498};
499
500#endif
501