1//===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements generic type expansion and splitting for LegalizeTypes.
11// The routines here perform legalization when the details of the type (such as
12// whether it is an integer or a float) do not matter.
13// Expansion is the act of changing a computation in an illegal type to be a
14// computation in two identical registers of a smaller type.  The Lo/Hi part
15// is required to be stored first in memory on little/big-endian machines.
16// Splitting is the act of changing a computation in an illegal type to be a
17// computation in two not necessarily identical registers of a smaller type.
18// There are no requirements on how the type is represented in memory.
19//
20//===----------------------------------------------------------------------===//
21
22#include "LegalizeTypes.h"
23#include "llvm/IR/DataLayout.h"
24using namespace llvm;
25
26#define DEBUG_TYPE "legalize-types"
27
28//===----------------------------------------------------------------------===//
29// Generic Result Expansion.
30//===----------------------------------------------------------------------===//
31
32// These routines assume that the Lo/Hi part is stored first in memory on
33// little/big-endian machines, followed by the Hi/Lo part.  This means that
34// they cannot be used as is on vectors, for which Lo is always stored first.
35void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
36                                              SDValue &Lo, SDValue &Hi) {
37  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
38  GetExpandedOp(Op, Lo, Hi);
39}
40
41void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
42  EVT OutVT = N->getValueType(0);
43  EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
44  SDValue InOp = N->getOperand(0);
45  EVT InVT = InOp.getValueType();
46  SDLoc dl(N);
47
48  // Handle some special cases efficiently.
49  switch (getTypeAction(InVT)) {
50    case TargetLowering::TypeLegal:
51    case TargetLowering::TypePromoteInteger:
52      break;
53    case TargetLowering::TypePromoteFloat:
54      llvm_unreachable("Bitcast of a promotion-needing float should never need"
55                       "expansion");
56    case TargetLowering::TypeSoftenFloat:
57      // Convert the integer operand instead.
58      SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
59      Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
60      Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61      return;
62    case TargetLowering::TypeExpandInteger:
63    case TargetLowering::TypeExpandFloat:
64      // Convert the expanded pieces of the input.
65      GetExpandedOp(InOp, Lo, Hi);
66      if (TLI.hasBigEndianPartOrdering(InVT) !=
67          TLI.hasBigEndianPartOrdering(OutVT))
68        std::swap(Lo, Hi);
69      Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
70      Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
71      return;
72    case TargetLowering::TypeSplitVector:
73      GetSplitVector(InOp, Lo, Hi);
74      if (TLI.hasBigEndianPartOrdering(OutVT))
75        std::swap(Lo, Hi);
76      Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
77      Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
78      return;
79    case TargetLowering::TypeScalarizeVector:
80      // Convert the element instead.
81      SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
82      Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
83      Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
84      return;
85    case TargetLowering::TypeWidenVector: {
86      assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
87      InOp = GetWidenedVector(InOp);
88      EVT LoVT, HiVT;
89      std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
90      std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
91      if (TLI.hasBigEndianPartOrdering(OutVT))
92        std::swap(Lo, Hi);
93      Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
94      Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
95      return;
96    }
97  }
98
99  if (InVT.isVector() && OutVT.isInteger()) {
100    // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
101    // is legal but the result is not.
102    unsigned NumElems = 2;
103    EVT ElemVT = NOutVT;
104    EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
105
106    // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>.
107    while (!isTypeLegal(NVT)) {
108      unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2;
109      // If the element size is smaller than byte, bail.
110      if (NewSizeInBits < 8)
111        break;
112      NumElems *= 2;
113      ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits);
114      NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
115    }
116
117    if (isTypeLegal(NVT)) {
118      SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
119
120      SmallVector<SDValue, 8> Vals;
121      for (unsigned i = 0; i < NumElems; ++i)
122        Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
123                                   CastInOp, DAG.getConstant(i,
124                                             TLI.getVectorIdxTy())));
125
126      // Build Lo, Hi pair by pairing extracted elements if needed.
127      unsigned Slot = 0;
128      for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) {
129        // Each iteration will BUILD_PAIR two nodes and append the result until
130        // there are only two nodes left, i.e. Lo and Hi.
131        SDValue LHS = Vals[Slot];
132        SDValue RHS = Vals[Slot + 1];
133
134        if (TLI.isBigEndian())
135          std::swap(LHS, RHS);
136
137        Vals.push_back(DAG.getNode(ISD::BUILD_PAIR, dl,
138                                   EVT::getIntegerVT(
139                                     *DAG.getContext(),
140                                     LHS.getValueType().getSizeInBits() << 1),
141                                   LHS, RHS));
142      }
143      Lo = Vals[Slot++];
144      Hi = Vals[Slot++];
145
146      if (TLI.isBigEndian())
147        std::swap(Lo, Hi);
148
149      return;
150    }
151  }
152
153  // Lower the bit-convert to a store/load from the stack.
154  assert(NOutVT.isByteSized() && "Expanded type not byte sized!");
155
156  // Create the stack frame object.  Make sure it is aligned for both
157  // the source and expanded destination types.
158  unsigned Alignment =
159    TLI.getDataLayout()->getPrefTypeAlignment(NOutVT.
160                                              getTypeForEVT(*DAG.getContext()));
161  SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
162  int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
163  MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(SPFI);
164
165  // Emit a store to the stack slot.
166  SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo,
167                               false, false, 0);
168
169  // Load the first half from the stack slot.
170  Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo,
171                   false, false, false, 0);
172
173  // Increment the pointer to the other half.
174  unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
175  StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
176                         DAG.getConstant(IncrementSize,
177                                         StackPtr.getValueType()));
178
179  // Load the second half from the stack slot.
180  Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr,
181                   PtrInfo.getWithOffset(IncrementSize), false,
182                   false, false, MinAlign(Alignment, IncrementSize));
183
184  // Handle endianness of the load.
185  if (TLI.hasBigEndianPartOrdering(OutVT))
186    std::swap(Lo, Hi);
187}
188
189void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo,
190                                            SDValue &Hi) {
191  // Return the operands.
192  Lo = N->getOperand(0);
193  Hi = N->getOperand(1);
194}
195
196void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
197                                                 SDValue &Hi) {
198  GetExpandedOp(N->getOperand(0), Lo, Hi);
199  SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
200                   Hi : Lo;
201
202  assert(Part.getValueType() == N->getValueType(0) &&
203         "Type twice as big as expanded type not itself expanded!");
204
205  GetPairElements(Part, Lo, Hi);
206}
207
208void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
209                                                    SDValue &Hi) {
210  SDValue OldVec = N->getOperand(0);
211  unsigned OldElts = OldVec.getValueType().getVectorNumElements();
212  EVT OldEltVT = OldVec.getValueType().getVectorElementType();
213  SDLoc dl(N);
214
215  // Convert to a vector of the expanded element type, for example
216  // <3 x i64> -> <6 x i32>.
217  EVT OldVT = N->getValueType(0);
218  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
219
220  if (OldVT != OldEltVT) {
221    // The result of EXTRACT_VECTOR_ELT may be larger than the element type of
222    // the input vector.  If so, extend the elements of the input vector to the
223    // same bitwidth as the result before expanding.
224    assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
225    EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts);
226    OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
227  }
228
229  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
230                               EVT::getVectorVT(*DAG.getContext(),
231                                                NewVT, 2*OldElts),
232                               OldVec);
233
234  // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
235  SDValue Idx = N->getOperand(1);
236
237  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
238  Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
239
240  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
241                    DAG.getConstant(1, Idx.getValueType()));
242  Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
243
244  if (TLI.isBigEndian())
245    std::swap(Lo, Hi);
246}
247
248void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
249                                            SDValue &Hi) {
250  assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
251  SDLoc dl(N);
252
253  LoadSDNode *LD = cast<LoadSDNode>(N);
254  EVT ValueVT = LD->getValueType(0);
255  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
256  SDValue Chain = LD->getChain();
257  SDValue Ptr = LD->getBasePtr();
258  unsigned Alignment = LD->getAlignment();
259  bool isVolatile = LD->isVolatile();
260  bool isNonTemporal = LD->isNonTemporal();
261  bool isInvariant = LD->isInvariant();
262  AAMDNodes AAInfo = LD->getAAInfo();
263
264  assert(NVT.isByteSized() && "Expanded type not byte sized!");
265
266  Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
267                   isVolatile, isNonTemporal, isInvariant, Alignment,
268                   AAInfo);
269
270  // Increment the pointer to the other half.
271  unsigned IncrementSize = NVT.getSizeInBits() / 8;
272  Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
273                    DAG.getConstant(IncrementSize, Ptr.getValueType()));
274  Hi = DAG.getLoad(NVT, dl, Chain, Ptr,
275                   LD->getPointerInfo().getWithOffset(IncrementSize),
276                   isVolatile, isNonTemporal, isInvariant,
277                   MinAlign(Alignment, IncrementSize), AAInfo);
278
279  // Build a factor node to remember that this load is independent of the
280  // other one.
281  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
282                      Hi.getValue(1));
283
284  // Handle endianness of the load.
285  if (TLI.hasBigEndianPartOrdering(ValueVT))
286    std::swap(Lo, Hi);
287
288  // Modified the chain - switch anything that used the old chain to use
289  // the new one.
290  ReplaceValueWith(SDValue(N, 1), Chain);
291}
292
293void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
294  EVT OVT = N->getValueType(0);
295  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
296  SDValue Chain = N->getOperand(0);
297  SDValue Ptr = N->getOperand(1);
298  SDLoc dl(N);
299  const unsigned Align = N->getConstantOperandVal(3);
300
301  Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
302  Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
303
304  // Handle endianness of the load.
305  if (TLI.hasBigEndianPartOrdering(OVT))
306    std::swap(Lo, Hi);
307
308  // Modified the chain - switch anything that used the old chain to use
309  // the new one.
310  ReplaceValueWith(SDValue(N, 1), Hi.getValue(1));
311}
312
313
314//===--------------------------------------------------------------------===//
315// Generic Operand Expansion.
316//===--------------------------------------------------------------------===//
317
318void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements,
319                                       SmallVectorImpl<SDValue> &Ops,
320                                       EVT EltVT) {
321  assert(Op.getValueType().isInteger());
322  SDLoc DL(Op);
323  SDValue Parts[2];
324
325  if (NumElements > 1) {
326    NumElements >>= 1;
327    SplitInteger(Op, Parts[0], Parts[1]);
328      if (TLI.isBigEndian())
329        std::swap(Parts[0], Parts[1]);
330    IntegerToVector(Parts[0], NumElements, Ops, EltVT);
331    IntegerToVector(Parts[1], NumElements, Ops, EltVT);
332  } else {
333    Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op));
334  }
335}
336
337SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
338  SDLoc dl(N);
339  if (N->getValueType(0).isVector()) {
340    // An illegal expanding type is being converted to a legal vector type.
341    // Make a two element vector out of the expanded parts and convert that
342    // instead, but only if the new vector type is legal (otherwise there
343    // is no point, and it might create expansion loops).  For example, on
344    // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32.
345    //
346    // FIXME: I'm not sure why we are first trying to split the input into
347    // a 2 element vector, so I'm leaving it here to maintain the current
348    // behavior.
349    unsigned NumElts = 2;
350    EVT OVT = N->getOperand(0).getValueType();
351    EVT NVT = EVT::getVectorVT(*DAG.getContext(),
352                               TLI.getTypeToTransformTo(*DAG.getContext(), OVT),
353                               NumElts);
354    if (!isTypeLegal(NVT)) {
355      // If we can't find a legal type by splitting the integer in half,
356      // then we can use the node's value type.
357      NumElts = N->getValueType(0).getVectorNumElements();
358      NVT = N->getValueType(0);
359    }
360
361    SmallVector<SDValue, 8> Ops;
362    IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
363
364    SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT,
365                              makeArrayRef(Ops.data(), NumElts));
366    return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
367  }
368
369  // Otherwise, store to a temporary and load out again as the new type.
370  return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
371}
372
373SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
374  // The vector type is legal but the element type needs expansion.
375  EVT VecVT = N->getValueType(0);
376  unsigned NumElts = VecVT.getVectorNumElements();
377  EVT OldVT = N->getOperand(0).getValueType();
378  EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
379  SDLoc dl(N);
380
381  assert(OldVT == VecVT.getVectorElementType() &&
382         "BUILD_VECTOR operand type doesn't match vector element type!");
383
384  // Build a vector of twice the length out of the expanded elements.
385  // For example <3 x i64> -> <6 x i32>.
386  std::vector<SDValue> NewElts;
387  NewElts.reserve(NumElts*2);
388
389  for (unsigned i = 0; i < NumElts; ++i) {
390    SDValue Lo, Hi;
391    GetExpandedOp(N->getOperand(i), Lo, Hi);
392    if (TLI.isBigEndian())
393      std::swap(Lo, Hi);
394    NewElts.push_back(Lo);
395    NewElts.push_back(Hi);
396  }
397
398  SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
399                               EVT::getVectorVT(*DAG.getContext(),
400                                                NewVT, NewElts.size()),
401                               NewElts);
402
403  // Convert the new vector to the old vector type.
404  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
405}
406
407SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
408  SDValue Lo, Hi;
409  GetExpandedOp(N->getOperand(0), Lo, Hi);
410  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
411}
412
413SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
414  // The vector type is legal but the element type needs expansion.
415  EVT VecVT = N->getValueType(0);
416  unsigned NumElts = VecVT.getVectorNumElements();
417  SDLoc dl(N);
418
419  SDValue Val = N->getOperand(1);
420  EVT OldEVT = Val.getValueType();
421  EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT);
422
423  assert(OldEVT == VecVT.getVectorElementType() &&
424         "Inserted element type doesn't match vector element type!");
425
426  // Bitconvert to a vector of twice the length with elements of the expanded
427  // type, insert the expanded vector elements, and then convert back.
428  EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2);
429  SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
430                               NewVecVT, N->getOperand(0));
431
432  SDValue Lo, Hi;
433  GetExpandedOp(Val, Lo, Hi);
434  if (TLI.isBigEndian())
435    std::swap(Lo, Hi);
436
437  SDValue Idx = N->getOperand(2);
438  Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
439  NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx);
440  Idx = DAG.getNode(ISD::ADD, dl,
441                    Idx.getValueType(), Idx,
442                    DAG.getConstant(1, Idx.getValueType()));
443  NewVec =  DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx);
444
445  // Convert the new vector to the old vector type.
446  return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
447}
448
449SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
450  SDLoc dl(N);
451  EVT VT = N->getValueType(0);
452  assert(VT.getVectorElementType() == N->getOperand(0).getValueType() &&
453         "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
454  unsigned NumElts = VT.getVectorNumElements();
455  SmallVector<SDValue, 16> Ops(NumElts);
456  Ops[0] = N->getOperand(0);
457  SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType());
458  for (unsigned i = 1; i < NumElts; ++i)
459    Ops[i] = UndefVal;
460  return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
461}
462
463SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
464  assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
465  assert(OpNo == 1 && "Can only expand the stored value so far");
466  SDLoc dl(N);
467
468  StoreSDNode *St = cast<StoreSDNode>(N);
469  EVT ValueVT = St->getValue().getValueType();
470  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
471  SDValue Chain = St->getChain();
472  SDValue Ptr = St->getBasePtr();
473  unsigned Alignment = St->getAlignment();
474  bool isVolatile = St->isVolatile();
475  bool isNonTemporal = St->isNonTemporal();
476  AAMDNodes AAInfo = St->getAAInfo();
477
478  assert(NVT.isByteSized() && "Expanded type not byte sized!");
479  unsigned IncrementSize = NVT.getSizeInBits() / 8;
480
481  SDValue Lo, Hi;
482  GetExpandedOp(St->getValue(), Lo, Hi);
483
484  if (TLI.hasBigEndianPartOrdering(ValueVT))
485    std::swap(Lo, Hi);
486
487  Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(),
488                    isVolatile, isNonTemporal, Alignment, AAInfo);
489
490  Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
491                    DAG.getConstant(IncrementSize, Ptr.getValueType()));
492  Hi = DAG.getStore(Chain, dl, Hi, Ptr,
493                    St->getPointerInfo().getWithOffset(IncrementSize),
494                    isVolatile, isNonTemporal,
495                    MinAlign(Alignment, IncrementSize), AAInfo);
496
497  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
498}
499
500
501//===--------------------------------------------------------------------===//
502// Generic Result Splitting.
503//===--------------------------------------------------------------------===//
504
505// Be careful to make no assumptions about which of Lo/Hi is stored first in
506// memory (for vectors it is always Lo first followed by Hi in the following
507// bytes; for integers and floats it is Lo first if and only if the machine is
508// little-endian).
509
510void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
511                                             SDValue &Lo, SDValue &Hi) {
512  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
513  GetSplitOp(Op, Lo, Hi);
514}
515
516void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo,
517                                       SDValue &Hi) {
518  SDValue LL, LH, RL, RH, CL, CH;
519  SDLoc dl(N);
520  GetSplitOp(N->getOperand(1), LL, LH);
521  GetSplitOp(N->getOperand(2), RL, RH);
522
523  SDValue Cond = N->getOperand(0);
524  CL = CH = Cond;
525  if (Cond.getValueType().isVector()) {
526    // Check if there are already splitted versions of the vector available and
527    // use those instead of splitting the mask operand again.
528    if (getTypeAction(Cond.getValueType()) == TargetLowering::TypeSplitVector)
529      GetSplitVector(Cond, CL, CH);
530    else
531      std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
532  }
533
534  Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL);
535  Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH);
536}
537
538void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
539                                          SDValue &Hi) {
540  SDValue LL, LH, RL, RH;
541  SDLoc dl(N);
542  GetSplitOp(N->getOperand(2), LL, LH);
543  GetSplitOp(N->getOperand(3), RL, RH);
544
545  Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
546                   N->getOperand(1), LL, RL, N->getOperand(4));
547  Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
548                   N->getOperand(1), LH, RH, N->getOperand(4));
549}
550
551void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
552  EVT LoVT, HiVT;
553  std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
554  Lo = DAG.getUNDEF(LoVT);
555  Hi = DAG.getUNDEF(HiVT);
556}
557