1//===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the ARM specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
16
17#include "ARMInstrInfo.h"
18#include "ARMSubtarget.h"
19#include "llvm/IR/DataLayout.h"
20#include "llvm/Target/TargetMachine.h"
21
22namespace llvm {
23
24class ARMBaseTargetMachine : public LLVMTargetMachine {
25public:
26  enum ARMABI {
27    ARM_ABI_UNKNOWN,
28    ARM_ABI_APCS,
29    ARM_ABI_AAPCS // ARM EABI
30  } TargetABI;
31
32protected:
33  std::unique_ptr<TargetLoweringObjectFile> TLOF;
34  ARMSubtarget        Subtarget;
35  bool isLittle;
36  mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
37
38public:
39  ARMBaseTargetMachine(const Target &T, StringRef TT,
40                       StringRef CPU, StringRef FS,
41                       const TargetOptions &Options,
42                       Reloc::Model RM, CodeModel::Model CM,
43                       CodeGenOpt::Level OL,
44                       bool isLittle);
45  ~ARMBaseTargetMachine() override;
46
47  const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
48  const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
49  bool isLittleEndian() const { return isLittle; }
50
51  /// \brief Get the TargetIRAnalysis for this target.
52  TargetIRAnalysis getTargetIRAnalysis() override;
53
54  // Pass Pipeline Configuration
55  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
56
57  TargetLoweringObjectFile *getObjFileLowering() const override {
58    return TLOF.get();
59  }
60};
61
62/// ARMTargetMachine - ARM target machine.
63///
64class ARMTargetMachine : public ARMBaseTargetMachine {
65  virtual void anchor();
66 public:
67   ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
68                    const TargetOptions &Options, Reloc::Model RM,
69                    CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
70};
71
72/// ARMLETargetMachine - ARM little endian target machine.
73///
74class ARMLETargetMachine : public ARMTargetMachine {
75  void anchor() override;
76public:
77  ARMLETargetMachine(const Target &T, StringRef TT,
78                     StringRef CPU, StringRef FS, const TargetOptions &Options,
79                     Reloc::Model RM, CodeModel::Model CM,
80                     CodeGenOpt::Level OL);
81};
82
83/// ARMBETargetMachine - ARM big endian target machine.
84///
85class ARMBETargetMachine : public ARMTargetMachine {
86  void anchor() override;
87public:
88  ARMBETargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
89                     const TargetOptions &Options, Reloc::Model RM,
90                     CodeModel::Model CM, CodeGenOpt::Level OL);
91};
92
93/// ThumbTargetMachine - Thumb target machine.
94/// Due to the way architectures are handled, this represents both
95///   Thumb-1 and Thumb-2.
96///
97class ThumbTargetMachine : public ARMBaseTargetMachine {
98  virtual void anchor();
99public:
100  ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
101                     const TargetOptions &Options, Reloc::Model RM,
102                     CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
103};
104
105/// ThumbLETargetMachine - Thumb little endian target machine.
106///
107class ThumbLETargetMachine : public ThumbTargetMachine {
108  void anchor() override;
109public:
110  ThumbLETargetMachine(const Target &T, StringRef TT, StringRef CPU,
111                       StringRef FS, const TargetOptions &Options,
112                       Reloc::Model RM, CodeModel::Model CM,
113                       CodeGenOpt::Level OL);
114};
115
116/// ThumbBETargetMachine - Thumb big endian target machine.
117///
118class ThumbBETargetMachine : public ThumbTargetMachine {
119  void anchor() override;
120public:
121  ThumbBETargetMachine(const Target &T, StringRef TT, StringRef CPU,
122                       StringRef FS, const TargetOptions &Options,
123                       Reloc::Model RM, CodeModel::Model CM,
124                       CodeGenOpt::Level OL);
125};
126
127} // end namespace llvm
128
129#endif
130