1//===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides PowerPC specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
15#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
16
17// GCC #defines PPC on Linux but we use it as our namespace name
18#undef PPC
19
20#include "llvm/Support/DataTypes.h"
21#include "llvm/Support/MathExtras.h"
22
23namespace llvm {
24class MCAsmBackend;
25class MCCodeEmitter;
26class MCContext;
27class MCInstrInfo;
28class MCObjectWriter;
29class MCRegisterInfo;
30class MCSubtargetInfo;
31class Target;
32class StringRef;
33class raw_pwrite_stream;
34class raw_ostream;
35
36extern Target ThePPC32Target;
37extern Target ThePPC64Target;
38extern Target ThePPC64LETarget;
39
40MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
41                                      const MCRegisterInfo &MRI,
42                                      MCContext &Ctx);
43
44MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI,
45                                  StringRef TT, StringRef CPU);
46
47/// Construct an PPC ELF object writer.
48MCObjectWriter *createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
49                                         bool IsLittleEndian, uint8_t OSABI);
50/// Construct a PPC Mach-O object writer.
51MCObjectWriter *createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
52                                          uint32_t CPUType,
53                                          uint32_t CPUSubtype);
54
55/// Returns true iff Val consists of one contiguous run of 1s with any number of
56/// 0s on either side.  The 1s are allowed to wrap from LSB to MSB, so
57/// 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs.  0x0F0F0000 is not,
58/// since all 1s are not contiguous.
59static inline bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {
60  if (!Val)
61    return false;
62
63  if (isShiftedMask_32(Val)) {
64    // look for the first non-zero bit
65    MB = countLeadingZeros(Val);
66    // look for the first zero bit after the run of ones
67    ME = countLeadingZeros((Val - 1) ^ Val);
68    return true;
69  } else {
70    Val = ~Val; // invert mask
71    if (isShiftedMask_32(Val)) {
72      // effectively look for the first zero bit
73      ME = countLeadingZeros(Val) - 1;
74      // effectively look for the first one bit after the run of zeros
75      MB = countLeadingZeros((Val - 1) ^ Val) + 1;
76      return true;
77    }
78  }
79  // no run present
80  return false;
81}
82
83} // End llvm namespace
84
85// Generated files will use "namespace PPC". To avoid symbol clash,
86// undefine PPC here. PPC may be predefined on some hosts.
87#undef PPC
88
89// Defines symbolic names for PowerPC registers.  This defines a mapping from
90// register name to register number.
91//
92#define GET_REGINFO_ENUM
93#include "PPCGenRegisterInfo.inc"
94
95// Defines symbolic names for the PowerPC instructions.
96//
97#define GET_INSTRINFO_ENUM
98#include "PPCGenInstrInfo.inc"
99
100#define GET_SUBTARGETINFO_ENUM
101#include "PPCGenSubtargetInfo.inc"
102
103#endif
104