1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __ARM_KVM_H__
20#define __ARM_KVM_H__
21#define KVM_SPSR_EL1 0
22#define KVM_SPSR_SVC KVM_SPSR_EL1
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define KVM_SPSR_ABT 1
25#define KVM_SPSR_UND 2
26#define KVM_SPSR_IRQ 3
27#define KVM_SPSR_FIQ 4
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define KVM_NR_SPSR 5
30#ifndef __ASSEMBLY__
31#include <asm/types.h>
32#include <asm/ptrace.h>
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define __KVM_HAVE_GUEST_DEBUG
35#define __KVM_HAVE_IRQ_LINE
36#define KVM_REG_SIZE(id)   (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
37struct kvm_regs {
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 struct user_pt_regs regs;
40 __u64 sp_el1;
41 __u64 elr_el1;
42 __u64 spsr[KVM_NR_SPSR];
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44 struct user_fpsimd_state fp_regs;
45};
46#define KVM_ARM_TARGET_AEM_V8 0
47#define KVM_ARM_TARGET_FOUNDATION_V8 1
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define KVM_ARM_TARGET_CORTEX_A57 2
50#define KVM_ARM_TARGET_XGENE_POTENZA 3
51#define KVM_ARM_NUM_TARGETS 4
52#define KVM_ARM_DEVICE_TYPE_SHIFT 0
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
55#define KVM_ARM_DEVICE_ID_SHIFT 16
56#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT)
57#define KVM_ARM_DEVICE_VGIC_V2 0
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define KVM_VGIC_V2_ADDR_TYPE_DIST 0
60#define KVM_VGIC_V2_ADDR_TYPE_CPU 1
61#define KVM_VGIC_V2_DIST_SIZE 0x1000
62#define KVM_VGIC_V2_CPU_SIZE 0x2000
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define KVM_ARM_VCPU_POWER_OFF 0
65#define KVM_ARM_VCPU_EL1_32BIT 1
66struct kvm_vcpu_init {
67 __u32 target;
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 __u32 features[7];
70};
71struct kvm_sregs {
72};
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74struct kvm_fpu {
75};
76struct kvm_guest_debug_arch {
77};
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79struct kvm_debug_exit_arch {
80};
81struct kvm_sync_regs {
82};
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84struct kvm_arch_memory_slot {
85};
86#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000
87#define KVM_REG_ARM_COPROC_SHIFT 16
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
90#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32))
91#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT)
92#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define KVM_REG_ARM_DEMUX_ID_SHIFT 8
95#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT)
96#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF
97#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99#define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT)
100#define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000
101#define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14
102#define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104#define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11
105#define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780
106#define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7
107#define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109#define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3
110#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007
111#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0
112#define ARM64_SYS_REG_SHIFT_MASK(x,n)   (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) &   KVM_REG_ARM64_SYSREG_ ## n ## _MASK)
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114#define __ARM64_SYS_REG(op0,op1,crn,crm,op2)   (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG |   ARM64_SYS_REG_SHIFT_MASK(op0, OP0) |   ARM64_SYS_REG_SHIFT_MASK(op1, OP1) |   ARM64_SYS_REG_SHIFT_MASK(crn, CRN) |   ARM64_SYS_REG_SHIFT_MASK(crm, CRM) |   ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
115#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64)
116#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1)
117#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
120#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
121#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
122#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
125#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
126#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
127#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129#define KVM_ARM_IRQ_TYPE_SHIFT 24
130#define KVM_ARM_IRQ_TYPE_MASK 0xff
131#define KVM_ARM_IRQ_VCPU_SHIFT 16
132#define KVM_ARM_IRQ_VCPU_MASK 0xff
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134#define KVM_ARM_IRQ_NUM_SHIFT 0
135#define KVM_ARM_IRQ_NUM_MASK 0xffff
136#define KVM_ARM_IRQ_TYPE_CPU 0
137#define KVM_ARM_IRQ_TYPE_SPI 1
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139#define KVM_ARM_IRQ_TYPE_PPI 2
140#define KVM_ARM_IRQ_CPU_IRQ 0
141#define KVM_ARM_IRQ_CPU_FIQ 1
142#define KVM_ARM_IRQ_GIC_MAX 127
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#define KVM_PSCI_FN_BASE 0x95c1ba5e
145#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
146#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0)
147#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1)
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
150#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
151#define KVM_PSCI_RET_SUCCESS 0
152#define KVM_PSCI_RET_NI ((unsigned long)-1)
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define KVM_PSCI_RET_INVAL ((unsigned long)-2)
155#define KVM_PSCI_RET_DENIED ((unsigned long)-3)
156#endif
157#endif
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159