| 3d21bdf8894e780d349c481e5c9e29fe1556051c |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native
Optimizing + quick tests are passing, devices boot.
TODO: Test and fix bugs in mips64.
Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.
Some of the savings are from removal of virtual methods and direct
methods object arrays.
Bug: 19264997
(cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33)
Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
Fix some ArtMethod related bugs
Added root visiting for runtime methods, not currently required
since the GcRoots in these methods are null.
Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes
--trace run-tests 005, 044.
Fixed optimizing compiler bug where we used a normal stack location
instead of double on ARM64, this fixes the debuggable tests.
TODO: Fix JDWP tests.
Bug: 19264997
Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3
ART: Fix casts for 64-bit pointers on 32-bit compiler.
Bug: 19264997
Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457
Fix JDWP tests after ArtMethod change
Fixes Throwable::GetStackDepth for exception event detection after
internal stack trace representation change.
Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of
proxy method.
Bug: 19264997
Change-Id: I363e293796848c3ec491c963813f62d868da44d2
Fix accidental IMT and root marking regression
Was always using the conflict trampoline. Also included fix for
regression in GC time caused by extra roots. Most of the regression
was IMT.
Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to
detached thread.
EvaluateAndApplyChanges:
From ~2500 -> ~1980
GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots
Bug: 19264997
Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0
Fix bogus image test assert
Previously we were comparing the size of the non moving space to
size of the image file.
Now we properly compare the size of the image space against the size
of the image file.
Bug: 19264997
Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a
[MIPS64] Fix art_quick_invoke_stub argument offsets.
ArtMethod reference's size got bigger, so we need to move other args
and leave enough space for ArtMethod* and 'this' pointer.
This fixes mips64 boot.
Bug: 19264997
Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
|
| 21030dd59b1e350f6f43de39e3c4ce0886ff539c |
|
07-May-2015 |
Andreas Gampe <agampe@google.com> |
ART: x86 indexOf intrinsics for the optimizing compiler
Add intrinsics implementations for indexOf in the optimizing
compiler. These are mostly ported from Quick. Add instruction
support to assemblers where necessary.
Change-Id: Ife90ed0245532a5c436a26fe84715dc357f353c8
|
| 7394569c9252b277710b2d7d3fc35fb0dd48fc4b |
|
29-Apr-2015 |
Mark P Mendell <mark.p.mendell@intel.com> |
Revert "Revert "Revert "Revert "[optimizing] Improve x86 shifts""""
This reverts commit 2a7a1d7808f003bea908023ebd11eb442d2fca39.
Fix the problem that a long long >> 63 got the wrong answer. The
problem was that a shr was used instead of a sar.
Change-Id: I0327f79c718016ddec9272a605fc50ec15ec4566
|
| 2a7a1d7808f003bea908023ebd11eb442d2fca39 |
|
29-Apr-2015 |
Roland Levillain <rpl@google.com> |
Revert "Revert "Revert "[optimizing] Improve x86 shifts"""
This reverts commit 9b95a057ee20e4b1ca2e9c663726482172dc9ba3.
Reverting this CL as it breaks libcore tests:
org.apache.harmony.tests.java.lang.DoubleTest#test_compare
junit.framework.AssertionFailedError: compare() -0.0 should be less 0.0
at junit.framework.Assert.assertTrue(Assert.java:140)
at org.apache.harmony.tests.java.lang.DoubleTest.test_compare(DoubleTest.java:258)
org.apache.harmony.tests.java.lang.DoubleTest#test_compare FAIL (EXEC_FAILED)
org.apache.harmony.tests.java.lang.DoubleTest#test_compareToLjava_lang_Double
junit.framework.AssertionFailedError: Assert 2: compare() -0.0 should be less 0.0
at junit.framework.Assert.assertTrue(Assert.java:140)
at org.apache.harmony.tests.java.lang.DoubleTest.test_compareToLjava_lang_Double(DoubleTest.java:1320)
org.apache.harmony.tests.java.lang.DoubleTest#test_compareToLjava_lang_Double FAIL (EXEC_FAILED)
Change-Id: I10f0ec8cc9495cc225fef1940b3f1a9fe87d996f
|
| 9b95a057ee20e4b1ca2e9c663726482172dc9ba3 |
|
29-Apr-2015 |
Roland Levillain <rpl@google.com> |
Revert "Revert "[optimizing] Improve x86 shifts""
This reverts commit f9aac1e9f442c2486cd54f045d43e15791601205.
Don't use Location::Any() for the first input if the output is
Location::SameAsFirstInput().
Change-Id: I400834052b114abf0d616da1b4b6506f7bba10ab
|
| 0a18601f141d864a26d4b74ff5613e69ae411483 |
|
13-Apr-2015 |
Roland Levillain <rpl@google.com> |
Exercise the x86 and x86-64 FILD and FISTP instructions.
- Ensure the double- and quadword x87 (FPU) instructions for
integer loading (resp. fildl and fildll) are properly
generated by the x86 and x86-64 generators (resp.
X86Assembler::filds/X86_64Assembler::filds and
X86Assembler::fildl/X86_64Assembler::fildl).
- Ensure the double- and quadword x87 (FPU) instructions for
integer storing & popping (resp. filstpl and fistpll) are
properly generated by the x86 and x86-64 generators (resp.
X86Assembler::fistps/X86_64Assembler::fistps and
X86Assembler::fistpl/X86_64Assembler::fistpl).
These instructions can be used in the implementation of the
long-to-float and long-to-double Dex type conversions.
Change-Id: Iade52a9aee326d189d77d3dbd352a2b5dab52e46
|
| 386ce406f150645158d6067c4e0a36565aefc44f |
|
13-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Optimizing: Fix long-to-fp conversion on x86."
Test fails on arm.
This reverts commit 2d45b4df3838d9c0e5a213305ccd1d7009e01437.
Change-Id: Id2864917b52f7ffba459680303a2d15b34f16a4e
|
| 2d45b4df3838d9c0e5a213305ccd1d7009e01437 |
|
07-Apr-2015 |
Serguei Katkov <serguei.i.katkov@intel.com> |
Optimizing: Fix long-to-fp conversion on x86.
long-to-fp conversion implemented using SSE loses the precision.
The test is included. CL uses FPU to provide the correct result.
Change-Id: I8eaf3c46819a8cb52642a7e7d7c4e3e0edbc88db
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
|
| f9aac1e9f442c2486cd54f045d43e15791601205 |
|
10-Apr-2015 |
Roland Levillain <rpl@google.com> |
Revert "[optimizing] Improve x86 shifts"
This reverts commit 222fcf96c9b73bbb739012575e7e413caf9348ec.
Reverting this CL as it is breaking a few tests (see http://build.chromium.org/p/client.art/builders/host-x86/builds/3251/steps/test%20optimizing/logs/stdio). Will investigate ASAP.
Change-Id: Iddd8363e83a24aa49fbdf0f0c9dc12e63b4848de
|
| 222fcf96c9b73bbb739012575e7e413caf9348ec |
|
30-Mar-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing] Improve x86 shifts
Support memory operands for integer shifts. Generate better code for
long shifts by constants.
Change-Id: Icc92fa1b59cc280d4894af6f054e19b01977d5ce
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| dd97393aca1a3ff2abec4dc4f78d7724300971bc |
|
07-Apr-2015 |
David Srbecky <dsrbecky@google.com> |
Implement CFI for JNI.
CFI is necessary for stack unwinding in gdb, lldb, and libunwind.
Change-Id: I37eb7973f99a6975034cf0e699e138c3a9aba10f
|
| 8c57831b2b07185ee1986b9af68a351e1ca584c3 |
|
07-Apr-2015 |
David Srbecky <dsrbecky@google.com> |
Remove the old CFI infrastructure.
Change-Id: I12a17a8a1c39ffccaa499c328ebac36e4d74dc4e
|
| 58d25fd052e999a24734b0cf856a1563e3d1b2d0 |
|
03-Apr-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing] Implement more x86/x86_64 intrinsics
Implement CAS and bit reverse and byte reverse intrinsics that were
missing from x86 and x86_64 implementations.
Add assembler tests and compareAndSwapLong test.
Change-Id: Iabb2ff46036645df0a91f640288ef06090a64ee3
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| fb8d279bc011b31d0765dc7ca59afea324fd0d0c |
|
01-Apr-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing] Implement x86/x86_64 math intrinsics
Implement floor/ceil/round/RoundFloat on x86 and x86_64.
Implement RoundDouble on x86_64.
Add support for roundss and roundsd on both architectures. Support them
in the disassembler as well.
Add the instruction set features for x86, as the 'round' instruction is
only supported if SSE4.1 is supported.
Fix the tests to handle the addition of passing the instruction set
features to x86 and x86_64.
Add assembler tests for roundsd and roundss to x86_64 assembler tests.
Change-Id: I9742d5930befb0bbc23f3d6c83ce0183ed9fe04f
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 09ed1a3125849ec6ac07cb886e3c502e1dcfada2 |
|
25-Mar-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing] Implement X86 intrinsic support
Implement the supported intrinsics for X86.
Enhance the graph visualizer to print <U> for unallocated locations, to
allow calling the graph dumper from within register allocation for
debugging purposes.
Change-Id: I3b0319eb70a9a4ea228f67065b4c52d13a1ae775
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 234d69d075d1608f80adb647f7935077b62b6376 |
|
09-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "[optimizing] Enable x86 long support.""
This reverts commit 154552e666347d41d95d7619c6ee56249ff4feca.
Change-Id: Idc726551c249a888b7ff5fde8508ae50e81b2e13
|
| 154552e666347d41d95d7619c6ee56249ff4feca |
|
06-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "[optimizing] Enable x86 long support."
Few libcore failures.
This reverts commit b4ba354cf8d22b261205494875cc014f18587b50.
Change-Id: I4a28d853e730dff9b69aec9555505803cf2fcd63
|
| b4ba354cf8d22b261205494875cc014f18587b50 |
|
05-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
[optimizing] Enable x86 long support.
Change-Id: I9006972a65a1f191c45691104a960366747f9d16
|
| ab1eb0d1d047e3478ebb891e5259d2f1d1dd78bd |
|
14-Feb-2015 |
Andreas Gampe <agampe@google.com> |
ART: Templatize IsInt & IsUint
Ensure that things are used correctly.
Change-Id: I76f082b32dcee28bbfb4c519daa401ac595873b3
|
| 1cf95287364948689f6a1a320567acd7728e94a3 |
|
12-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Small optimization for recursive calls: avoid dex cache.
Change-Id: I044757a2f06e535cdc1480c4fc8182b89635baf6
|
| 966c3ae95d3c699ee9fbdbccc1acdaaf02325faf |
|
27-Jan-2015 |
Mark P Mendell <mark.p.mendell@intel.com> |
Revert "Revert "ART: Implement X86 hard float (Quick/JNI/Baseline)""
This reverts commit 949c91fb91f40a4a80b2b492913cf8541008975e.
This time, don't clobber EBX before saving it.
Redo some of the macros to make register usage explicit.
Change-Id: I8db8662877cd006816e16a28f42444ab7c36bfef
|
| 949c91fb91f40a4a80b2b492913cf8541008975e |
|
27-Jan-2015 |
Vladimir Marko <vmarko@google.com> |
Revert "ART: Implement X86 hard float (Quick/JNI/Baseline)"
And the 3 Mac build fixes. Fix conflicts in context_x86.* .
This reverts commits
3d2c8e74c27efee58e24ec31441124f3f21384b9 ,
34eda1dd66b92a361797c63d57fa19e83c08a1b4 ,
f601d1954348b71186fa160a0ae6a1f4f1c5aee6 ,
bc503348a1da573488503cc2819c9e30807bea31 .
Bug: 19150481
Change-Id: I6650ee30a7d261159380fe2119e14379e4dc9970
|
| 3d2c8e74c27efee58e24ec31441124f3f21384b9 |
|
13-Jan-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
ART: Implement X86 hard float (Quick/JNI/Baseline)
Use XMM0-XMM3 as parameter registers for float/double on X86. X86_64
already uses XMM0-XMM7 for parameters.
Change the 'hidden' argument register from XMM0 to XMM7 to avoid a
conflict.
Add support for FPR save/restore in runtime/arch/x86.
Minimal support for Optimizing baseline compiler.
Bump the version in runtime/oat.h because this is an ABI change.
Change-Id: Ia6fe150e8488b9e582b0178c0dda65fc81d5a8ba
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 24f2dfae084b2382c053f5d688fd6bb26cb8a328 |
|
15-Jan-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
[optimizing compiler] Implement inline x86 FP '%'
Replace the calls to fmod/fmodf by inline code as is done in the Quick
compiler.
Remove the quick fmod/fmodf runtime entries, as they are no longer in
use.
64 bit code generator Move() routine needed to be enhanced to handle
constants, as Location::Any() allows them to be generated.
Change-Id: I6b6a42f6faeed4b0b3c940453e487daf5b25d184
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 0f9b03c65e0ee8bdc5ddf58af100f5fc356cc98b |
|
12-Jan-2015 |
Vladimir Marko <vmarko@google.com> |
Revert "ART: Implement hard float for X86"
This reverts commit 59b9cf7ec0ccc13df91be0bd5c723b8c52410739.
Change-Id: I08333b528032480def474286dc368d916a07e17f
|
| 59b9cf7ec0ccc13df91be0bd5c723b8c52410739 |
|
09-Jan-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
ART: Implement hard float for X86
Use XMM0-XMM3 as parameter registers for float/double on X86. X86_64
already uses XMM0-XMM7 for parameters.
Change the 'hidden' argument register from XMM0 to XMM7 to avoid a
conflict.
This change was requested to simplify the Optimizing compiler
implementation.
Change-Id: I89ba8ade99b9a8a5b1ad1ee5f5cbfd33d656bfaa
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
|
| 140c2c7ca3794210a5376f1b942e12d8b7795faf |
|
06-Jan-2015 |
Andreas Gampe <agampe@google.com> |
ART: Remove unused parts of x86 assemblers
These functions are neither used nor functional.
Change-Id: Ib6d0761388a45662ad9448ceb2c539c6f0b77f23
|
| 52c489645b6e9ae33623f1ec24143cde5444906e |
|
16-Dec-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add support for volatile
- for backends: arm, x86, x86_64
- added necessary instructions to assemblies
- clean up code gen for field set/get
- fixed InstructionDataEquals for some instructions
- fixed comments in compiler_enums
* 003-opcode test verifies basic volatile functionality
Change-Id: I144393efa312dfb2c332cb84056b00edffee338a
|
| 5b4b898ed8725242ee6b7229b94467c3ea3054c8 |
|
18-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Don't block quick callee saved registers for optimizing."
X64 has one libcore test failing, and codegen_test on
arm is failing.
This reverts commit 6004796d6c630696127df2494dcd4f30d1367a34.
Change-Id: I20e00431fa18e11ce4c0cb6fffa91977fa8e9b4f
|
| 6004796d6c630696127df2494dcd4f30d1367a34 |
|
15-Dec-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Don't block quick callee saved registers for optimizing.
This change builds on:
https://android-review.googlesource.com/#/c/118983/
- Also fix x86_64 assembler bug triggered by this change.
- Fix (and improve) x86's backend byte register usage.
- Fix a bug in baseline register allocator: a fixed
out register must prevent inputs from allocating it.
Change-Id: I4883862e29b4e4b6470f1823cf7eab7e7863d8ad
|
| ddb7df25af45d7cd19ed1138e537973735cc78a5 |
|
25-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
Adds:
- float comparison for arm, x86, x86_64 backends.
- ucomis{s,d} assembly to x86 and x86_64.
- vmstat assebmly for thumb2
- new assembly tests
Change-Id: Ie3e19d0c08b3b875cd0a4be4ee4e9c8a4a076290
|
| 647b9ed41cdb7cf302fd356627a3ba372419b78c |
|
27-Nov-2014 |
Roland Levillain <rpl@google.com> |
Add support for long-to-double in the optimizing compiler.
- Add support for the long-to-double Dex instruction in the
optimizing compiler.
- Enable requests of temporary FPU (double) registers during
code generation.
- Fix art::x86::X86Assembler::LoadLongConstant and extend
it to int64_t values.
- Have art::x86_64::X86_64Assembler::cvtsi2sd work with
64-bit operands.
- Generate x86, x86-64 and ARM (but not ARM64) code for
long to double HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: Ie73d9e5e25bd2e15f585c371e8fc2dcb83438ccd
|
| 91debbc3da3e3376416e4394155d9f9e355255cb |
|
26-Nov-2014 |
Calin Juravle <calin@google.com> |
Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Fails on arm due to missing vmrs op after vcmp. I revert this instead of pushing the fix because I don't understand yet why it compiles with run-test but not with dex2oat.
This reverts commit fd861249f31ab360c12dd1ffb131d50f02b0bfc6.
Change-Id: Idc2d30f6a0f39ddd3596aa18a532ae90f8aaf62f
|
| fd861249f31ab360c12dd1ffb131d50f02b0bfc6 |
|
25-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
- adds float comparison for arm, x86, x86_64 backends.
- adds ucomis{s,d} assembly to x86 and x86_64.
Change-Id: I232d2b6e9ecf373beb5cc63698dd97a658ff9c83
|
| 799f506b8d48bcceef5e6cf50f3f5eb6bcea05e1 |
|
26-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Fails on x86_64 and target.
This reverts commit cea28ec4b9e94ec942899acf1dbf20f8999b36b4.
Change-Id: I30c1d188c7ecfe765f137a307022ede84f15482c
|
| cea28ec4b9e94ec942899acf1dbf20f8999b36b4 |
|
25-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
- adds float comparison for arm, x86, x86_64 backends.
- adds ucomis{s,d} assembly to x86 and x86_64.
Change-Id: Ie91e04bfb402025073054f3803a3a569e4705caa
|
| 9aec02fc5df5518c16f1e5a9b6cb198a192db973 |
|
19-Nov-2014 |
Calin Juravle <calin@google.com> |
[optimizing compiler] Add shifts
Added SHL, SHR, USHR for arm, x86, x86_64.
Change-Id: I971f594e270179457e6958acf1401ff7630df07e
|
| 8366ca0d7ba3b80a2d5be65ba436446cc32440bd |
|
17-Nov-2014 |
Elliott Hughes <enh@google.com> |
Fix the last users of TARGET_CPU_SMP.
Everyone else assumes SMP.
Change-Id: I7ff7faef46fbec6c67d6e446812d599e473cba39
|
| 9574c4b5f5ef039d694ac12c97e25ca02eca83c0 |
|
12-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement and/or/xor in optimizing.
Change-Id: I7cf6da1fd334a7177a5580931b8f174dd40b7cec
|
| 13735955f39b3b304c37d2b2840663c131262c18 |
|
08-Oct-2014 |
Ian Rogers <irogers@google.com> |
stdint types all the way!
Change-Id: I4e4ef3a2002fc59ebd9097087f150eaf3f2a7e08
|
| 7fb49da8ec62e8a10ed9419ade9f32c6b1174687 |
|
06-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add support for floats and doubles.
- Follows Quick conventions.
- Currently only works with baseline register allocator.
Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
|
| b6e7206ad7a426adda9cfd649a4ef969607d79d6 |
|
07-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix movw on x86/x86_64 to accept any 16bits immediate.
Change-Id: I282eece0cd497431f207cec61852b4585ed3655c
|
| 26a25ef62a13f409f941aa39825a51b4d6f0f047 |
|
30-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add a prepare for register allocation pass.
- Currently the pass just changes the uses of checks to the
actual values.
- Also optimize array access, now that inputs can be constants.
- And fix another bug in the register allocator reveiled by
this change.
Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
|
| 3c04974a90b0e03f4b509010bff49f0b2a3da57f |
|
24-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Optimize suspend checks in optimizing compiler.
- Remove the ones added during graph build (they were added
for the baseline code generator).
- Emit them at loop back edges after phi moves, so that the test
can directly jump to the loop header.
- Fix x86 and x86_64 suspend check by using cmpw instead of cmpl.
Change-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a
|
| e3ea83811d47152c00abea24a9b420651a33b496 |
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08-Aug-2014 |
Yevgeny Rouban <yevgeny.y.rouban@intel.com> |
ART source line debug info in OAT files
OAT files have source line information enough for ART runtime needs like
jump to/from interpreter and thread suspension. But this information
is not enough for finer grained source level debugging and low-level
profiling (VTune or perf).
This patch adds to OAT files two additional sections:
.debug_line - DWARF formatted Elf32 section with detailed source line
information (mapping from native PC to Java source lines).
In addition to the debugging symbols added using the dex2oat option
--include-debug-symbols, the source line information is added to
the section .debug_line.
The source line info can be read by many Elf reading tools like objdump,
readelf, dwarfdump, gdb, perf, VTune, ...
gdb can use this debug line information in x86. In 64-bit mode
the information can be used if the oat file is mapped in the lower
address space (address has higher 32 bits zeroed). Relocation works.
Testing:
1. art/test/run-test --host --gdb [--64] 001-HelloWorld
2. in gdb: break Main.java:19
3. in gdb: break Runtime.java:111
4. in gdb: run - stops at void java.lang.Runtime.<init>()
5. in gdb: backtrace - shows call stack down to main()
6. in gdb: continue - stops at void Main.main() (only in 32-bit mode)
7. in gdb: backtrace - shows call stack down to main()
8. objdump -W <oat-file> - addresses are from VMA range of .text
section reported by objdump -h <file>
9. dwarfdump -ka <oat-file> - no errors expected
Size of aosp-x86-eng boot.oat increased by 11% from 80.5Mb to 89.2Mb
with two sections added .debug_line (7.2Mb) and .rel.debug (1.5Mb).
Change-Id: Ib8828832686e49782a63d5529008ff4814ed9cda
Signed-off-by: Yevgeny Rouban <yevgeny.y.rouban@intel.com>
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| 547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52 |
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05-Aug-2014 |
Tong Shen <endlessroad@google.com> |
Emit CFI for x86 & x86_64 JNI compiler.
Now for host-side x86 & x86_64 ART, we are able to get complete stacktrace with even mixed C/C++ & Java stack frames.
Testing:
1. art/test/run-test --host --gdb [--64] --no-relocate 005
2. In gdb, run 'b art::Class_classForName' which is implementation of a Java native method, then 'r'
3. In gdb, run 'bt'. You should see stack frames down to main()
Change-Id: I2d17e9aa0f6d42d374b5362a15ea35a2fce96302
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| f12feb8e0e857f2832545b3f28d31bad5a9d3903 |
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17-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Stack overflow checks and NPE checks for optimizing.
Change-Id: I59e97448bf29778769b79b51ee4ea43f43493d96
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| ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
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03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE
Merge ART from AOSP to lmp-preview-dev.
Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
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| cf4035a4c41ccfcc3e89a0cee25f5218a11b0705 |
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29-May-2014 |
Andreas Gampe <agampe@google.com> |
ART: Use StackReference in Quick Stack Frame
The method reference at the bottom of a quick frame is a stack
reference and not a native pointer. This is important for 64b
architectures, where the notions do not coincide.
Change key methods to have StackReference<mirror::ArtMethod>*
parameter instead of mirror::ArtMethod**. Make changes to
invoke stubs for 64b archs, change the frame setup for JNI code
(both generic JNI and compilers), tie up loose ends.
Tested on x86 and x86-64 with host tests. On x86-64, tests succeed
with jni compiler activated. x86-64 QCG was not tested.
Tested on ARM32 with device tests.
Fix ARM64 not saving x19 (used for wSUSPEND) on upcalls.
Tested on ARM64 in interpreter-only + generic-jni mode.
Fix ARM64 JNI Compiler to work with the CL.
Tested on ARM64 in interpreter-only + jni compiler.
Change-Id: I77931a0cbadd04d163b3eb8d6f6a6f8740578f13
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| eb8167a4f4d27fce0530f6724ab8032610cd146b |
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08-May-2014 |
Mathieu Chartier <mathieuc@google.com> |
Add Handle/HandleScope and delete SirtRef.
Delete SirtRef and replaced it with Handle. Handles are value types
which wrap around StackReference*.
Renamed StackIndirectReferenceTable to HandleScope.
Added a scoped handle wrapper which wraps around an Object** and
restores it in its destructor.
Renamed Handle::get -> Get.
Bug: 8473721
Change-Id: Idbfebd4f35af629f0f43931b7c5184b334822c7a
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| b55f835d66a61e5da6fc1895ba5a0482868c9552 |
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07-Apr-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Test control flow instruction with optimizing compiler.
Add support for basic instructions to implement these tests.
Change-Id: I3870bf9301599043b3511522bb49dc6364c9b4c0
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| 790a6b7312979513710c366b411ba6791ddf78c2 |
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01-Apr-2014 |
Ian Rogers <irogers@google.com> |
Calling convention support for cross 64/32 compilation.
Add REX support for x86-64 operands.
Change-Id: I093ae26fb8c111d54b8c72166f054984564c04c6
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| dd7624d2b9e599d57762d12031b10b89defc9807 |
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15-Mar-2014 |
Ian Rogers <irogers@google.com> |
Allow mixing of thread offsets between 32 and 64bit architectures.
Begin a more full implementation x86-64 REX prefixes.
Doesn't implement 64bit thread offset support for the JNI compiler.
Change-Id: If9af2f08a1833c21ddb4b4077f9b03add1a05147
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| 8ccc3f5d06fd217cdaabd37e743adab2031d3720 |
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19-Mar-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add support for invoke-static in optimizing compiler.
Support is limited to calls without parameters and returning
void. For simplicity, we currently follow the Quick ABI.
Change-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5
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| fca82208f7128fcda09b6a4743199308332558a2 |
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21-Mar-2014 |
Dmitry Petrochenko <dmitry.petrochenko@intel.com> |
x86_64: JNI compiler
Passed all tests from jni_compiler_test and art/test on host with jni_copiler.
Incoming argument spill is enabled, entry_spills refactored. Now each entry spill
contains data type size (4 or 8) and offset which should be used for spill.
Assembler REX support implemented in opcodes used in JNI compiler.
Please note, JNI compiler is not enabled by default yet (see compiler_driver.cc:1875).
Change-Id: I5fd19cca72122b197aec07c3708b1e80c324be44
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
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| befbd5731ecca08f08780ee28a913d08ffb14656 |
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06-Mar-2014 |
Ian Rogers <irogers@google.com> |
Fix host architecture for 64bit.
Also, hack x86 assembler for use as a x86-64 trampoline compiler's assembler.
Implement missing x86-64 quick resolution trampoline.
Add x86-64 to the quick elf writer.
Change-Id: I08216c67014a83492ada12898ab8000218ba7bb4
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| e63a745f26fec5a5b4162fc83f6e88a1f696c30c |
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27-Feb-2014 |
Hiroshi Yamauchi <yamauchi@google.com> |
Make heap reference poisoning work with the interpreter.
It is disabled by default.
Bug: 12687968
Change-Id: Iee0cad647f341a7b566f4cf74c2770d1c19312c9
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| ef7d42fca18c16fbaf103822ad16f23246e2905d |
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06-Jan-2014 |
Ian Rogers <irogers@google.com> |
Object model changes to support 64bit.
Modify mirror objects so that references between them use an ObjectReference
value type rather than an Object* so that functionality to compress larger
references can be captured in the ObjectRefererence implementation.
ObjectReferences are 32bit and all other aspects of object layout remain as
they are currently.
Expand fields in objects holding pointers so they can hold 64bit pointers. Its
expected the size of these will come down by improving where we hold compiler
meta-data.
Stub out x86_64 architecture specific runtime implementation.
Modify OutputStream so that reads and writes are of unsigned quantities.
Make the use of portable or quick code more explicit.
Templatize AtomicInteger to support more than just int32_t as a type.
Add missing, and fix issues relating to, missing annotalysis information on the
mutator lock.
Refactor and share implementations for array copy between System and uses
elsewhere in the runtime.
Fix numerous 64bit build issues.
Change-Id: I1a5694c251a42c9eff71084dfdd4b51fff716822
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| 834b394ee759ed31c5371d8093d7cd8cd90014a8 |
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31-Jul-2013 |
Brian Carlstrom <bdc@google.com> |
Merge remote-tracking branch 'goog/dalvik-dev' into merge-art-to-dalvik-dev
Change-Id: I323e9e8c29c3e39d50d9aba93121b26266c52a46
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| 7655f29fabc0a12765de828914a18314382e5a35 |
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29-Jul-2013 |
Ian Rogers <irogers@google.com> |
Portable refactorings.
Separate quick from portable entrypoints.
Move architectural dependencies into arch.
Change-Id: I9adbc0a9782e2959fdc3308215f01e3107632b7c
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| 166db04e259ca51838c311891598664deeed85ad |
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26-Jul-2013 |
Ian Rogers <irogers@google.com> |
Move assembler out of runtime into compiler/utils.
Other directory layout bits of clean up. There is still work to separate quick
and portable in some files (e.g. argument visitor, proxy..).
Change-Id: If8fecffda8ba5c4c47a035f0c622c538c6b58351
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