Searched defs:shifter (Results 1 - 3 of 3) sorted by relevance
/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1299 void X86Assembler::shll(Register operand, Register shifter) { argument 1300 EmitGenericShift(4, Operand(operand), shifter); 1309 void X86Assembler::shll(const Address& address, Register shifter) { argument 1310 EmitGenericShift(4, address, shifter); 1319 void X86Assembler::shrl(Register operand, Register shifter) { argument 1320 EmitGenericShift(5, Operand(operand), shifter); 1329 void X86Assembler::shrl(const Address& address, Register shifter) { argument 1330 EmitGenericShift(5, address, shifter); 1339 void X86Assembler::sarl(Register operand, Register shifter) { argument 1340 EmitGenericShift(7, Operand(operand), shifter); 1349 sarl(const Address& address, Register shifter) argument 1354 shld(Register dst, Register src, Register shifter) argument 1372 shrd(Register dst, Register src, Register shifter) argument 1696 EmitGenericShift(int reg_or_opcode, const Operand& operand, Register shifter) argument [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_x86.cc | 2858 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) { argument 2860 __ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter); 2861 __ shll(loc.AsRegisterPairLow<Register>(), shifter); 2862 __ testl(shifter, Immediate(32)); 2890 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register shifter) { argument 2892 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter); 2893 __ sarl(loc.AsRegisterPairHigh<Register>(), shifter); 2894 __ testl(shifter, Immediate(32)); 2925 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, Register shifter) { argument 2927 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter); [all...] |
/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 1799 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { argument 1800 EmitGenericShift(false, 4, operand, shifter); 1804 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { argument 1805 EmitGenericShift(true, 4, operand, shifter); 1819 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { argument 1820 EmitGenericShift(false, 5, operand, shifter); 1824 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { argument 1825 EmitGenericShift(true, 5, operand, shifter); 1834 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { argument 1835 EmitGenericShift(false, 7, operand, shifter); 1844 sarq(CpuRegister operand, CpuRegister shifter) argument 2199 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument [all...] |
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