/art/compiler/utils/ |
H A D | assembler_thumb_test.cc | 159 #define __ assembler-> macro 164 __ mov(R0, ShifterOperand(R1)); 165 __ mov(R8, ShifterOperand(R9)); 167 __ mov(R0, ShifterOperand(1)); 168 __ mov(R8, ShifterOperand(9)); 170 size_t cs = __ CodeSize(); 173 __ FinalizeInstructions(code); 182 __ mov(R0, ShifterOperand(R1)); 183 __ mov(R8, ShifterOperand(R9)); 185 size_t cs = __ CodeSiz 1336 #undef __ macro [all...] |
/art/compiler/jni/quick/ |
H A D | jni_compiler.cc | 44 #define __ jni_asm-> macro 108 __ BuildFrame(frame_size, mr_conv->MethodRegister(), callee_save_regs, mr_conv->EntrySpills()); 114 __ StoreImmediateToFrame(main_jni_conv->HandleScopeNumRefsOffset(), 119 __ CopyRawPtrFromThread64(main_jni_conv->HandleScopeLinkOffset(), 122 __ StoreStackOffsetToThread64(Thread::TopHandleScopeOffset<8>(), 126 __ CopyRawPtrFromThread32(main_jni_conv->HandleScopeLinkOffset(), 129 __ StoreStackOffsetToThread32(Thread::TopHandleScopeOffset<4>(), 143 __ LoadRef(main_jni_conv->InterproceduralScratchRegister(), 145 __ VerifyObject(main_jni_conv->InterproceduralScratchRegister(), false); 146 __ StoreRe [all...] |
/art/compiler/trampolines/ |
H A D | trampoline_compiler.cc | 27 #define __ assembler-> macro 38 __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); 41 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset().Int32Value()); 42 __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); 45 __ LoadFromOffset(kLoadWord, PC, R9, offset.Int32Value()); 47 __ bkpt(0); 65 __ JumpTo(Arm64ManagedRegister::FromXRegister(X0), Offset(offset.Int32Value()), 70 __ LoadRawPtr(Arm64ManagedRegister::FromXRegister(IP1), 74 __ JumpTo(Arm64ManagedRegister::FromXRegister(IP1), Offset(offset.Int32Value()), 79 __ JumpT [all...] |
/art/runtime/hprof/ |
H A D | hprof.cc | 407 #define __ output_-> macro 526 __ AddU4(nextSerialNumber++); 527 __ AddObjectId(c); 528 __ AddU4(kHprofNullStackTrace); 529 __ AddStringId(LookupClassNameId(c)); 544 __ AddU4(id); 545 __ AddUtf8String(string.c_str()); 605 __ AddU1List(reinterpret_cast<const uint8_t*>(magic), sizeof(magic)); 612 __ AddU4(sizeof(uint32_t)); 620 __ AddU [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_arm.cc | 56 #define __ reinterpret_cast<ArmAssembler*>(codegen->GetAssembler())-> macro 65 __ Bind(GetEntryLabel()); 81 __ Bind(GetEntryLabel()); 98 __ Bind(GetEntryLabel()); 104 __ b(GetReturnLabel()); 106 __ b(arm_codegen->GetLabelOf(successor_)); 141 __ Bind(GetEntryLabel()); 178 __ Bind(GetEntryLabel()); 182 __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); 195 __ 316 #undef __ macro 318 #undef __ macro 319 #define __ macro [all...] |
H A D | intrinsics_x86_64.cc | 55 #define __ reinterpret_cast<X86_64Assembler*>(codegen->GetAssembler())-> macro 75 __ movl(trg_reg, CpuRegister(RAX)); 82 __ movq(trg_reg, CpuRegister(RAX)); 94 __ movsd(trg_reg, XmmRegister(XMM0)); 101 __ movss(trg_reg, XmmRegister(XMM0)); 125 __ Bind(GetEntryLabel()); 148 __ jmp(GetExitLabel()); 158 #undef __ macro 159 #define __ assembler-> macro 180 __ mov [all...] |
H A D | code_generator_x86.cc | 46 #define __ reinterpret_cast<X86Assembler*>(codegen->GetAssembler())-> macro 53 __ Bind(GetEntryLabel()); 54 __ fs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(kX86WordSize, pThrowNullPointer))); 68 __ Bind(GetEntryLabel()); 69 __ fs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(kX86WordSize, pThrowDivZero))); 83 __ Bind(GetEntryLabel()); 85 __ negl(reg_); 87 __ movl(reg_, Immediate(0)); 89 __ jmp(GetExitLabel()); 109 __ Bin 325 #undef __ macro 326 #define __ macro [all...] |
H A D | code_generator_x86_64.cc | 49 #define __ reinterpret_cast<X86_64Assembler*>(codegen->GetAssembler())-> macro 56 __ Bind(GetEntryLabel()); 57 __ gs()->call( 72 __ Bind(GetEntryLabel()); 73 __ gs()->call( 89 __ Bind(GetEntryLabel()); 92 __ negl(cpu_reg_); 94 __ movl(cpu_reg_, Immediate(0)); 100 __ negq(cpu_reg_); 102 __ xor 345 #undef __ macro 346 #define __ macro [all...] |
H A D | intrinsics_arm.cc | 41 #define __ codegen->GetAssembler()-> macro 59 __ mov(trg_reg_lo, ShifterOperand(res_reg_lo)); 60 __ mov(trg_reg_hi, ShifterOperand(res_reg_hi)); 65 __ mov(trg_reg_hi, ShifterOperand(res_reg_hi)); 66 __ mov(trg_reg_lo, ShifterOperand(res_reg_lo)); 72 __ mov(trg_reg, ShifterOperand(res_reg)); 97 __ Bind(GetEntryLabel()); 120 __ b(GetExitLabel()); 130 #undef __ macro 138 #define __ assemble macro [all...] |
H A D | code_generator_mips64.cc | 106 #define __ down_cast<CodeGeneratorMIPS64*>(codegen)->GetAssembler()-> macro 120 __ Bind(GetEntryLabel()); 151 __ Bind(GetEntryLabel()); 178 __ Bind(GetEntryLabel()); 182 __ LoadConst32(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); 201 __ B(GetExitLabel()); 230 __ Bind(GetEntryLabel()); 234 __ LoadConst32(calling_convention.GetRegisterAt(0), instruction_->GetStringIndex()); 246 __ B(GetExitLabel()); 261 __ Bin 416 #undef __ macro 417 #define __ macro [all...] |
H A D | intrinsics_x86.cc | 59 #define __ reinterpret_cast<X86Assembler*>(codegen->GetAssembler())-> macro 79 __ movl(target_reg, EAX); 87 __ movl(target_reg_lo, EAX); 90 __ movl(target_reg_hi, EDX); 102 __ movsd(target_reg, XMM0); 109 __ movss(target_reg, XMM0); 134 __ Bind(GetEntryLabel()); 157 __ jmp(GetExitLabel()); 167 #undef __ macro 168 #define __ assemble macro [all...] |
H A D | code_generator_arm64.cc | 38 #ifdef __ 104 #define __ down_cast<CodeGeneratorARM64*>(codegen)->GetVIXLAssembler()-> macro 119 __ Bind(GetEntryLabel()); 145 __ Bind(GetEntryLabel()); 170 __ Bind(GetEntryLabel()); 174 __ Mov(calling_convention.GetRegisterAt(0).W(), cls_->GetTypeIndex()); 193 __ B(GetExitLabel()); 222 __ Bind(GetEntryLabel()); 226 __ Mov(calling_convention.GetRegisterAt(0).W(), instruction_->GetStringIndex()); 234 __ 376 #undef __ macro 420 #undef __ macro 421 #define __ macro 2728 #undef __ macro [all...] |
H A D | intrinsics_arm64.cc | 66 #define __ codegen->GetAssembler()->vixl_masm_-> macro 81 __ Mov(trg_reg, res_reg, kDiscardForSameWReg); 85 __ Fmov(trg_reg, res_reg); 106 __ Bind(GetEntryLabel()); 129 __ B(GetExitLabel()); 139 #undef __ macro 147 #define __ masm-> macro 168 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), 175 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), 223 __ Rev1 [all...] |
/art/compiler/utils/arm/ |
H A D | assembler_thumb2_test.cc | 214 #define __ GetAssembler()-> macro 215 __ eor(arm::R1, arm::R1, arm::ShifterOperand(arm::R0)); 216 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R1)); 217 __ eor(arm::R1, arm::R8, arm::ShifterOperand(arm::R0)); 218 __ eor(arm::R8, arm::R1, arm::ShifterOperand(arm::R0)); 219 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R8)); 231 __ subs(arm::R1, arm::R0, arm::ShifterOperand(42)); 232 __ sub(arm::R1, arm::R0, arm::ShifterOperand(42)); 241 __ adds(arm::R1, arm::R0, arm::ShifterOperand(42)); 242 __ ad [all...] |
H A D | assembler_arm.cc | 852 #define __ sp_asm-> macro 853 __ Bind(&entry_); 855 __ DecreaseFrameSize(stack_adjust_); 859 __ mov(R0, ShifterOperand(scratch_.AsCoreRegister())); 861 __ LoadFromOffset(kLoadWord, R12, TR, QUICK_ENTRYPOINT_OFFSET(4, pDeliverException).Int32Value()); 862 __ blx(R12); 864 __ bkpt(0); 865 #undef __ macro
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/art/build/ |
H A D | Android.cpplint.mk | 39 art_cpplint_touch := $$(OUT_CPPLINT)/$$(subst /,__,$$(art_cpplint_file))
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/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 968 #define __ sp_asm-> macro 969 __ Bind(&entry_, false); 971 __ DecreaseFrameSize(stack_adjust_); 975 __ Move(A0, scratch_.AsCoreRegister()); 977 __ LoadFromOffset(kLoadWord, T9, S1, QUICK_ENTRYPOINT_OFFSET(4, pDeliverException).Int32Value()); 978 __ Jr(T9); 980 __ Break(); 981 #undef __ macro
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 1537 #define __ sp_asm-> macro 1538 __ Bind(&entry_); 1540 __ DecreaseFrameSize(stack_adjust_); 1544 __ Move(A0, scratch_.AsGpuRegister()); 1546 __ LoadFromOffset(kLoadDoubleword, T9, S1, 1549 __ Jr(T9); 1551 __ Break(); 1552 #undef __ macro
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 2174 #define __ sp_asm-> macro 2175 __ Bind(&entry_); 2178 __ DecreaseFrameSize(stack_adjust_); 2181 __ fs()->movl(EAX, Address::Absolute(Thread::ExceptionOffset<4>())); 2182 __ fs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(4, pDeliverException))); 2184 __ int3(); 2185 #undef __ macro
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2871 #define __ sp_asm-> macro 2872 __ Bind(&entry_); 2875 __ DecreaseFrameSize(stack_adjust_); 2878 __ gs()->movq(CpuRegister(RDI), Address::Absolute(Thread::ExceptionOffset<8>(), true)); 2879 __ gs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(8, pDeliverException), true)); 2881 __ int3(); 2882 #undef __ macro
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