/art/compiler/dex/quick/ |
H A D | gen_loadstore.cc | 60 op_size = k64; 94 LoadBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest, k64, kNotVolatile); local 271 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); local 335 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); local
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H A D | mir_to_lir.cc | 147 LoadBaseDisp(TargetPtrReg(kSp), offset, reg_arg, wide ? k64 : k32, kNotVolatile); 196 OpSize op_size = rl_dest.wide ? k64 : (rl_dest.ref ? kReference : k32); 214 (arg.IsWide() && reg_arg.GetWideKind() == kWide) ? k64 : k32; 226 (arg.IsWide() && reg_arg.GetWideKind() == kWide) ? k64 : k32; 256 size = in_to_reg_storage_mapping_.GetShorty(data.src_arg).IsFP() ? kDouble : k64; 328 size = in_to_reg_storage_mapping_.GetShorty(data.src_arg).IsFP() ? kDouble : k64; 726 GenArrayGet(opt_flags, rl_dest.fp ? kDouble : k64, rl_src[0], rl_src[1], rl_dest, 3); 747 GenArrayPut(opt_flags, rl_src[0].fp ? kDouble : k64, rl_src[1], rl_src[2], rl_src[0], 3, false); 789 GenIGet(mir, opt_flags, k64, Primitive::kPrimLong, rl_dest, rl_src[0]); 824 GenIPut(mir, opt_flags, rl_src[0].fp ? kDouble : k64, rl_sr [all...] |
H A D | gen_invoke.cc | 471 StoreBaseDisp(TargetPtrReg(kSp), offset, reg, t_loc->wide ? k64 : k32, kNotVolatile); 481 LoadBaseDisp(TargetPtrReg(kSp), offset, t_loc->reg, t_loc->wide ? k64 : k32, 706 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); local 805 StoreBaseDisp(TargetPtrReg(kSp), out_offset, rl_arg.reg, k64, kNotVolatile); local 808 StoreBaseDisp(TargetPtrReg(kSp), out_offset, regWide, k64, kNotVolatile); local 850 StoreBaseDisp(TargetPtrReg(kSp), out_offset, rl_arg.reg, k64, kNotVolatile); local 1459 LoadBaseIndexed(rl_object.reg, rl_offset.reg, rl_result.reg, 0, k64); 1463 LoadBaseDisp(rl_temp_offset, 0, rl_result.reg, k64, kNotVolatile); 1507 StoreBaseIndexed(rl_object.reg, rl_offset.reg, rl_value.reg, 0, k64); 1511 StoreBaseDisp(rl_temp_offset, 0, rl_value.reg, k64, kNotVolatil [all...] |
H A D | dex_file_method_inliner.cc | 366 INTRINSIC(JavaLangLong, ReverseBytes, J_J, kIntrinsicReverseBytes, k64), 369 INTRINSIC(JavaLangLong, Reverse, J_J, kIntrinsicReverseBits, k64), 424 INTRINSIC(LibcoreIoMemory, PeekLongNative, J_J, kIntrinsicPeek, k64), 428 INTRINSIC(LibcoreIoMemory, PokeLongNative, JJ_V, kIntrinsicPoke, k64),
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H A D | gen_common.cc | 737 case k64: 982 case k64: 2263 case k64:
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H A D | ralloc_util.cc | 746 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); local 754 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); local
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H A D | mir_to_lir.h | 1178 return size == k64 || size == kDouble;
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/art/compiler/dex/quick/x86/ |
H A D | target_x86.cc | 743 OpSize size = cu_->target64 ? k64 : k32; 763 OpSize size = cu_->target64 ? k64 : k32; 785 StoreBaseDisp(rs_rSP, offset, RegStorage::FloatSolo64(reg), k64, kNotVolatile); 802 k64, kNotVolatile); 829 if (size == k64 || size == kDouble) { 1729 case k64: 1750 case k64: 1785 case k64: 1864 case k64: 1901 case k64 [all...] |
H A D | fp_x86.cc | 165 StoreBaseDisp(rs_rSP, src_v_reg_offset, rl_src.reg, k64, kNotVolatile); 199 LoadBaseDisp(rs_rSP, dest_v_reg_offset, rl_result.reg, k64, kNotVolatile); 387 StoreBaseDisp(rs_rSP, src1_v_reg_offset, rl_src1.reg, is_double ? k64 : k32, 398 StoreBaseDisp(rs_rSP, src2_v_reg_offset, rl_src2.reg, is_double ? k64 : k32, 458 LoadBaseDisp(rs_rSP, dest_v_reg_offset, rl_result.reg, k64, kNotVolatile);
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H A D | utility_x86.cc | 649 bool is64bit = ((size == k64) || (size == kDouble)); 652 case k64: 798 bool is64bit = (size == k64) || (size == kDouble); 803 case k64:
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H A D | int_x86.cc | 1032 RegLocation rl_dest = size == k64 ? InlineTargetWide(info) : InlineTarget(info); 1048 if (size == k64) { 1068 if (size == k64) { 1304 RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info); 1310 RegLocation rl_i = (size == k64) ? LoadValueWide(rl_src_i, kCoreReg) 1313 if (size == k64) { 2453 if (size == k64 || size == kDouble) { 2483 if ((size == k64) || (size == kDouble)) { 2500 if (size == k64 || size == kDouble) { 2529 if ((size == k64) || (siz [all...] |
/art/compiler/dex/quick/mips/ |
H A D | utility_mips.cc | 607 case k64: 708 case k64: 853 if (UNLIKELY(is_volatile == kVolatile && (size == k64 || size == kDouble)) 862 size = cu_->target64 ? k64 : k32; 885 case k64: 1012 if (UNLIKELY(is_volatile == kVolatile && (size == k64 || size == kDouble) && 1020 size = cu_->target64 ? k64 : k32;
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H A D | int_mips.cc | 678 if (size == k64 || size == kDouble) { 701 if ((size == k64) || (size == kDouble)) { 755 if (size == k64 || size == kDouble) { 794 if ((size == k64) || (size == kDouble)) {
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H A D | target_mips.cc | 892 if (size == k64 || size == kDouble) {
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/art/compiler/dex/quick/arm/ |
H A D | utility_arm.cc | 763 DCHECK((size == k64) || (size == kDouble)); 829 DCHECK((size == k64) || (size == kDouble)); 922 case k64: 1037 if (is_volatile == kVolatile && (size == k64 || size == kDouble) && 1072 case k64: 1180 if (is_volatile == kVolatile && (size == k64 || size == kDouble) &&
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H A D | int_arm.cc | 791 if (size == k64) { 815 if (size == k64) { 1468 if (size == k64 || size == kDouble) {
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H A D | target_arm.cc | 569 if (size == k64 || size == kDouble) {
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/art/compiler/dex/quick/arm64/ |
H A D | utility_arm64.cc | 1041 DCHECK(size == k64 || size == kDouble); 1059 case k64: 1126 DCHECK(size == k64 || size == kDouble); 1144 case k64: 1201 case k64: 1297 case k64:
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H A D | int_arm64.cc | 710 RegLocation rl_dest = (size == k64) ? InlineTargetWide(info) : InlineTarget(info); 715 if (size == k64) { 730 if (size == k64) { 911 LoadBaseIndexed(rs_src, rs_length, rs_tmp, 0, k64); 912 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, k64); 960 LIR* ldr = LoadBaseDisp(r_dest, 0, r_dest, wide ? k64 : kReference, kNotVolatile); 1266 if (size == k64 || size == kDouble) {
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H A D | target_arm64.cc | 788 LoadBaseDisp(rs_xSELF, GetThreadOffset<8>(trampoline).Int32Value(), rs_xLR, k64, kNotVolatile);
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/art/compiler/dex/ |
H A D | compiler_enums.h | 383 k64, enumerator in enum:art::OpSize
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H A D | mir_dataflow.cc | 930 if (type_size == k64 || type_size == kDouble) { 1122 if (type_size == k64 || type_size == kDouble) {
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/art/compiler/optimizing/ |
H A D | intrinsics.cc | 56 case k64:
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