| 681652d8e8a33bc07c5c082a71aea13d0f15e0a0 |
|
23-Jul-2015 |
Mingyao Yang <mingyao@google.com> |
HDeoptimize should hold values live in env.
Values that are not live in compiled code anymore may still be needed in
interpreter, due to code motion, etc.
(cherry-picked from commit 718493c6c3c8e380663cb8a94e57ce160a6c473f)
Bug: 22665511
Change-Id: I8b85833c5c462f8fe36f86d6026a51b07563995a
|
| 0a23d74dc2751440822960eab218be4cb8843647 |
|
07-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Add a parent environment to HEnvironment.
This code has no functionality change. It adds a placeholder
for chaining inlined frames.
Change-Id: I5ec57335af76ee406052345b947aad98a6a4423a
|
| db216f4d49ea1561a74261c29f1264952232728a |
|
05-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Relax the only one back-edge restriction.
The rule is in the way for better register allocation, as
it creates an artificial join point between multiple paths.
Change-Id: Ia4392890f95bcea56d143138f28ddce6c572ad58
|
| fbda5f3e1378f07ae202f62da625ee43a063a052 |
|
29-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Find better split positions in the register allocator.
In a standard if/else control flow graph, this avoids
doing a move in one branch if the other branch decided
to move an interval.
This also needs a new register hint kind, which is what
was the location of the interval at the predecessor block.
Change-Id: I18b78264587b4d693540fbb5e014d12df2add3e2
|
| 579026039080252878106118645ed70706f4838e |
|
21-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Add synthesize uses at back edge.
This reduces the cost of linearizing the graph (hence removing
the notion of back edge). Since linear scan allocates/spills registers
based on next use, adding a use at a back edge ensures we do count
for loop uses.
Change-Id: Idaa882cb120edbdd08ca6bff142d326a8245bd14
|
| 4ed947a58de87d19d0609be773207c905ccb0f7f |
|
27-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Dissociate uses with environment uses.
They are most of the times in the way when iterating. They
also complicate the logic of (future) back edge uses.
Change-Id: I152595d9913073fe901b267ca623fa0fe7432484
|
| 8cbab3c4de3328b576454ce702d7748f56c44346 |
|
23-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Linear scan: split at better positions.
- Split at block entry to piggy back on control flow resolution.
- Split at the loop header, if the split position is within a loop.
Change-Id: I718299a58c02ee02a1b22bda589607c69a35f0e8
|
| 2cebb24bfc3247d3e9be138a3350106737455918 |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Replace NULL with nullptr
Also fixed some lines that were too long, and a few other minor
details.
Change-Id: I6efba5fb6e03eb5d0a300fddb2a75bf8e2f175cb
|
| 1ba1981ee9d28f87f594b157566d09e973fa5bce |
|
21-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Linear scan: Use FirstUse instead of FirstRegisterUse.
This is in preparation for introducing synthesized used at back edges.
Change-Id: Ie28d6725d2dde982cf2137f2110daabcbab9f789
|
| 3fc992f9dfe8f49ff350132323cc635f102b7b62 |
|
16-Apr-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Improve range search caching in LiveInterval
Register allocator spends too long in LiveInterval queries. This patch
builds on previously introduced caching of range search results to
further speed up LiveInterval's Covers and FindIntersectionWith.
Only calls which are guaranteed to query the current->GetStart()
position are cached. Other calls are replaced with CoversSlow which
searches through the entire list of ranges.
Change-Id: I84d92b526e174caa70d6477497a06afd85016c4a
|
| c08675c3e6502f69ee4d1f62998f658ccd152414 |
|
17-Apr-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Fix incorrect last range when adding high interval
Adding a high interval clones live ranges but assigns last_range from
the low interval. This should not cause any problems as last_range
is only used for constant-time GetEnd which will return the same
value for both low/high intervals.
Change-Id: Iaf242183436c8ac2f78c0aeea22cd07cd4beacc0
|
| 241a486267bdb59b32fe4c8db370eb936068fb39 |
|
16-Apr-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Replace expensive calls to Covers in reg alloc
LiveInterval::Covers is implemented as a linear-time search over
liveness ranges and can therefore be rather expensive and should be
avoided unless necessary. This patch replaces calls to Covers when
searching for a sibling with the cheaper IsDefinedAt call.
Change-Id: I93fc73529c15a518335f4cbdc3a0def52d9501e5
|
| 43af728a3ccecb5f0eacef85f44d70df3d4c40f9 |
|
16-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Split safepoint positions to avoid calling Covers.
This is also in preparation for caller/callee save based
register allocation.
Change-Id: I63954bdae5ea7870568fd93b4d11e1c9dcd6de6f
|
| 0d9f17de8f21a10702de1510b73e89d07b3b9bbf |
|
15-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Move the linear order to the HGraph.
Bug found by Zheng Xu: SsaLivenessAnalysis being a stack allocated
object, we should not refer to it in later phases of the compiler.
Specifically, the code generator was using the linear order, which
was stored in the liveness analysis object.
Change-Id: I574641f522b7b86fc43f3914166108efc72edb3b
|
| 5588e588144fffc978845a2c9c915a0044565a03 |
|
14-Apr-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Refactor safepoints in register allocator.
This is in preparation for adding logic around callee/caller
saved in the register allocator.
Change-Id: I4204169f0a6a01074880538833144be7b0810882
|
| d8126bef62df7f40f2e6abc74004f52e664daf45 |
|
27-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix locations at environment uses.
We were too agressive in not recording environment uses
when the instruction was not of type object. We have to
record the use to the use list of an interval, but it should
not affect the live ranges of that interval.
Change-Id: Id16fb7cc06f14083766d408a345837793583b6ea
|
| f01d34445953e6b9c9b13de1dd32a5c0ee5abab5 |
|
27-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement a proper solution for temps.
We used to play some trickery when updating locations of temps. This
change creates a proper use of the temp, and use it for updating
its location.
Change-Id: I53e9447b87a55137a3a79841db21ad3864854825
|
| 915b9d0c13bb5091875d868fbfa551d7b65d7477 |
|
11-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Tweak liveness when instructions are used in environments.
Instructions remain live when debuggable, but only instructions
with object types remain live when non-debuggable.
Enable StackVisitor::GetThisObject for optimizing.
Change-Id: Id87b2cbf33a02450059acc9993995782e5f28987
|
| 234d69d075d1608f80adb647f7935077b62b6376 |
|
09-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "[optimizing] Enable x86 long support.""
This reverts commit 154552e666347d41d95d7619c6ee56249ff4feca.
Change-Id: Idc726551c249a888b7ff5fde8508ae50e81b2e13
|
| 154552e666347d41d95d7619c6ee56249ff4feca |
|
06-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "[optimizing] Enable x86 long support."
Few libcore failures.
This reverts commit b4ba354cf8d22b261205494875cc014f18587b50.
Change-Id: I4a28d853e730dff9b69aec9555505803cf2fcd63
|
| b4ba354cf8d22b261205494875cc014f18587b50 |
|
05-Mar-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
[optimizing] Enable x86 long support.
Change-Id: I9006972a65a1f191c45691104a960366747f9d16
|
| 5b8e6a594b827f7dc88b2e3d895e08f5b3f22446 |
|
25-Feb-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Cache last returned range in LiveInterval::Covers
Optimizing spends ~10% of compilation time in the register allocator.
One of the frequently called methods is LiveInterval::Covers which
has linear complexity w.r.t. the number of gaps in liveness intervals.
This patch leverages the fact that the register allocator calls Covers
with non-decreasing position values and caches the last returned
result to start the iteration closer to the result the next time the
method is invoked. Stats from compiling the framework show that this
optimization reduces the average number of iterations needed to find
the result by 40%.
Change-Id: I4dd26b900879d5e1d03818ebc1e117cc6a53053c
|
| 714e14fe61ebd1d1a97599b429cbbb0a54bbe6c4 |
|
25-Feb-2015 |
David Brazdil <dbrazdil@google.com> |
ART: Nano optimization of LiveInterval
Shuffling the order of conditions in the FirstIntersectionWith method
of LiveInterval class can save a couple of comparisons. Even though
this is a tiny optimization, it can save some compilation time since
the method is heavily used during register allocation.
Change-Id: I1817bd95db2d0eb96cc06fb2e9e06ac1cea784fe
|
| 7c3952f423b8213083d60596a5f0bf4237ca3f7b |
|
20-Feb-2015 |
Andreas Gampe <agampe@google.com> |
ART: Add -Wunused
Until the global CFLAGS are fixed, add Wunused. Fix declarations
in the optimizing compiler.
Change-Id: Ic4553f08e809dc54f3d82af57ac592622c98e000
|
| 829280cc90b7a84db42864589b4bafb4c94a79d9 |
|
28-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Finally implement Location::kNoOutputOverlap.
The [i, i + 1) interval scheme we chose for representing
lifetime positions is not optimal for doing this optimization.
It however doesn't prevent recognizing a non-split interval
during the TryAllocateFreeReg phase, and try to re-use
its inputs' registers.
Change-Id: I80a2823b0048d3310becfc5f5fb7b1230dfd8201
|
| aedc328dead0700fdbce3c58f5cde2c4dadfb70d |
|
23-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in the liveness analysis.
A range after a loop might also be after a lifetime hole.
In this situation we must preserve the hole, and not merge
it with the loop start.
Change-Id: I82eddef059592102a25362cdaa4273200574c2ae
|
| 3747b48f7b09a9bc836397ceaacb9de0940db6fd |
|
19-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Address review comments.
Comments were from:
https://android-review.googlesource.com/#/c/121992.
Change-Id: I8c59b30a356d606f12c50d0c8db916295a5c9e13
|
| dd8f887e81b894bc8075d8bacdb223747b6a8018 |
|
15-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in the register allocator.
When allocating a register blocked by existing intervals,
we need to split inactive intervals at the end of their
lifetime hole, and not at the next intersection. Otherwise,
the allocation for following intervals will not see
that a register is being used by the split interval.
Change-Id: I40cc79dde541c07392a7cf4c6f0b291dd1ce1819
|
| 840e5461a85f8908f51e7f6cd562a9129ff0e7ce |
|
07-Jan-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement double and float support for arm in register allocator.
The basic approach is:
- An instruction that needs two registers gets two intervals.
- When allocating the low part, we also allocate the high part.
- When splitting a low (or high) interval, we also split the high
(or low) equivalent.
- Allocation follows the (S/D register) requirement that low
registers are always even and the high equivalent is low + 1.
Change-Id: I06a5148e05a2ffc7e7555d08e871ed007b4c2797
|
| a8eed3acbc39c71ec22dc2943e71eaa07c6507dd |
|
24-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Fix the computation of linear ordering.""
PS2 fixes the obvious typos/wrong refactoring.
This reverts commit e50fa5887b1342b845826197d81950e26753fc9c.
Change-Id: I22f81d63a12cf01aafd61535abc2399d936d49c2
|
| e50fa5887b1342b845826197d81950e26753fc9c |
|
24-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Fix the computation of linear ordering."
Build is broken.
This reverts commit 3054a90063d379ab8c9e5a42a7daf0d644b48b07.
Change-Id: I259bc2bd6a58e30391b8176f3db5fdb5c07e4d6d
|
| 3054a90063d379ab8c9e5a42a7daf0d644b48b07 |
|
21-Nov-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix the computation of linear ordering.
The register allocator makes assumptions on the order, and
we ended up not computing the right one. The algorithm worked
fine when the loop header is the block branching to the exit,
but in the presence of breaks or do/while, it was incorrect.
Change-Id: Iad0a89872cd3f7b7a8b2bdf560f0d03493f93ba5
|
| 6a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866f |
|
31-Oct-2014 |
Ian Rogers <irogers@google.com> |
Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.
Fix associated errors about unused paramenters and implict sign conversions.
For sign conversion this was largely in the area of enums, so add ostream
operators for the effected enums and fix tools/generate-operator-out.py.
Tidy arena allocation code and arena allocated data types, rather than fixing
new and delete operators.
Remove dead code.
Change-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b
|
| 296bd60423e0630d8152b99fb7afb20fbff5a18a |
|
07-Oct-2014 |
Mingyao Yang <mingyao@google.com> |
Some improvement to reg alloc.
Change-Id: If579a37791278500a7e5bc763f144c241f261920
|
| cf7f19135f0e273f7b0136315633c2abfc715343 |
|
23-Oct-2014 |
Ian Rogers <irogers@google.com> |
C++11 related clean-up of DISALLOW_..
Move DISALLOW_COPY_AND_ASSIGN to delete functions. By no having declarations
with no definitions this prompts better warning messages so deal with these
by correcting the code.
Add a DISALLOW_ALLOCATION and use for ValueObject and mirror::Object.
Make X86 assembly operand types ValueObjects to fix compilation errors.
Tidy the use of iostream and ostream.
Avoid making cutils a dependency via mutex-inl.h for tests that link against
libart. Push tracing dependencies into appropriate files and mutex.cc.
x86 32-bit host symbols size is increased for libarttest, avoid copying this
in run-test 115 by using symlinks and remove this test's higher than normal
ulimit.
Fix the RunningOnValgrind test in RosAllocSpace to not use GetHeap as it
returns NULL when the heap is under construction by Runtime.
Change-Id: Ia246f7ac0c11f73072b30d70566a196e9b78472b
|
| c8147a76ed2f440f38329dc08ff889d393b5c535 |
|
21-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix off by one errors in linear scan register allocator.
Change-Id: I65eea3cc125e12106a7160d30cb91c5d173bd405
|
| 102cbed1e52b7c5f09458b44903fe97bb3e14d5f |
|
15-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement register allocator for floating point registers.
Also:
- Fix misuses of emitting the rex prefix in the x86_64 assembler.
- Fix movaps code generation in the x86_64 assembler.
Change-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe
|
| 8e3964b766652a0478e8e0e303e8556c997675f1 |
|
17-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Remove the notion of dies at entry.
- Instead, explicitly say that the output does not overlap.
- Inputs that must be in a fixed register do die at entry,
as we know they have a location that others can not take.
- There is also no need to differentiate between an input move
and a connecting sibling move - those can be put in the
same parallel move instruction.
Change-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27
|
| 01ef345767ea609417fc511e42007705c9667546 |
|
01-Oct-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add trivial register hints to the register allocator.
- Add hints for phis, same as first input, and expected registers.
- Make the if instruction accept non-condition instructions.
Change-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5
|
| 8ddb00ca935733f5d3b07816e5bb33d6cabe6ec4 |
|
29-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Improve detection of lifetime holes.
The check concluding that the next use was in a successor
was too conservative: two blocks following each other
in terms of liveness are not necessarily predecessor/sucessor.
Change-Id: Ideec98046c812aa5fb63781141b5fde24c706d6d
|
| 7690562d40878f44823d5fb03a2084cfc677ec4a |
|
25-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Register allocator: refine instructions liveness.
Add support for instructions that die at the beginning
of another instruction. Before, an instruction needed
to stay alive during the instruction, so the register
allocator was not able not reuse the register.
Change-Id: I5f11a80b0a20778227229eb797816edcc6365297
|
| 3bca0df855f0e575c6ee020ed016999fc8f14122 |
|
19-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Support for saving and restoring live registers in a slow path.
And use it in suspend check slow paths.
Change-Id: I79caf28f334c145a36180c79a6e2fceae3990c31
|
| 3946844c34ad965515f677084b07d663d70ad1b8 |
|
02-Sep-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Runtime support for the new stack maps for the opt compiler.
Now most of the methods supported by the compiler can be optimized,
instead of using the baseline.
Change-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa
|
| de025a7d90603d58c62b8fd91393f13d8826a7ac |
|
19-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix a bug in LiveInterval::FirstRegisterUseAfter.
Since the use list is shared amongst siblings, we must stop looking
for the user once we have reached the end position of the current
interval. The next uses are for the next sibling.
Change-Id: Ibba180161e94a705e2034abd0b95a29347950257
|
| 86dbb9a12119273039ce272b41c809fa548b37b6 |
|
04-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Final CL to enable register allocation on x86.
This CL implements:
1) Resolution after allocation: connecting the locations
allocated to an interval within a block and between blocks.
2) Handling of fixed registers: some instructions require
inputs/output to be at a specific location, and the allocator
needs to deal with them in a special way.
3) ParallelMoveResolver::EmitNativeCode for x86.
Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
|
| 31d76b42ef5165351499da3f8ee0ac147428c5ed |
|
09-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Plug code generator into liveness analysis.
Also implement spill slot support.
Change-Id: If5e28811e9fbbf3842a258772c633318a2f4fafc
|
| ec7e4727e99aa1416398ac5a684f5024817a25c7 |
|
06-Jun-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix some bugs in graph construction/simplification methods.
Also fix a brano during SSA construction. The code should
not have been commented out. Added a test to cover what the code
intends.
Change-Id: Ia00ae79dcf75eb0d412f07649d73e7f94dbfb6f0
|
| ffddfdf6fec0b9d98a692e27242eecb15af5ead2 |
|
03-Jun-2014 |
Tim Murray <timmurray@google.com> |
DO NOT MERGE
Merge ART from AOSP to lmp-preview-dev.
Change-Id: I0f578733a4b8756fd780d4a052ad69b746f687a9
|
| a7062e05e6048c7f817d784a5b94e3122e25b1ec |
|
22-May-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add a linear scan register allocator to the optimizing compiler.
This is a "by-the-book" implementation. It currently only deals
with allocating registers, with no hint optimizations.
The changes remaining to make it functional are:
- Allocate spill slots.
- Resolution and placements of Move instructions.
- Connect it to the code generator.
Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
|
| ddb311fdeca82ca628fed694c4702f463b5c4927 |
|
16-May-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Build live ranges in preparation for register allocation.
Change-Id: I7ae24afaa4e49276136bf34f4ba7d62db7f28c01
|
| 0d3f578909d0d1ea072ca68d78301b6fb7a44451 |
|
14-May-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Linearize the graph before creating live ranges.
Change-Id: I02eb5671e3304ab062286131745c1366448aff58
|
| 804d09372cc3d80d537da1489da4a45e0e19aa5d |
|
02-May-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Build live-in, live-out and kill sets for each block.
This information will be used when computing live ranges of
instructions.
Change-Id: I345ee833c1ccb4a8e725c7976453f6d58d350d74
|