2c3e0051c31c3f5b2328b447eadf1cf9c4427442 |
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06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153 Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4c5e43da7792f75567b693105cc53e3f1992ad98 |
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08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350 Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699. Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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37ed9c199ca639565f6ce88105f9e39e898d82d0 |
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01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494. Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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354362524a72b3fa43a6c09380b7ae3b2380cbba |
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19-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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b21ab43cfc3fa0dacf5c95f04e58b6d804b59a16 |
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18-Nov-2013 |
Alexey Samsonov <samsonov@google.com> |
Revert r194865 and r194874. This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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5a364c5561ec04e33a6f5d52c14f1bac6f247ea0 |
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15-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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d1a4f579bf45aec933c79292b6b9663581438738 |
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16-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Improve handling of SETCC We previously used the default expansion to SELECT_CC, which in turn would expand to "LHI; BRC; LHI". In most cases it's better to use an IPM-based sequence instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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f8f993b675568ea6380ad141371c67679a1b9ac4 |
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15-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use A(G)SI when spilling the target of a constant addition git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e22c56d6d81b84d6f4ba24c2f5b0b203e7ddffe9 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add comparisons of high words and memory git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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185ef05ad6fdcaad1e831020b1f88d0046dd15d6 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add comparisons of large immediates using high words There are no corresponding patterns for small immediates because they would prevent the use of fused compare-and-branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ad366a3f67679a56d25464dc2bcad3a0a6a51780 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add immediate addition involving high words git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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bd1958d8e99ebd5a885f848b2f688c399cfc9886 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Extend test-under-mask support to high GR32s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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b9dcca8265e9da01119c47e65f114c3adc972ba6 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Allow integer AND involving high words git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1ff62e182e648c72e6fce4f9d7911f2edfd914d2 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Allow integer XOR involving high words git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1c831f7f1f7e869516f5a70c1e6dd8896bef76f5 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Allow integer OR involving high words git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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645d250b84fe0d097e7813b980ae58daeca2c2e6 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Allow integer insertions with a high-word destination git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4c8feae136bbb54ba09d8f8dc7e61714270f7cd5 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add patterns to load a constant into a high word (IIHF) Similar to low words, we can use the shorter LLIHL and LLIHH if it turns out that the other half of the GR64 isn't live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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79e2ed4d838354d8aeaadbbfe0a3779d63e72b25 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add register zero extensions involving at least one high word git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9813dbf396e63f6d4fd99fe0f6651e831cb7414b |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add truncating high-word stores (STCH and STHH) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9a05f040e70494ab0092faa9ed10dc70ff1f4e66 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add zero-extending high-word loads (LLCH and LLHH) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ced450f0e6266eb8c2624fc1895cbc2749d715c3 |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add sign-extending high-word loads (LBH and LHH) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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55d7d83b6c9e55fa73d667660c8e90f92999385b |
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01-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use upper words of GR64s for codegen This just adds the basics necessary for allocating the upper words to virtual registers (move, load and store). The move support is parameterised in a way that makes it easy to handle zero extensions, but the associated zero-extend patterns are added by a later patch. The easiest way of testing this seemed to be add a new "h" register constraint for high words. I don't expect the constraint to be useful in real inline asms, but it should work, so I didn't try to hide it behind an option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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745ca1eed7dc0a056b066f16aea750ce6fa8a530 |
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30-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Rename subregs and add subreg_h32 Use subreg_hNN and subreg_lNN for the high and low NN bits of a register. List the low registers first, so that subreg_l32 also means the low 32 bits of a 128-bit register. Floats are stored in the upper 32 bits of a 64-bit register, so they should use subreg_h32 rather than subreg_l32. No behavioral change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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0548a5487ab8648c7c017f87c507ea1bc38bbb1f |
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27-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Rein back the use of block operations The backend tries to use block operations like MVC, NC, OC and XC for simple scalar operations. For correctness reasons, it rejects any case in which the regions might partially overlap. However, for performance reasons, it should also reject cases where the regions might be equal, since the instruction might then not use the fast path. This fixes a performance regression seen in bzip2. We may want to limit the optimisation even more in future, or even remove it entirely, but I'll try with this for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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259a6006e89576704e52e7392ef2bfd83f277ce3 |
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25-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Define the GR64 low-word logic instructions as pseudo aliases. Another patch to avoid duplication of encoding information. Things like NILF, NILL and NILH are used as both 32-bit and 64-bit instructions. Here the 64-bit versions are defined as aliases of the 32-bit ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e39a156b921f47a374f091b43205555ee90cd555 |
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25-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use subregs for 64-bit truncating stores Another patch to reduce the duplication of encoding information. Rather than define separate patterns for truncating 64-bit stores, use the 32-bit stores with a subreg. No behavioral changed intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e2d6f91d63a2e8cf77b07794cda7d9ef72504769 |
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18-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add unsigned compare-and-branch instructions For some reason I never got around to adding these at the same time as the signed versions. No idea why. I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether it should just be replaced with an "is normal" flag. I'll leave that for later though. There are some boundary conditions that can be tweaked, such as preferring unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256", but again I'll leave those for a separate patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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6a079fef4fad3e6c2e07c9e1d0776e20a0b05b1e |
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16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Fix handling of 64-bit memcmp results Generalize r188163 to cope with return types other than MVT::i32, just as the existing visitMemCmpCall code did. I've split this out into a subroutine so that it can be used for other upcoming patches. I also noticed that I'd used the wrong API to record the out chain. It's a load that uses DAG.getRoot() rather than getRoot(), so the out chain should go on PendingLoads. I don't have a testcase for that because we don't do any interesting scheduling on z yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188540 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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6c51f89498dd813c8dd16e46069decf2897b31b2 |
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16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Fix sign of integer memcmp result r188163 used CLC to implement memcmp. Code that compares the result directly against zero can test the CC value produced by CLC, but code that needs an integer result must use IPM. The sequence I'd used was: ipm <reg> sll <reg>, 2 sra <reg>, 30 but I'd forgotten that this inverts the order, so that CC==1 ("less") becomes an integer greater than zero, and CC==2 ("greater") becomes an integer less than zero. This sequence should only be used if the CLC arguments are reversed to compensate. The problem then is that the branch condition must also be reversed when testing the CLC result directly. Rather than do that, I went for a different sequence that works with the natural CLC order: ipm <reg> srl <reg>, 28 rll <reg>, <reg>, 31 One advantage of this is that it doesn't clobber CC. A disadvantage is that any sign extension to 64 bits must be done separately, rather than being folded into the shifts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ac168b8bc8773a083a10902f64e4ae57a925aee4 |
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12-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use CLC and IPM to implement memcmp For now this is restricted to fixed-length comparisons with a length in the range [1, 256], as for memcpy() and MVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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29e873ddb6b21c4a934926a0cf7809e98ac1fff0 |
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07-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Optimize floating-point comparisons with zero This follows the same lines as the integer code. In the end it seemed easier to have a second 4-bit mask in TSFlags to specify the compare-like CC values. That eats one more TSFlags bit than adding a CCHasUnordered would have done, but it feels more concise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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93795574785de252703591e7fcc8f052c762f25e |
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05-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequences This patch just uses a peephole test for "add; compare; branch" sequences within a single block. The IR optimizers already convert loops to decrement-and-branch-on-nonzero form in some cases, so even this simplistic test triggers many times during a clang bootstrap and projects/test-suite run. It looks like there are still cases where we need to more strongly prefer branches on nonzero though. E.g. I saw a case where a loop that started out with a check for 0 ended up with a check for -1. I'll try to look at that sometime. I ended up adding the Reference class because MachineInstr::readsRegister() doesn't check for subregisters (by design, as far as I could tell). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9b05c709c65ba05645853ca49bc2a1ea8b554f37 |
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05-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use LOAD AND TEST to eliminate comparisons against zero git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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8f0ad5ae8f2699f6ab13a229941a0b192273cae8 |
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01-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Reuse CC results for integer comparisons with zero This also fixes a bug in the predication of LR to LOCR: I'd forgotten that with these in-place instruction builds, the implicit operands need to be added manually. I think this was latent until now, but is tested by int-cmp-45.c. It also adds a CC valid mask to STOC, again tested by int-cmp-45.c. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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6824f127f90197b26af93cf5d6c13b7941567e54 |
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31-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Be more careful about inverting CC masks System z branches have a mask to select which of the 4 CC values should cause the branch to be taken. We can invert a branch by inverting the mask. However, not all instructions can produce all 4 CC values, so inverting the branch like this can lead to some oddities. For example, integer comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater). If an integer EQ is reversed to NE before instruction selection, the branch will test for 1 or 2. If instead the branch is reversed after instruction selection (by inverting the mask), it will test for 1, 2 or 3. Both are correct, but the second isn't really canonical. This patch therefore keeps track of which CC values are possible and uses this when inverting a mask. Although this is mostly cosmestic, it fixes undefined behavior for the CIJNLH in branch-08.ll. Another fix would have been to mask out bit 0 when generating the fused compare and branch, but the point of this patch is that we shouldn't need to do that in the first place. The patch also makes it easier to reuse CC results from other instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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0416e3c599c22dc656a1115ac983116ad0b2d9da |
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31-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Move compare-and-branch generation even later r187116 moved compare-and-branch generation from the instruction-selection pass to the peephole optimizer (via optimizeCompare). It turns out that even this is a bit too early. Fused compare-and-branch instructions don't interact well with predication, where a CC result is needed. They also make it harder to reuse the CC side-effects of earlier instructions (not yet implemented, but the subject of a later patch). Another problem was that the AnalyzeBranch family of routines weren't handling compares and branches, so we weren't able to reverse the fused form in cases where we would reverse a separate branch. This could have been fixed by extending AnalyzeBranch, but given the other problems, I've instead moved the fusing to the long-branch pass, which is also responsible for the opposite transformation: splitting out-of-range compares and branches into separate compares and long branches. I've added a test for the AnalyzeBranch problem. A test for the predication problem is included in the next patch, which fixes a bug in the choice of CC mask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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b3f912b510f8040690864126351b7021980558bb |
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31-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress() r186399 aggressively used the RISBG instruction for immediate ANDs, both because it can handle some values that AND IMMEDIATE can't, and because it allows the destination register to be different from the source. I realized later while implementing the distinct-ops support that it would be better to leave the choice up to convertToThreeAddress() instead. The AND IMMEDIATE form is shorter and is less likely to be cracked. This is a problem for 32-bit ANDs because we assume that all 32-bit operations will leave the high word untouched, whereas RISBG used in this way will either clear the high word or copy it from the source register. The patch uses the z196 instruction RISBLG for this instead. This means that z10 will be restricted to NILL, NILH and NILF for 32-bit ANDs, but I think that should be OK for now. Although we're using z10 as the base architecture, the optimization work is going to be focused more on z196 and zEC12. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
|
ea14085be54540be2f5cb4b1444d972972d22c5f |
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25-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Rework compare and branch support Before the patch we took advantage of the fact that the compare and branch are glued together in the selection DAG and fused them together (where possible) while emitting them. This seemed to work well in practice. However, fusing the compare so early makes it harder to remove redundant compares in cases where CC already has a suitable value. This patch therefore uses the peephole analyzeCompare/optimizeCompareInstr pair of functions instead. No behavioral change intended, but it paves the way for a later patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
|
bf99364f819465536a6b230b95735b239e3fc7a5 |
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25-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add LOCR and LOCGR git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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93c2125c3979bcb4656daf3c2fb5748fb3973e1a |
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19-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use SLLK, SRLK and SRAK for codegen This patch uses the instructions added in r186680 for codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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6cf3cfa0ab1da0c52730fec103bbc69eb0370081 |
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12-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Improve spilling of LGDR and LDGR If the source of these instructions is spilled we should load the destination. If the destination is spilled we should store the source. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
|
71804149a3a6f6c081b874869b27fafe7d3288ce |
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05-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Remove no-op MVCs The stack coloring pass has code to delete stores and loads that become trivially dead after coloring. Extend it to cope with single instructions that copy from one frame index to another. The testcase happens to show an example of this kicking in at the moment. It did occur in Real Code too though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185705 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e684b96e3c6513f88137afee7c344a4d2d9f0694 |
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05-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Remove redundant frame MMOs This fixes foldMemoryOperandImpl() so that it doesn't create duplicated frame MMOs. I hadn't realized when writing r185434 that it was the caller's responsibility to add these. No behavioural change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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cf1b5bd60ab7cf907bef20c3997ffb249b4fe90a |
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05-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Enable the use of MVC for frame-to-frame spills ...now that the problem that prompted the restriction has been fixed. The original spill-02.py was a compromise because at the time I couldn't find an example that actually failed without the two scavenging slots. The version included here did. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185701 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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fa487e83a83c260d6a50f3df00a0eb012553a912 |
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03-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Fold more spills Add a mapping from register-based <INSN>R instructions to the corresponding memory-based <INSN>. Use it to cut down on the number of spill loads. Some instructions extend their operands from smaller fields, so this required a new TSFlags field to say how big the unextended operand is. This optimisation doesn't trigger for C(G)R and CL(G)R because in practice we always combine those instructions with a branch. Adding a test for every other case probably seems excessive, but it did catch a missed optimisation for DSGF (fixed in r185435). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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985148ea873db018dbd2b53f066f5817a9b11aad |
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03-Jul-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
SystemZInstrInfo.cpp: Tweak an assertion. [-Wunused-variable] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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24dd7dbe7f2a3338a20314b3863f6b738cc1c298 |
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02-Jul-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
SystemZ: Fold variable into assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1ce4894a3f1ce6e63c1b109c24235d81dea2908f |
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02-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use MVC to spill loads and stores Try to use MVC when spilling the destination of a simple load or the source of a simple store. As explained in the comment, this doesn't yet handle the case where the load or store location is also a frame index, since that could lead to two simultaneous scavenger spills, something the backend can't handle yet. spill-02.py tests that this restriction kicks in, but unfortunately I've not yet found a case that would fail without it. The volatile trick I used for other scavenger tests doesn't work here because we can't use MVC for volatile accesses anyway. I'm planning on relaxing the restriction later, hopefully with a test that does trigger the problem... Tests @f8 and @f9 also showed that L(G)RL and ST(G)RL were wrongly classified as SimpleBDX{Load,Store}. It wouldn't be easy to test for that bug separately, which is why I didn't split out the fix as a separate patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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fc61b6f111af79662baf273c40593a1e8f4dc719 |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because the internals of TargetMachine could change. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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2d664abbfca8b9fa3d99e8a2f74bd52faf007f12 |
|
29-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Immediate compare-and-branch support This patch adds support for the CIJ and CGIJ instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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d50bcb2162a529534da42748ab4a418bfc9aaf06 |
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28-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Register compare-and-branch support This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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06c3c9a9e1cc313d911e939e3e994feaf43cc3a7 |
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28-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Tweak SystemZInstrInfo::isBranch() interface This is needed for the upcoming compare-and-branch patch. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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44b486ed78c60b50aa14d4eed92ee828d4d44293 |
|
20-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add long branch pass Before this change, the SystemZ backend would use BRCL for all branches and only consider shortening them to BRC when generating an object file. E.g. a branch on equal would use the JGE alias of BRCL in assembly output, but might be shortened to the JE alias of BRC in ELF output. This was a useful first step, but it had two problems: (1) The z assembler isn't traditionally supposed to perform branch shortening or branch relaxation. We followed this rule by not relaxing branches in assembler input, but that meant that generating assembly code and then assembling it would not produce the same result as going directly to object code; the former would give long branches everywhere, whereas the latter would use short branches where possible. (2) Other useful branches, like COMPARE AND BRANCH, do not have long forms. We would need to do something else before supporting them. (Although COMPARE AND BRANCH does not change the condition codes, the plan is to model COMPARE AND BRANCH as a CC-clobbering instruction during codegen, so that we can safely lower it to a separate compare and long branch where necessary. This is not a valid transformation for the assembler proper to make.) This patch therefore moves branch relaxation to a pre-emit pass. For now, calls are still shortened from BRASL to BRAS by the assembler, although this too is not really the traditional behaviour. The first test takes about 1.5s to run, and there are likely to be more tests in this vein once further branch types are added. The feeling on IRC was that 1.5s is a bit much for a single test, so I've restricted it to SystemZ hosts for now. The patch exposes (and fixes) some typos in the main CodeGen/SystemZ tests. A later patch will remove the {{g}}s from that directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1d09d56fe1e3f3faadd4bf4ccf3e585ddb3c3b07 |
|
06-May-2013 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[SystemZ] Add back end This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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29074ccf6cb00a3cbe32a3b7809d970ecaf8c9bf |
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25-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Remove the SystemZ backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
|
24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong. These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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c60f9b752381baa6c4b80c0739034660f1748c84 |
|
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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59ee62d2418df8db499eca1ae17f5900dc2dcbba |
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11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4db3cffe94a5285239cc0056f939c6b74a5ca0b6 |
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01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Hide the call to InitMCInstrInfo into tblgen generated ctor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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d5b03f252c0db6b49a242abab63d7c5a260fceae |
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28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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22fee2dff4c43b551aefa44a96ca74fcade6bfac |
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28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e837dead3c8dc3445ef6a0e2322179c57e264a13 |
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28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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cd775ceff0b25a0b026f643a7990c2924bd310a3 |
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28-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move callee-saved regs spills / reloads to TFI git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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d0c38176690e9602a93a20a43f1bd084564a8116 |
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18-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move hasFP() and few related hooks to TargetFrameInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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78e6e009223a38739797629ca2d217acf86dda93 |
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17-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the isMoveInstr() hook. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4cae5af54eb3561bf2ae4397b4b8c222f74423f5 |
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11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove redundant branch. Thanks, Anton! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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f7d55b97f01ce133eb830ca93411df4caa9d65da |
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11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace copyRegToReg with copyPhysReg for SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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3bf912593301152b65accb9d9c37a95172f1df5a |
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18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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42d075c4fb21995265961501cec9ff6e3fb497ce |
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02-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove the TargetRegisterClass member from CalleeSavedInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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2457f2c66184e978d4ed8fa9e2128effff26cb0b |
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22-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Implement @llvm.returnaddress. rdar://8015977. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 |
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06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it doesn't have to guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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746ad69e088176819981b4b2c5ac8dcd49f5e60e |
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06-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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c7f3ace20c325521c68335a1689645b43b06ddf0 |
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02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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93d6a7e9c21204c52d6efec6c672163e7de79660 |
|
02-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Teach AnalyzeBranch, RemoveBranch and the branch folder to be tolerant of debug info following the branch(es) at the end of a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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864e2efce2cb5d02e376933933d96074723fe77c |
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05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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7896c9f436a4eda5ec15e882a7505ba482a2fcd0 |
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03-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
improve portability to avoid conflicting with std::next in c++'0x. Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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8f9b0f6e881a63875e7c41319eca31751588799a |
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07-Nov-2009 |
Chris Lattner <sabre@nondot.org> |
add some missing #includes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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e33f44cfc547359bc28526e4c5e1852b600b4448 |
|
07-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Replace TargetInstrInfo::isInvariantLoad and its target-specific implementations with a new MachineInstr::isInvariantLoad, which uses MachineMemOperands and is target-independent. This brings MachineLICM and other functionality to targets which previously lacked an isInvariantLoad implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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31e874490a259a19c31c4dad9ee3365ea2c0cd8f |
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18-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Turn few asserts into errors / unreachable's git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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3e11988c42338751f3712b51a6f4d64362719711 |
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17-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Avoid a compiler warning when assertions are turned off. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76176 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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21ddf779bfceb2ba98f976bcd36fbf017ed54c52 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide crazy pseudos for regpairs spills / reloads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9de2848fac8806e311531fccf112b7936b23de31 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle long-disp stuff more consistently git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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f1106c4247bd1a2da605d6bd69054859be40eea2 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Another predicate routine git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76057 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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27bf677e59f9ba769f880f59c014481061d98f8f |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
More helpers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ae46db85a946ef49f9febc3eca85b8cfad622ccb |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add bunch of branch folding stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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27766b548fcf50b5f22929e297902082bd2ed58d |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add missed opcodes to short => long displacement conversion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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c3e48b06fb755ee9c959a34d647b999a7a39c6d8 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Cleanup git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76053 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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628d41952001784bcd5b45156eefb2eed1fd6c43 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add missed condbranch opcodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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17331245075fb99d1f79e2048e374ba16766a96c |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle FP callee-saved regs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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92ac82abb457354045c0d776e681fa69c589d5e9 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement FP regs spills / restores git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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7aa03ac8271689e6ceae3afd6d63463bd6a70088 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add bunch of FP instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76019 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9b812b0131d3912155f6720e731ccf7d87118276 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Another attempt to fix prologue emission git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76007 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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54cea741ca45264ee2d08c48093620389e788c96 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add proper register aliases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1ed1e3ecd489e469a5d9a3727139cecb8615bb9c |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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5a11e02fbd7f0df98338c75cd468c42d29ef16e4 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75989 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4b730160bb70b215e4230d5cc5828f994799182a |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide hooks for spilling / restoring stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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64d52d4a5d761678a8ad88199ee8a2c5f77f6d22 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement InsertBranch() hook git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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8d1837d9bebdc36fb67e0291cb23bc6bce43d44d |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide "wide" muls and divs/rems git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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7d1e39b7c62265637ea821136e83aa66afa2aad4 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
SELECT_CC lowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ef5decab535f0f45cff45abf156294d3be495660 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Emit callee-saved regs spills / restores git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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ba249e41f3ffa9e947b9173e3965385ec6324ffb |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Some preliminary call lowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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9e4816e09f50e3c4ef7368a188966944b8167ab4 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add shifts and reg-imm address matching git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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a51752cbea5d57956f177470f463baeeee33f3d7 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add bunch of 32-bit patterns... Uffff :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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1cc9dc7267c84b83379a44a479bb435f4aa18355 |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add simple reg-reg and reg-imm moves git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75912 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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4403b930f867f61b48304a23a6843026b0b9a32a |
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16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Let's start another backend :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
|