History log of /external/llvm/test/MC/AArch64/basic-a64-instructions.s
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
37ed9c199ca639565f6ce88105f9e39e898d82d0 01-Dec-2014 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
c6a4f5e819217e1e12c458aed8e7b122e23a3a58 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
c2884320feebc543d2ce51151d5418dfc18da9e4 31-Oct-2013 Amara Emerson <amara.emerson@arm.com> [AArch64] Make the use of FP instructions optional, but enabled by default.

This adds a new subtarget feature called FPARMv8 (implied by NEON), and
predicates the support of the FP instructions and registers on this feature.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
87773c318fcee853fb34a80a10c4347d523bdafb 01-Aug-2013 Tim Northover <tnorthover@apple.com> AArch64: add initial NEON support

Patch by Ana Pazos.

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
cbff068398a84ed488b7fdab5fea8e05500d385a 06-Feb-2013 Tim Northover <Tim.Northover@arm.com> Add AArch64 CRC32 instructions

These instructions are a late addition to the architecture, and may
yet end up behind an optional attribute, but for now they're available
at all times.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174496 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
9e3b31345f0d17b757e183a8384db92616256926 06-Feb-2013 Tim Northover <Tim.Northover@arm.com> Add icache prefetch operations to AArch64

This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/AArch64/basic-a64-instructions.s
72062f5744557e270a38192554c3126ea5f97434 31-Jan-2013 Tim Northover <Tim.Northover@arm.com> Add AArch64 as an experimental target.

This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.

This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.

The principal omission, currently, is performance tuning.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/AArch64/basic-a64-instructions.s