cf2f9ef015c312ecaa6656519602ae535f7ce9d7 |
|
06-Mar-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: move the FALLBACK_DRAW_OFFSET check outside the drawing rect check We have to do fallback when the 'Clipped Drawing Rectangle X/Y Max' exceed the hardware's limit no matter the drawing rectangle offset changed or not. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46665 NOTE: This is a candidate for stable release branches. Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
796f44d77906342e5912e7da6bdba1ba86bab9f0 |
|
20-Jan-2012 |
Eric Anholt <eric@anholt.net> |
intel: Pass the gl_renderbuffer to render_target_supported() vtable method. I'm going to want to go looking at it for an integer texture fix. NOTE: This is a candidate for the 8.0 branch.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
924de7dc96f4607cb3d833637b5f69f4b9e2a6d0 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: use intel_rb_format() to get renderbuffer format This will make future changes cleaner and less invasive.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
87f12bb2d95236c7b025d1a8be56b5ab1683d702 |
|
22-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix build since hiz merge. v2: Guard against rb->mt being NULL, since we may enter the draw regions path before intel_prepare_render() has been called to set them. Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v1)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
6661b7596f3b26a773ccde79f018179713b6b6e0 |
|
15-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add the context to the render_target_supported() vtbl method. We're going to want to provide different answers per chipset generation. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
c0151839473c83a2d0eea6285a649c1674466752 |
|
17-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Remove unused HiZ functions Remove the following functions: i830_hiz_resolve_noop i915_hiz_resolve_noop brw_hiz_resolve_noop My original strategy for how intel->vtbl.resolve_*buffer was used has substantially changed. The above functions are no longer called in the current strategy. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
483ea0a76fd2cde8fd5d4c303f1576ae15c21de5 |
|
19-Oct-2011 |
Brian Paul <brianp@vmware.com> |
i915: make i830/i915_hiz_resolve_noop() static
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
7b0f748efa5af84668cc3609a0070163bfa22607 |
|
20-Sep-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add HiZ operations to intel_context::vtbl for all drivers Add the following to the vtbl: hiz_resolve_depthbuffer hiz_resolve_hizbuffer For all drivers for which HiZ is not enabled, the methods are set to be no-ops. If HiZ is enabled, the methods are currently to set to empty stubs. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h. I initially produced the patch using this bash command: for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i 's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i 's/GL_FALSE/false/g' $file; done Then I manually added #include <stdbool.h> to fix compilation errors, and converted a few functions back to GLboolean that were used in core Mesa's function pointer table to avoid "incompatible pointer" warnings. Finally, I cleaned up some whitespace issues introduced by the change. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Chad Versace <chad@chad-versace.us> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
53f858637319f0efa47dd9acdb547e7913f3f86b |
|
07-Oct-2011 |
Chad Versace <chad@chad-versace.us> |
i915,i830: Remove dead HiZ assertions in *update_draw_buffer() i915 and i830 hardware doesn't have HiZ, so remove all HiZ related assertions from *update_draw_buffer(). I've removed the dead format checks completely rather than replace them with more appropriate checks. This doesn't reduce "assertion coverage", however, because when I added these HiZ related assertions in c8fdf66 there were no pre-existing checks there. Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function. We call all the other drm_intel_bo pointers in intel/*.h "bo", so this one was rather out of place. Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
af9548d3358884b408fb4c3cc69028befc5abe1d |
|
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Add support for HW rendering with no color draw buffer. This is useful for shadow map generation. Tested with glsl-bug-22603, which rendered the depth textures with fallbacks before. Acked-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
79fee3a76b7f4f63d01266fc3a3cd6ca44d1e513 |
|
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Make stencil test for no-stencil handling match depth test. i915_update_draw_buffers() already handles the fallback bit for missing stencil region, so here we just need to handle whether the GL thinks we have stencil data or not (and disable the test if so).
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
fc4fba52cf7e9616c70dd76b4d6bdba6582e157b |
|
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Disable the depth test whenever we don't have a depth buffer. We were disabling it once at the moment we changed draw buffers, but later enabling of depth test could turn it back on. Fixes fbo-nodepth-test. Note that ctx->DrawBuffer has to be checked because during context create we get called while it's still unset. However, we know we'll get an intel_draw_buffer() after that, so it's safe to make a silly choice at this point. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30080
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
4c47fce92e381cb182b51ce6d0727c0a1365e8b0 |
|
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Remove i965 paths from i915_update_drawbuffer() and i830's too. Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f34ec6169dc8b96e3958a42b51c9048c5f42ed80 |
|
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move intel_draw_buffers() code into each driver. The illusion of shared code here wasn't fooling anybody. It was tempting to keep i830 and i915 still shared, but I think I actually want to make them diverge shortly. Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
b904321ed018c661271fb1fc3eefd1af0ec61c7f |
|
29-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on intel_region_reference()'s support of *dst != NULL. Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
3541cc0d40f86d8ea63a876b7215831335ec677d |
|
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling swrast_setup about state updates until fallback. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
6cf3d1cace770a3b4a0bff0d44db3b9e1da4cb09 |
|
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling tnl about state updates unless we fall back. This was sucking up 1% of the CPU on 3DMMES. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
b17aab5753a6d14c9e757bedb186963b2dae8823 |
|
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move the draw_x/draw_y to the renderbuffer where it belongs. It was originally located in the region because the tracking of depth/color buffers was on the regions, and getting back to the irb would have been tricky. Now, we're keying off of the renderbuffer in more places, which means we can move these fields where they belong. This could fix potential rendering failure with a single texture having multiple images attached to different renderbuffers across shareCtx (as far as I can tell, this was the only failure we could cause, since anything else should trigger intel_render_texture in between, for example a BindFramebuffer). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a9e65097855468529242f9076bd6ef2a6c8062c1 |
|
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add is_hiz_depth_format() to intel_contex.vtbl Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on a depthbuffer of that format. Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
d439491a77cf9f25ea7a7f9c2309d2542d87f83e |
|
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Gut all remaining bits of hardware fog None of this ever gets used. Fog is always calculated by a fragment program. Even though the fixed-function fog unit is never used, state updates are still sent to the hardware. Removing those spurious state updates can't hurt performance. Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com> Acked-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
b094dff50a05e56f5415d31daa5e4542f321c858 |
|
10-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Detect allocation failure of batch buffer Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
2c6793fb6bc89df16c23f727bcb072a157ab8d10 |
|
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Emit a single relocation per vbo Reducing the number of relocations has lots of nice knock-on effects, not least including reducing batch buffer size, auxilliary array sizes (vmalloced and copied into the kernel), processing of uncached relocations etc. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
7c97e288fb6a105ea60c377aef4472cc33ca01bc |
|
26-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Separate BLEND from general context state. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
0b0cad38c57fbe59710cb4058866b2e68f6d471a |
|
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: suppress repeated sampler state emission Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch It's faster. Not only is the memcpy more efficiently performed in the kernel (making up for the system call overhead), but by not using mmap we remove the greater overhead of tracking the vma of every batch. And it means we can read back from the batch buffer without incurring the cost of a uncached read through the GTT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
5df51c2bb00871b338ec8455bd4ce5feea163f63 |
|
08-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Drop old checks for the settexoffset hack.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a7bf7230564ac282cc957207224d16f322fa73d8 |
|
08-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add a vtbl hook for determining if a format is renderable. By relying on just intel_span_supports_format, some formats that aren't supported pre-gen4 were not reporting FBO incomplete. And we also complained in stderr when it happened on i915 because draw_region gets called before framebuffer completeness validation.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
c27285610c9f9b50d06bf0f2725da195937cb48d |
|
13-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for using the BLT ring on gen6.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
220c0834a45d1dfa71f192b17d9a9b959a5a807e |
|
09-Oct-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Silence unused variable warning in non-debug builds. Fixes this GCC warning. i915_vtbl.c: In function 'i915_assert_not_dirty': i915_vtbl.c:670: warning: unused variable 'dirty'
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API. The slightly less mechanical change of converting the emit_reloc calls will follow.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
6d741627b00677d269537ad36e5f2ecd31fd98b5 |
|
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Only emit a MI_FLUSH when the drawing rectangle offset changes. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
add3260157368458501709d08a3f913ed448234f |
|
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Fix off-by-one for drawing rectangle. The drawing rectangle is given in *inclusive* pixel values, so the range is only [0,2047]. Hence when rendering to a 2048 wide target, such as an extended desktop, we would issue an illegal instruction zeroing the draw area. Fixes: Bug 27408: Primary and Secondary display blanks in extended desktop mode with Compiz enabled https://bugs.freedesktop.org/show_bug.cgi?id=27408 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
ff74c2ced5e7234902d43712a3759f91fd534a91 |
|
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Inhibit render cache flush when changing drawing rectangle offset. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
b87406e55f029d29594ae76a4b39a4fe1007fe4f |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Use x,y drawing offsets instead of changing buffer offsets. This should fix rendering into mipmaps of tiled textures.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
0032525242950bae197b267794193cdcb611c376 |
|
18-Feb-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
i915: update render buffers at prepare_render time We need to do this before we emit any state dependent on the current render buffers.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
c641703f21c858464ca34a1f99c79ccfd9a85d70 |
|
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
c9886d535e4ac5ae108b1015a9682f4ddd297536 |
|
28-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i915: Remove unused initial and current state, now that there's nothing else.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f9439e4a4696b8bc5fcdf3ac664f5e8d446f6621 |
|
28-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove long-disabled meta readpixels, and associated meta support.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch' Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
|
329c1b59106cf4ada27eaa4694600dc281d8c0de |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
4736e1cbbd4e2cf7fa4c67a728d520edc67e920f |
|
21-Jan-2010 |
Chia-I Wu <olvaffe@gmail.com> |
dri: Remove unnecessary glapi headers. They are not used at all.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
2861d9200be15cc44e8825387d3bd79086523c67 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop more cliprect bookkeeping
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f67748038935e609aa85450b20d550b4813c9429 |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace some gen3 IS_* checks with context structure usage. Shaves 400 bytes or so from i915_dri.so.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a087eb590d780cb82b49464e05ffc85123adce7e |
|
11-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch' Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
|
3078bd136d6ee1d9ad16b4c834cad23b005304a4 |
|
08-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Axe intel_renderbuffer::texformat Since the texformat branch merge, the value of intel_renderbuffer::texformat is just a copy of gl_renderbuffer::Format.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a376e5c48237be0300bce6702ed947086d3ee23f |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Consistently use no_batch_wrap in intel_context struct.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8e0f40d28777f1ae599a95312788fe29a0515a0d |
|
04-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing. This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
4a253431abf43a0638afb43605b44a8742b72a60 |
|
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
1f196b786d6bd0c6a5dbdc638574ff716cc3d4de |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'texformat-rework' Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
|
3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h And remove other unneeded #includes while we're at it.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
d6fbf87575a59e24c5d47b8b6b8700ee4583709b |
|
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
Revert "i915: don't validate PS program when falling back to software" This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It prevented the driver from ever recovering from a software fallback due to a program error. The original bug it claimed to fix doesn't appear to exist post-revert.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
|
01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
de80eeea0eebf00ee678b1a0fbd5fe67b00a8636 |
|
04-Aug-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for EXT_provoking_vertex.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
246729162ccc7e2672aa6cc957053ce3a8975a2c |
|
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add support for EXT_stencil_two_side and ATI_separate_stencil. Passes tests/stencil_twoside and glean/stencil2.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
94008088c1e6758a44a2f48c5a94db1f072d255a |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Move note_unlock() implementation to the one place it's needed.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
b30dc2c66aeaad6661eef515a08a3da89aa07cb2 |
|
10-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add an option for testing the effect of early Z in classic mode. The early Z stuff is supposed to be unsafe without some more work in the enable/disable path (in particular, how do we want to get it disabled on the way out to the X Server?), but at the moment is 6% in OA.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
165ae5e2fb57bdb64b4cf01271b4effeb811f675 |
|
04-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Don't rely on fence regs when we don't have to. We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
2c30fd84dfa052949a117c78d932b58c1f88b446 |
|
10-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels. Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
df73363ed1aa34cc0dc5feefb3933309591fa015 |
|
18-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fix abort issue. (bug #19147)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
0cade4de4f74f6b0e86fb6622e2fc370c73fd840 |
|
20-Oct-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't keep intel->pClipRects, and instead just calculate it when needed. This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
7d99ddcb2bb09f1f54d91e6e20e42d217a5bccdf |
|
26-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Fix a number of memory leaks on context destroy.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'"" This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'" This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
d2796939f18815935c8fe1effb01fa9765d6c7d8 |
|
08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode. To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a42dac187973cbc17be6c59db89264cbc935ab91 |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Accumulate the VB into a local buffer and subdata it in. This lets GEM use pwrite, for an additional 4% or so speedup.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
62d66caeba786f01f6159c980fda79606afe4c61 |
|
21-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Convert to using VBs instead of inline prims.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
407ce3da3c53c9ebba0fbf827d7b0f610122d44b |
|
11-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel-gem] Chase domain flag renaming in the DRM. This is an API breakage only.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
ab50ddaa9173ae108833db0edb209045788efc41 |
|
07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags. The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
f2a6404ef39b4985788aaf9ec8b540704e5aa92b |
|
17-Apr-2008 |
Dave Airlie <airlied@redhat.com> |
i915: check for depth region before accounting its buffer size fd.o bz #15573
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
96338dd1470bb088cbbe50d629cd30175245a784 |
|
16-Apr-2008 |
Dave Airlie <airlied@panoply-rh.(none)> |
intel: fix _mesa_error ctx I introduced at lsat minute
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
7cc7ff7051d427ff45b4d7d3664e2eecd13d0e13 |
|
16-Apr-2008 |
Dave Airlie <airlied@panoply-rh.(none)> |
intel/fake_bufmgr: Attempt to restrict references to objects in a batchbuffer > aperture size. So with compiz on Intel hw with fake bufmgr, opening 4 firefox windows at 1680x1050 and hitting alt-tab, could cause the batchbuffer to try and reference more than the 32MB of RAM allocated. Fix 1: Fix 1 is to pre-verify the list of buffers against the current batchbuffer and if it can't possibly fit in the aperture to flush the batchbuffer to the hardware and try again. If the buffers still can't fit well then you are hosed as I'm not sure there is a nice way to tell anyone. Fix 2: Next problem was that even with a simple check for total < aperture, we ran into fragmentation issues, this meant that half way down a set of buffers, we would fail as no blocks were available. Fix this by nuking the memory manager from orbit and letting it start again and relayout the blocks in a manner that fits. Fix 3: Finally the initial problem we were seeing was a memcpy to a NULL backing store. We seem to end up with a texture at some point that never gets mapped but ends up with data in it. compiz al-tab icons have this property. So I created a card dirty bit that memcpy's any buffer that is !static and is written to back to memory. This probably is wrong but it makes compiz work for now. Caveats: 965 support is still fail.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
0e34dcc6dfb466537f0e74d6c267d2f8bf795b66 |
|
25-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix the issue "VBO: Cannot allocate memory for a BO" on 965 after merging intel_context.c from i915 and i965. fix bug# 15152.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
fcb7cb9e72ecac7c165a3a6ed7a033e2e6793a26 |
|
13-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i965] multiple rendering target support
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8517079cbcbbf31291b05420f3b776df712dfd47 |
|
14-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Fix driver from cliprects changes, and clean up state emission. The fix for pageflipping with cliprects ended up causing a batch flush at an inopportune time, which is fixed by moving it up. Additionally, the recovery code for handling batch wraps at bad times is replaced by just checking for the space up front, and using a no_batch_wrap assert like on 965 to make sure that we weren't wrong about how much space that was.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a04b632350e5d0e9994fc667afc59407a39da0ba |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits. The previous change gave us only two modes, one which looped over the batch per cliprect (3d drawing) and one that didn't (state updeast). However, we really want 4: - Batch doesn't care about cliprects (state updates) - Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing) - Batch needs to be executed just once (region fills, copies, etc.) - Batch already includes cliprect handling, and must be flushed by unlock time (copybuffers, clears). All callers should now be fixed to use one of these states for any batchbuffer emits. Thanks to Keith Whitwell for pointing out the failure.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
5f86ae057a645c03dc1e0c51c2fb1b2628a50e0a |
|
09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Rename lost_hardware vtbl entry to new_batch. Both drivers have ended up relying on lost_hardware being called after each batch buffer, so update the name. This removes one of the calls on 965 whic h was outside of the batchbuffer handling code and just duplicating what had already happened through batchbuffer handling.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
e7044d552c6d16389447880b8744a51de1cf0199 |
|
04-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: don't validate PS program when falling back to software rendering. fix #12786
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
e2ca788ae700aae75bf8d024c1374c38cc5574f9 |
|
07-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fix the error in the previos commit.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
c1a3ac0e45d6b69d5567f80b76815b2e6997128d |
|
07-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Check the program size when uploading a program. fix bug 13494
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
a8fee3a498c8c4966d57a5273408477f3aa3ce73 |
|
15-Nov-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
i915: Catch cases where not all state is emitted for a new batchbuffer. This could lead to incorrect rendering or even lockups.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8cf9085bc7b96819d2bec1e749e15af58eefb2f3 |
|
24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Move i915tex driver into place as just i915.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
8fba8d2018643444fc17c590f3e8732e1a76c6b8 |
|
24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Remove the old i915 driver now that i915tex works without TTM.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
10f5a6ac85fb5f78069b7314e40a2a23e2636192 |
|
29-Jul-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix fallback crashes when driver can't handle frag prog for i915 driver too (untested)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
0bf2479aef5def4d01bfc55b08992f41664f1431 |
|
07-Jul-2007 |
Brian <brian.paul@tungstengraphics.com> |
Add case for GL_QUADS in i915_reduced_primitive_state(). The t_dd_tritemp.h code can emit GL_QUADS primitives. We need to catch that case to determine if polygon stipple should be enabled. Fixes bug reported by Carlos Diógenes on 4 July 2007.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
3e45db67294faaf0a06c42bdd6dbdb96f87c8801 |
|
27-Mar-2007 |
Brian <brian@nostromo.localnet.net> |
Restore the UseTexEnvProgram logic. Was removed during glsl-compiler work. Still need to go back and revisit this because of the interaction with fragment shaders...
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
23d31efc167f09d47635352f697ffcb087d3ebbd |
|
21-Mar-2007 |
Brian <brian@yutani.localnet.net> |
merge from master
|
77544d7b7d7c6fd03c0df81dca07f1bb3a67c119 |
|
18-Mar-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
fix off-by-one in load_state_immediate
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
064ae479a770bf434958d673baf6f7530f642697 |
|
23-Feb-2007 |
Brian <brian@yutani.localnet.net> |
Update DRI drivers for new glsl compiler. Mostly: - update #includes - update STATE_* token code
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
4b4632f94c726c19d3c1efd05ceb5770a430cefd |
|
15-Dec-2006 |
Brian <brian@yutani.localnet.net> |
vertex/fragment program field changes
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
d886423b3c0b800656ba5d4c6480bba90f8e5981 |
|
10-Oct-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Use the mesa-provided texenv program rather than rolling our own. Turn on texture crossbar support.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
bd87c303e94659941a7c623d0b836e3ff317cfb4 |
|
18-Aug-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Fix writemasks on texture arb fp instructions. Cleanup invarient state emission.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
39c492bb14d706ffa8bf04f78048c05de735492b |
|
23-Jan-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add Intel 945GM support Add rotation support (Tungsten Graphics)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
948fa3b295d384592ebc9396413a38aba4edf4a6 |
|
10-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
get fog working with _TexEnvProgram
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
435eff8b852f59e13554a57f83a48bf8035ec794 |
|
09-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
i915 will use _TexEnvProgram (if active)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
869fc59b63ee99ced26fbfa02492abb8cd16586d |
|
01-Jul-2004 |
Alan Hourihane <alanh@tungstengraphics.com> |
fix for older gcc's (from freedesktop bug id #419)
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
594c3f67ac8fceb061e47b090ec4d149c55a1940 |
|
18-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
add missing license texts
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|
41b58954e1742493452b91d9ecdb761db5de3bed |
|
10-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
New driver for i915 as well as older i830/i845/i865 chipsets.
/external/mesa3d/src/mesa/drivers/dri/i915/i915_vtbl.c
|