| 74d7ef0961b3aace03aea88944155272ac341b59 |
|
08-Jan-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Remove BRW_NEW_URB_FENCE dirty bit from Gen6+ atoms.
The BRW_NEW_URB_FENCE dirty bit is only flagged by the
brw_recalculate_urb_fence state atom which isn't used on Gen6+.
Since it's never flagged, there's no reason to depend on it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 9308f298300beaa757194a0db8ed50924754c011 |
|
28-Nov-2011 |
Paul Berry <stereotype441@gmail.com> |
i965 gen6: Initial implementation of transform feedback.
This patch adds basic transform feedback capability for Gen6 hardware.
This consists of several related pieces of functionality:
(1) In gen6_sol.c, we set up binding table entries for use by
transform feedback. We use one binding table entry per transform
feedback varying (this allows us to avoid doing pointer arithmetic in
the shader, since we can set up the binding table entries with the
appropriate offsets and surface pitches to place each varying at the
correct address).
(2) In brw_context.c, we advertise the hardware capabilities, which
are as follows:
MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS 64
MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS 4
MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS 16
OpenGL 3.0 requires these values to be at least 64, 4, and 4,
respectively. The reason we advertise a larger value than required
for MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS is that we have already
set aside 64 binding table entries, so we might as well make them all
available in both separate attribs and interleaved modes.
(3) We set aside a single SVBI ("streamed vertex buffer index") for
use by transform feedback. The hardware supports four independent
SVBI's, but we only need one, since vertices are added to all
transform feedback buffers at the same rate. Note: at the moment this
index is reset to 0 only when the driver is initialized. It needs to
be reset to 0 whenever BeginTransformFeedback() is called, and
otherwise preserved.
(4) In brw_gs_emit.c and brw_gs.c, we modify the geometry shader
program to output transform feedback data as a side effect.
(5) In gen6_gs_state.c, we configure the geometry shader stage to
handle the SVBI pointer correctly.
Note: ordering of vertices is not yet correct for triangle strips
(alternate triangles are improperly oriented). This will be addressed
in a future patch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| d4976158c7f32705b48c773c3abd1b22bebe9c16 |
|
29-Nov-2011 |
Paul Berry <stereotype441@gmail.com> |
i965 gen6: Implement pass-through GS for transform feedback.
In Gen6, transform feedback is accomplished by having the geometry
shader send vertex data to the data port using "Streamed Vertex Buffer
Write" messages, while simultaneously passing vertices through to the
rest of the graphics pipeline (if rendering is enabled).
This patch adds a geometry shader program that simply passes vertices
through to the rest of the graphics pipeline. The rest of transform
feedback functionality will be added in future patches.
To make the new geometry shader easier to test, I've added an
environment variable "INTEL_FORCE_GS". If this environment variable
is enabled, then the pass-through geometry shader will always be used,
regardless of whether transform feedback is in effect.
On my Sandy Bridge laptop, I'm able to enable INTEL_FORCE_GS with no
Piglit regressions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 911768700ed63c937bfcc75ec9afcfd1aa66f690 |
|
16-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6: Remove state flagging on BRW_NEW_CURBE_OFFSETS.
That flag was leftover from gen4, where brw_curbe.c is choosing ranges
of the CURBE space for constants to live in, and the unit state tells
where to load them from. That's not the case on gen6 -- we don't set
this flag (since constants aren't in the URB), nor do we have any
state like that to upload.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| c173541d9769d41a85cc899bc49699a3587df4bf |
|
27-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Use state streaming on programs, and state base address on gen5+.
There will be a little bit of thrashing of the program cache BO as the
cache warms up, but once the application is in steady state, this
reduces relocations on gen5 and later.
On my T420 laptop, cairogl firefox-talos-gfx performance improves 2.6%
+/- 1.3% (n=6). No statistically significant performance difference
on nexuiz (n=5).
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 35b3f597bd1729da4483857cc0e88e81fb2a2419 |
|
11-Apr-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Never enable the GS on Gen6.
Prior to Gen6, we use the GS for breaking down quads, quad-strips,
and line loops. On Gen6, earlier stages already take care of this,
so we never need the GS.
Since this code is likely completely untested, remove it for now.
We can write new code when enabling real geometry shaders.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| e31defc825ee94f1d1092e277954abad7097c552 |
|
04-Jan-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Rename various gen6 #defines to match the documentation.
This should make it easier to cross-reference the code and hardware
documentation, as well as clear up any confusion on whether constants
like CMD_3D_WM_STATE mean WM_STATE (pre-gen6) or 3DSTATE_WM (gen6+).
This does not rename any pre-gen6 defines.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 2595589f1df351895bc5b1a92f19e995a19da15b |
|
19-Oct-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
These were for debugging in bringup. Now that relatively complicated
apps are working, they haven't helped debug anything in quite a while.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 7319b19fc94c3b49d19b8bf9ce52dc17db3ac6f3 |
|
20-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Force single program flow in SNB GS, to match gen4 GS.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| c76d4db25260dd68684bf784efacd7323c7cab8b |
|
26-Feb-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 078e7b62f69658e40aedea59cf6f005162a29f83 |
|
24-Feb-2010 |
Eric Anholt <eric@anholt.net> |
i965: Emit SNB FF unit state after the unit's push constants.
There's a BUN for the WM unit that says WM_STATE must immediately
follow PS_CONSTANTS, which this addresses. Presumably other units are
roughly the same, too.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 5878c841e90a8006715877045aa95a752472eaab |
|
01-Feb-2010 |
Eric Anholt <eric@anholt.net> |
i965: Set GS rendering enabled even when the GS stage is disabled.
This is copying the behavior of other drivers.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| dd743fa36fa9303c2a2d0e7d3798fdc00ef43287 |
|
18-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i965: Fixup Sandybridge GS packet from doc updates.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| d971375bc1872cb2d95a710e3d62f5b037fbe7f7 |
|
29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Giant pile of flushing to track down SNB bringup issues.
This should go away before we push the code.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 98f9666f04eed9ae873fdea20c4c4b9db6cead84 |
|
04-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i965: Get vp-tri batchbuffers running (no rendering).
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|
| 520b64ddfb4c2efa742bc2217fef96fdec5eea9b |
|
27-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Add untested passthrough GS setup.
/external/mesa3d/src/mesa/drivers/dri/i965/gen6_gs_state.c
|