| c738ea1191cd1b5a0dc60b0e6d05fd918083e961 |
|
18-Jul-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()
A lot of code was still differentiating between between winsys and
user fbos by testing the fbo's name against zero. This converts
everything in the i915 and 965 drivers over to use _mesa_is_user_fbo()
and _mesa_is_winsys_fbo().
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| d59466279e45a1e9c3f9081f72fedbdf961afbe1 |
|
03-Feb-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Avoid divide by zero for very small linear blits
If size is small (such as 1),
pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
makes pitch = 0. Then
height = size / pitch;
causes a division-by-zero exception. If pitch is zero, set height to
1 and avoid the division.
This fixes piglit's bin/getteximage-formats test and glean's
bufferObject test.
NOTE: This is a candidate for the 8.0 release branch.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44971
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: use intel_rb_format() to get renderbuffer format
This will make future changes cleaner and less invasive.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 9a548c27aa704236cc1d8a5d4ebf68cea9c5c99c |
|
12-Jan-2012 |
Brian Paul <brianp@vmware.com> |
mesa: remove _mesa_ffs(), implement ffs() for non-GNU platforms
Call ffs() and ffsll() everywhere. Define our own ffs(), ffsll()
functions when the platform doesn't have them.
v2: remove #ifdef _WIN32, __IBMC__, __IBMCPP_ tests inside ffs()
implementation. The #else clause was recursive.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Alexander von Gluck <kallisti5@unixzen.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 8aa7fa770c4ae7660b37ea9d8f496bd6e62d3df8 |
|
28-Dec-2011 |
Eric Anholt <eric@anholt.net> |
intel: Fix pitch handling for linear blits.
The new assert in intelEmitCopyBlit() gets angry if we don't align to
dwords. Rather than make the assert have a special case for height ==
1 on the assumption that the hardware doesn't use it in that case,
just supply a correct pitch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43214
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| da2816a45e6e3a33246a341fee72e6f893f315d9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_renderbuffer::region with a miptree [v3]
Essentially, this patch just globally substitutes `irb->region` with
`irb->mt->region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
v2:
- Return early in intel_process_dri2_buffer_*() if region allocation
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
v3:
- [anholt] Fix check for hiz allocation failure. Replace
``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a1488eec38d5a76f4e04245a6ce8302444800805 |
|
01-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add safety asserts for the blit engine's pitch alignment requirements.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| fd99cd0e10849205749aad580fea8c970fb46a31 |
|
29-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add a helper function for getting miptree size from a texture image.
With 1D array textures, we no longer agree between the GL information
about width/height/depth of a texture and how we lay out a miptree.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function.
We call all the other drm_intel_bo pointers in intel/*.h "bo", so this
one was rather out of place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| fa2c886863492cc3eeee6d2059ae24edc1cb2bff |
|
17-Sep-2011 |
Brian Paul <brianp@vmware.com> |
intel: make intel_texture_image a subclass of swrast_texture_image
We need to subclass swrast_texture_image because if we use swrast for
fallback rendering, we'll need to have swrast_texture_image objects.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 81a86aea4f0990a1b8795f9e00e7a6c4ba368281 |
|
14-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
mesa/colormac: introduce inline helper for 4 unclamped float to ubyte.
This introduces an UNCLAMPED_FLOAT_TO_UBYTE x 4 inline function, as
suggested by Brian. It uses it in a few places I noticed from previous
color changes, and also some core mesa places. I haven't updated other places
yet.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 093dc9e548537e6c77e33064a584f849ad90dfa5 |
|
12-Sep-2011 |
Dave Airlie <airlied@redhat.com> |
mesa: introduce a clear color union to be used for int/unsigned buffers
This introduces a new gl_color_union union and moves the current
ClearColorUnclamped to use it, it removes current ClearColor completely and
renames CCU to CC, then all drivers are modified to expected unclamped floats instead.
also fixes st to use translated color in one place it wasn't.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 7dae1aaf142999e3cfeafb13d30abda667d66d87 |
|
15-Jul-2011 |
Brian Paul <brianp@vmware.com> |
intel: use new gl_texture_image:Face, Level fields
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| b17aab5753a6d14c9e757bedb186963b2dae8823 |
|
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
It was originally located in the region because the tracking of
depth/color buffers was on the regions, and getting back to the irb
would have been tricky. Now, we're keying off of the renderbuffer in
more places, which means we can move these fields where they belong.
This could fix potential rendering failure with a single texture
having multiple images attached to different renderbuffers across
shareCtx (as far as I can tell, this was the only failure we could
cause, since anything else should trigger intel_render_texture in
between, for example a BindFramebuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 87478cd6e3e6349abc2688b390f8845d1e21af3d |
|
15-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_texture_float.
For 1 and 2-channel formats the hardware only supports rendering to R
and RG. To do I and L render targets we just call them R and
everything works out. For A, we would need to rewrite the CC to do
the alpha channel's blending on color instead, and send the fragment
alpha down the red channel. For LA, there doesn't seem to be any
hope, because we can't do independent color/alpha blending while
treating the LA surface as RG.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 0bbbeba2db0f3fd382d2f591bebc248c5ed40fb5 |
|
16-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add support for blit copies of >32bpp formats.
The blitter only does up 32bpp at a time, so we handle it by mangling
coordinates and calling the surface 32bpp.
Fixes ARB_texture_rg/fbo-generatemipmap-formats-float with ARB_texture_float.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c40b7910ee1338b9d391816df5391ce43f509ef0 |
|
31-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Fix regression in clear_with_blit from 7bae1c3d
Oops, the mask was being used in the loop to determine whether to use
include the stencil || depth values. This began to fail when mask was
cleared at the beginning of the loop. So reorder the tests and do the
work up-front along with determining the depth_stencil value to use.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35822
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 7bae1c3d85344b7229e0124d1f54376392682430 |
|
29-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Protect intel_clear_with_blit from failed buffer allocations
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34419
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 30fef21aa34667d332669f1445de74b49994eb0e |
|
03-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Use tri clears when we don't know how to blit clear the format.
Bug #32207. Fixes ARB_texture_rg/fbo-clear-formats (see my
fbo-clear-formats piglit branch currently)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| bf4dffb8ef5d02cbb4c5ff6d68b761a11d04a612 |
|
24-Dec-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 290a1141bc561cbd8fd2bbbb0a7c24d1b6abe0b4 |
|
15-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Support glCopyTexImage() from XRGB8888 to ARGB8888.
The only mismatch between the two is that we have to clear the
destination's alpha to 1.0. Fixes WOW performance on my Ironlake,
from a few frames a second to almost playable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c27285610c9f9b50d06bf0f2725da195937cb48d |
|
13-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for using the BLT ring on gen6.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| efb0417040f4bdd55cf07dd8f54ecd4fc92c1286 |
|
09-Nov-2010 |
Peter Clifton <pcjc2@cam.ac.uk> |
intel: Add assert check for blitting alignment.
Also fixup code comment to reflect that the GPU requires DWORD
alignment, but in this case does not actually pass the value "in
DWORDs" as I previously stated.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 10b9e018ca4b37c66a6e0215d4551ed74b4981a6 |
|
06-Nov-2010 |
Peter Clifton <pcjc2@cam.ac.uk> |
intel: Fix emit_linear_blit to use DWORD aligned width blits
The width of the 2D blits used to copy the data is defined as a 16-bit
signed integer, but the pitch must be DWORD aligned. Limit to an integral
number of DWORDs, (1 << 15 - 4) rather than (1 << 15 -1).
Fixes corruption to data uploaded with glBufferSubData.
Signed-off-by: Peter Clifton <pcjc2@cam.ac.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 638342858894293246400d95a90d153c7f66719a |
|
25-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for GL_ALPHA framebuffer objects.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 562e2d114ec0cba879463980522d1d54af9444e6 |
|
14-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Support INTEL_DEBUG=clip to dump the clip program.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 9599da33742b727ba714618d2d14c0486e0408f6 |
|
08-Apr-2010 |
Li Peng <peng.li@intel.com> |
intel: Call intel_prepare_render() in intelClear()
Make sure we have up to date buffers before we start looking at
the tiling bits to determine how to clear.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 6422cf387baef75df9e5dbbed5cea4c0f495fe41 |
|
22-Mar-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Call intel_prepare_render() before looking up regions.
Fixes #27213.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 30446f8a708a647401e58da11de2dc464e37823c |
|
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Return false like other blit failure paths if out of aperture.
The primary consumer of this (miptree relayout) already has this code
for handling failure, and the other paths want to know if failure
actually occurs and do something appropriate, which may not include
memcpy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 1a77f8af9bc9982d76a7f602712eb1a5c23ec14e |
|
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Assert that the linear blits succeed.
We don't have any fallback code here, and we want to avoid this path
if failure would happen, so just assert.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support.
Shaves 60k off the driver from removing the broken spans code. This
means we now require 2.6.29, which seems fair given that it's a year
old and we've removed support for non-KMS already in the last release
of 2D.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 06d1472ffa0648efa9374fa227894fbf0b0be054 |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Tell the kernel when we actually need fence registers on our BOs.
This improves tiled texture performance of OA on my 945 from 25.3fps
to 29.0fps, whereas untiled is 28.2fps, by avoiding stalls for fence
register changes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 55e90e46e0f4f3f8b5da334d84fefb65b9b3d45b |
|
02-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Use GTT mapping in the blit fallback path in case there's tiling.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 554a8f4026459406e7d3ed4e7017a88a57492ddf |
|
03-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Start adding defines and some bits for sandybridge bringup.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| d449627829e1a4a3250a1a723af2f4e3cd5fd194 |
|
18-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement the DRI2 invalidate function properly
This uses a stamp mechanisms to mark the DRI drawable as invalid.
Instead of immediately updating the buffers we just bump the drawable
stamp and call out to DRI2GetBuffers "later".
"Later" used to be at LOCK_HARDWARE time, and this patch brings back
callouts at the points where we used to call LOCK_HARDWARE. A new function,
intel_prepare_render(), is called where we used to call LOCK_HARDWARE,
and if the buffers are invalid, we call out to DRI2GetBuffers there.
This lets us invalidate buffers only when notified instead of on
every glViewport() call. If the loader calls the DRI invalidate
entrypoint, we disable viewport triggered buffer invalidation.
Additionally, we can clean up the old viewport mechanism a bit,
since we can just invalidate the buffers and not worry about
reentrancy and whatnot.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 67e5fd73973eaedf5ec6e0b5139b61f6196fb35c |
|
05-Feb-2010 |
Eric Anholt <eric@anholt.net> |
intel: Check aperture size when doing a blit glClear.
Fixes failure in cairo-gl firefox-planet-gnome.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a44219c5543ade267f668312e1faf773c41eedb8 |
|
30-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Fix inverting of inversion test for windows in glClear cleanup.
Bug #26290.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c8e6a0f2f8637d803006d207bb2fb8e4292bdb28 |
|
27-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Use a handy helper in glReadPixels source clipping.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3efd88f183485fc8a4cde3ec306c6a9191477902 |
|
27-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove DRI1 junk from glClear blit implementation.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| fb6bff3712d71cfe131fbf70154d326cdf39e7c8 |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 01dc463e5d5513e059eea601710cd4babe02610d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop LOCK/UNLOCK_HARDWARE()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3566bc7584475daa852f4d5735a81a28c032297d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 SwapBuffer implementation
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| d61f07318c8678901b948fdaa8ccdf37aa3203e9 |
|
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Remove leftover __DRI{screen,drawable,context}Private references
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 5727147f894137f194d8efc7adb81b80a9b5acd7 |
|
22-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove unused stored values reported by clang.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a087eb590d780cb82b49464e05ffc85123adce7e |
|
11-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/gallium/state_trackers/xorg/xorg_xv.c
src/mesa/drivers/dri/intel/intel_span.c
|
| 3078bd136d6ee1d9ad16b4c834cad23b005304a4 |
|
08-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Axe intel_renderbuffer::texformat
Since the texformat branch merge, the value of intel_renderbuffer::texformat
is just a copy of gl_renderbuffer::Format.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c4b7c47fe3135f852919cf2d4a2f64210e8cf125 |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Pack colors for blit at blit time, rather than at ClearColor.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 4a253431abf43a0638afb43605b44a8742b72a60 |
|
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support
Pass a gl_format to intel_create_renderbuffer() instead of GLenum.
Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers.
However, we don't yet create any renderbuffers or textures with that
format. It seems the default alpha value is zero instead of one.
Need to investigate that first.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 1f196b786d6bd0c6a5dbdc638574ff716cc3d4de |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'texformat-rework'
Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
|
| 49d402e275cdaf46de8db5a475dfe00509141195 |
|
23-Oct-2009 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/mesa_7_6_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_fbo.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.h
src/mesa/drivers/dri/intel/intel_tex_copy.c
src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2d17dbfb5346b6d75e87c839148cbe125bf5cd6d |
|
09-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Keep track of x,y offsets in miptrees and use them for blitting.
By just using offsets, we confused the hardware's tiling calculations,
resulting in failures in miptree validation and blit clears.
Fixes piglit fbo-clearmipmap.
Bug #23552. (automatic mipmap generation)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h
And remove other unneeded #includes while we're at it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3d78a86cd777aecce544d14b85177a71e9c142ce |
|
02-Oct-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove an unexplained flush from intelClearWithBlit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
|
01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| e61215242b977f8422b3284b4b2b0c853daf50ca |
|
08-Sep-2009 |
Brian Paul <brianp@vmware.com> |
intel: #include clean-ups
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 2d5c74fac3cc0f9d45a9e11b2fcdea1bc67928c4 |
|
27-Aug-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for GL_ARB_map_buffer_range.
Passes glean's bufferObject test, and should provide good performance in the
cases applications are expected to use.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| b82abaabee3a0d0d8ec3418e8299cad1985a2776 |
|
08-Aug-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add some more safety asserts in the blit code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3927874d9c7fafb61651d0fc69547c8e010181f5 |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 1593a1bb3435728806f66fff72a90e72a9616083 |
|
23-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Bail on blits with non-tile-aligned offsets.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 8f81a6468fdbc7320800ea497791e3e1b8f782ca |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Avoid trying to do blits to Y tiled regions.
This is somewhat nasty, but we need to do Y-tiled depth for FBO support.
May help with corruption and hangs since enabling texture tiling, and
since switching depth textures to Y tiled.
Fixes piglit depthtex.c on 965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 6a49473ab5797b1e6ce021e396902f9cb77674ef |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove long-unused intel_region_fill and intelEmitFillBlit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 2c30fd84dfa052949a117c78d932b58c1f88b446 |
|
10-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.
Also enable them all regardless of screen bpp, as 32 bpp what I've been
testing against, and haven't been able to detect any screen bpp-specific
troubles with them.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| fd83289dbf747b4d2e0849f77c796323e5517f0b |
|
02-Feb-2009 |
Roland Scheidegger <sroland@vmware.com> |
fix various small intel blitter issues
use color format constants instead of magic numbers
remove handling of cpp 0 or 3 (neither is possible) in various places
don't misconfigure 8 bit surface blits as rgb565
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 19e134051c1025bbfe3838108492d705ab2b5b8b |
|
06-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix bpp setting of blits to 8bpp targets.
This was causing hangs in cairogears, as we would blit to the 8bpp target
(A8 texture) as 16bpp, and stomp over state objects.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f085147258713741895945dcb81fdb251bb6c9cc |
|
05-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove a gratuitous MI_FLUSH after clearing with a blit.
The 3D destination shares the same cache so we don't have any trouble with
the later commands needing the writes flushed inside of the same batchbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| b5da7feee03abd7ca52312476bd75d28d1afddf4 |
|
14-Jan-2009 |
Owain G. Ainsworth <oga@openbsd.org> |
Remove intel pageflipping support in its entirety.
It's been broken and deprecated for a while, so it's time to die. This has the
wonderful benefit of cleaning up the code a fair amount; making it marginally
less twisty.
I'm unsure if the for loops in IntelWindowMoved are still needed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a0d5c3cfe6582f8294154f6877319193458158a2 |
|
08-Dec-2008 |
Pierre Willenbrock <pierre@pirsoft.de> |
intel: Require the right amount of space in glBitmap blit acceleration.
This leads to problems when the batchbuffer is flushed, but the bitmap
data could not fit into it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 3e0164aabb48a99fce58964cad99fd3978ee84f6 |
|
21-Nov-2008 |
Eric Anholt <eric@anholt.net> |
i965: Add support for accelerated CopyTexSubImage.
There were hacks in EmitCopyBlit before to adjust offsets so that y=0 after
the offsets had been adjusted for a negative pitch. It appears that those
hacks were due to an unclear and surprising aspect of the hardware: inverting
the pitch results in the blit into the specified rectangle being inverted,
without the user needing to adjust y and base offset.
Tested with piglit copytexsubimage test on 915GM and GM965. Should fix
serious performance issues with ETQW and other applications.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 0cade4de4f74f6b0e86fb6622e2fc370c73fd840 |
|
20-Oct-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't keep intel->pClipRects, and instead just calculate it when needed.
This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time. Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 2a877411dbe35abdd8c15fb4821d9232619d89cc |
|
26-Oct-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: GL_FALSE on a BO if it won't be modified when mapping this BO. (thanks Eric).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f657c8191128c500c2aa7204009154a1182e2abd |
|
24-Oct-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fallback for intelEmitCopyBlit.
Use _mesa_copy_rect instead of BLT operation if dri_bufmgr_check_aperture_space
still fails after flushing batchbuffer. Partial fix for #17964.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
|
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| d2796939f18815935c8fe1effb01fa9765d6c7d8 |
|
08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 1e645b365900cf1c71ca5594bd6b549a1f203040 |
|
26-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into drm-gem
Conflicts:
src/mesa/drivers/dri/common/dri_bufmgr.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
|
| 2e841880cfc1006a2818d4a8bfefd21136dc39a9 |
|
11-Jul-2008 |
Eric Anholt <eric@anholt.net> |
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| b52398571b7f5c537c2f5e1c87f1b8bdf3d8ea9b |
|
10-Jul-2008 |
Dave Airlie <airlied@linux.ie> |
intel: fix batch flushing problem with cliprects handling.
pointed out and debugged by stringfellow on #dri-devel
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 93f701bc3619864ac6f067d37212e96545a57e16 |
|
26-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f6abe8f0f2fba3073b58b96ed38aae163c765b4a |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| eda68cccc072c10f94c096b9877d09a787069631 |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Add support for accelerated glBitmap, shared from 965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 654258a4fe5e7114022c6e02f2844fc469fcc6f3 |
|
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| cf29ab3ba075905cca786b52617d7dc993f58033 |
|
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Bug #14313: Fix accelerated (PBO) ReadPixels.
Refactoring of mine in 02d5ba849197e19843dad164239b51f18fb16faf broke it
by failing to understand that the masking was about sign extension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 407ce3da3c53c9ebba0fbf827d7b0f610122d44b |
|
11-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel-gem] Chase domain flag renaming in the DRM.
This is an API breakage only.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 924eaa2f955ecdc1080f5a8fdc165367a576a919 |
|
26-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel] all flushing in intelEmitCopyBlit
Add both MI_FLUSH and intel_batchbuffer_flush to intelEmitCopyBlit.
This ensures that the data are flushed *and* the gem kernel driver sees the
various memory domain transitions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a74bf4ef345d880d7d296313fed0240781d2ebd8 |
|
23-May-2008 |
Eric Anholt <eric@anholt.net> |
Emit a flush after the swapbuffers blit, so contents end up on the screen.
Otherwise, since the MI_FLUSH at the end of every batch had been removed,
non-automatic-flushing chips (965) wouldn't get flushed and apps with static
rendering would get partial screen contents until the server's blockhandler
flush kicked in.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| ab50ddaa9173ae108833db0edb209045788efc41 |
|
07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae |
|
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.
Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them. The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 008653ac55776d6b1c6d1627ad20937aa1c4dbda |
|
17-Apr-2008 |
Dave Airlie <airlied@redhat.com> |
i965: initial attempt at fixing the aperture overflow
Makes state emission into a 2 phase, prepare sets things up and accounts
the size of all referenced buffer objects. The emit stage then actually
does the batchbuffer touching for emitting the objects.
There is an assert in dri_emit_reloc if a reloc occurs for a buffer
that hasn't been accounted yet.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 7cc7ff7051d427ff45b4d7d3664e2eecd13d0e13 |
|
16-Apr-2008 |
Dave Airlie <airlied@panoply-rh.(none)> |
intel/fake_bufmgr: Attempt to restrict references to objects in a batchbuffer > aperture size.
So with compiz on Intel hw with fake bufmgr, opening 4 firefox windows at 1680x1050 and hitting alt-tab, could cause the batchbuffer to try and reference more than the 32MB of RAM allocated.
Fix 1:
Fix 1 is to pre-verify the list of buffers against the current batchbuffer and if it can't possibly fit in the aperture to flush the batchbuffer to the hardware
and try again. If the buffers still can't fit well then you are hosed as I'm not sure there is a nice way to tell anyone.
Fix 2:
Next problem was that even with a simple check for total < aperture, we ran
into fragmentation issues, this meant that half way down a set of buffers,
we would fail as no blocks were available. Fix this by nuking the memory
manager from orbit and letting it start again and relayout the blocks in a
manner that fits.
Fix 3:
Finally the initial problem we were seeing was a memcpy to a NULL backing store.
We seem to end up with a texture at some point that never gets mapped but ends up with data in it. compiz al-tab icons have this property. So I created a card dirty bit that memcpy's any buffer that is !static and is written to back to memory. This probably is wrong but it makes compiz work for now.
Caveats:
965 support is still fail.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c5c73c1b605611faf0f06df9b5d08d8984388238 |
|
21-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
Hook up i915 driver to new DRI2 infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| a04b632350e5d0e9994fc667afc59407a39da0ba |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 33c42c126272a4db879315127ef0fff711f1db8a |
|
10-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Prepare intelCopyBuffer() for private back buffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 601a6b872c33bfe3cb4ea03a5a8ba5ebe92dedaf |
|
07-Jan-2008 |
Brian <brian.paul@tungstengraphics.com> |
Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexes
Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask.
The number of active color buffers is specified by _NumColorDrawBuffers.
This builds on the previous DrawBuffer changes and will help with drivers
implementing GL_ARB_draw_buffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| bea6b5fe5aa3138cec8d057766ae48da4aa57dee |
|
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Enable EXT_framebuffer_object.
To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 33487c15ba8324bf0b635293214cad246661915e |
|
18-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Improve INTEL_DEBUG=blit description of clearing.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c1d6b874b35dd353b2f9862b47aadb52a812a4aa |
|
17-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Cleanup of */intel_blit.c to bring the two closer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 |
|
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 63e6bfe8db10313c7f48de0b8ddbcd6b47f7e327 |
|
09-Nov-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Some additional blit fixes and assertions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| f00a64999c197e6a96e65fd00f64224a6f22c9fa |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|