Cross Reference: /external/llvm/lib/Target/R600/SIISelLowering.cpp

Lines Matching refs:SL
372                                          SDLoc SL, SDValue Chain,
384   SDValue BasePtr =  DAG.getCopyFromReg(Chain, SL,
386   SDValue Ptr = DAG.getNode(ISD::ADD, SL, MVT::i64, BasePtr,
392                      VT, SL, Chain, Ptr, PtrOffset, PtrInfo, MemVT,
1044   SDLoc SL(Op);
1063         return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0));
1066       return DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS);
1073     SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS);
1074     return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip);
1090   SDLoc SL(Op);
1094   SDValue r1 = DAG.getNode(ISD::FABS, SL, MVT::f32, RHS);
1106   SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT);
1108   SDValue r3 = DAG.getNode(ISD::SELECT, SL, MVT::f32, r2, K1, One);
1110   r1 = DAG.getNode(ISD::FMUL, SL, MVT::f32, RHS, r3);
1112   SDValue r0 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, r1);
1114   SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, LHS, r0);
1116   return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul);
1123   SDLoc SL(Op);
1131   SDValue DivScale0 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, Y, Y, X);
1133   SDValue NegDivScale0 = DAG.getNode(ISD::FNEG, SL, MVT::f64, DivScale0);
1135   SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0);
1137   SDValue Fma0 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Rcp, One);
1139   SDValue Fma1 = DAG.getNode(ISD::FMA, SL, MVT::f64, Rcp, Fma0, Rcp);
1141   SDValue Fma2 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Fma1, One);
1143   SDValue DivScale1 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, X, Y, X);
1145   SDValue Fma3 = DAG.getNode(ISD::FMA, SL, MVT::f64, Fma1, Fma2, Fma1);
1146   SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3);
1148   SDValue Fma4 = DAG.getNode(ISD::FMA, SL, MVT::f64,
1160     SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X);
1161     SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y);
1162     SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0);
1163     SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1);
1165     SDValue NumHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, NumBC, Hi);
1166     SDValue DenHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, DenBC, Hi);
1169       = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale0BC, Hi);
1171       = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale1BC, Hi);
1173     SDValue CmpDen = DAG.getSetCC(SL, MVT::i1, DenHi, Scale0Hi, ISD::SETEQ);
1174     SDValue CmpNum = DAG.getSetCC(SL, MVT::i1, NumHi, Scale1Hi, ISD::SETEQ);
1175     Scale = DAG.getNode(ISD::XOR, SL, MVT::i1, CmpNum, CmpDen);
1180   SDValue Fmas = DAG.getNode(AMDGPUISD::DIV_FMAS, SL, MVT::f64,
1183   return DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, MVT::f64, Fmas, Y, X);
1416   SDLoc SL(N);
1419   SDValue ShlX = DAG.getNode(ISD::SHL, SL, VT, N0.getOperand(0), N1);
1422   return DAG.getNode(ISD::ADD, SL, VT, ShlX, COffset);
1579   SDLoc SL(N);
1599       return DAG.getNode(AMDGPUISD::FP_CLASS, SL, MVT::i1,