Searched refs:right (Results 1 - 15 of 15) sorted by relevance

/art/runtime/gc/space/
H A Dregion_space-inl.h286 size_t right = left; local
287 DCHECK_LT(right, left + num_regs)
289 while (right < left + num_regs) {
290 if (regions_[right].IsFree()) {
291 ++right;
298 // right points to the one region past the last free region.
299 DCHECK_EQ(left + num_regs, right);
305 for (size_t p = left + 1; p < right; ++p) {
318 // right points to the non-free region. Start with the one after it.
319 left = right
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/art/compiler/optimizing/
H A Dbounds_check_elimination.cc45 // Return whether (left + right) overflows or underflows.
46 static bool WouldAddOverflowOrUnderflow(int32_t left, int32_t right) { argument
47 if (right == 0) {
50 if ((right > 0) && (left <= INT_MAX - right)) {
54 if ((right < 0) && (left >= INT_MIN - right)) {
67 HInstruction* right = bin_op->GetRight(); local
68 if (right->IsIntConstant()) {
70 int32_t c = right
95 int32_t right; local
367 int32_t right = 0; local
1188 HandleIfBetweenTwoMonotonicValueRanges(HIf* instruction, HInstruction* left, HInstruction* right, IfCondition cond, MonotonicValueRange* left_range, MonotonicValueRange* right_range) argument
1254 HandleIf(HIf* instruction, HInstruction* left, HInstruction* right, IfCondition cond) argument
1536 HInstruction* right = cond->GetRight(); local
1574 HInstruction* right = add->GetRight(); local
1589 HInstruction* right = sub->GetRight(); local
1648 HInstruction* right = instruction->GetRight(); local
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H A Dinstruction_simplifier.cc328 HInstruction* right = instruction->GetRight(); local
330 bool right_is_neg = right->IsNeg();
338 HNeg* neg = left_is_neg ? left->AsNeg() : right->AsNeg();
349 HInstruction* other = left_is_neg ? right : left;
636 HInstruction* right = instruction->GetRight(); local
646 HNeg* neg = new (allocator) HNeg(type, right);
653 if (left->IsNeg() && right->IsNeg()) {
659 if (right->IsNeg() && right->HasOnlyOneNonEnvironmentUse()) {
665 HAdd* add = new(GetGraph()->GetArena()) HAdd(type, left, right
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H A Dnodes.h1865 HInstruction* right) : HExpression(result_type, SideEffects::None()) {
1867 SetRawInputAt(1, right);
1876 // Put constant on the right.
1880 HInstruction* right = InputAt(1); local
1881 if (left->IsConstant() && !right->IsConstant()) {
1882 ReplaceInput(right, 0);
1889 // Order inputs by instruction id, but favor constant on the right side.
1894 HInstruction* right = InputAt(1); local
1895 if (left == right || (!left->IsConstant() && right
1863 HBinaryOperation(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2690 HAdd(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2710 HSub(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2728 HMul(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2744 HDiv(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument
2772 HRem(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument
2826 HShl(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2840 HShr(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2854 HUShr(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2877 HAnd(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2893 HOr(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
2909 HXor(Primitive::Type result_type, HInstruction* left, HInstruction* right) argument
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H A Dssa_builder.cc186 HInstruction* right = equality_instr->InputAt(1); local
189 if ((left->GetType() == Primitive::kPrimNot) && (right->GetType() == Primitive::kPrimInt)) {
190 int_operand = right;
191 } else if ((right->GetType() == Primitive::kPrimNot)
204 equality_instr->ReplaceInput(GetGraph()->GetNullConstant(), int_operand == right ? 1 : 0);
233 // (with the exception of loops) in order to create the right environment for that
292 // 9) Make sure environments use the right phi "equivalent": a phi marked dead
327 // 11) Now that the right phis are used for the environments, and we
H A Dcode_generator_arm64.cc1509 HInstruction* right = compare->InputAt(1); local
1510 if ((right->IsFloatConstant() && (right->AsFloatConstant()->GetValue() == 0.0f)) ||
1511 (right->IsDoubleConstant() && (right->AsDoubleConstant()->GetValue() == 0.0))) {
1512 locations->SetInAt(1, Location::ConstantLocation(right->AsConstant()));
1527 // 0 if: left == right
1528 // 1 if: left > right
1529 // -1 if: left < right
1534 Operand right local
1547 HInstruction* right = compare->GetLocations()->InAt(1).GetConstant(); local
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H A Dcode_generator_x86.cc3085 Location right = locations->InAt(1); local
3096 if (right.IsConstant()) {
3097 DCHECK(right.GetConstant()->IsLongConstant());
3099 int64_t val = right.GetConstant()->AsLongConstant()->GetValue();
3104 if (right.IsRegisterPair()) {
3105 __ cmpl(left_high, right.AsRegisterPairHigh<Register>());
3106 } else if (right.IsDoubleStackSlot()) {
3107 __ cmpl(left_high, Address(ESP, right.GetHighStackIndex(kX86WordSize)));
3109 DCHECK(right_is_const) << right;
3118 if (right
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H A Dcode_generator_x86_64.cc1056 Location right = locations->InAt(1); local
1063 if (right.IsConstant()) {
1064 int64_t value = right.GetConstant()->AsLongConstant()->GetValue();
1075 } else if (right.IsDoubleStackSlot()) {
1076 __ cmpq(left_reg, Address(CpuRegister(RSP), right.GetStackIndex()));
1078 __ cmpq(left_reg, right.AsRegister<CpuRegister>());
1084 if (right.IsConstant()) {
1085 float value = right.GetConstant()->AsFloatConstant()->GetValue();
1087 } else if (right.IsStackSlot()) {
1088 __ ucomiss(left_reg, Address(CpuRegister(RSP), right
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H A Dcode_generator_mips64.cc746 // Need to distinguish float from double, right?
1017 HInstruction* right = instruction->InputAt(1); local
1019 if (right->IsConstant()) {
1020 int64_t imm = CodeGenerator::GetInt64ValueOf(right->AsConstant());
1031 locations->SetInAt(1, Location::ConstantLocation(right->AsConstant()));
1682 // 0 if: left == right
1683 // 1 if: left > right
1684 // -1 if: left < right
H A Dcode_generator_arm.cc2724 Location right = locations->InAt(1); local
2731 ShifterOperand(right.AsRegisterPairHigh<Register>())); // Signed compare.
2737 ShifterOperand(right.AsRegisterPairLow<Register>())); // Unsigned compare.
2744 __ vcmps(left.AsFpuRegister<SRegister>(), right.AsFpuRegister<SRegister>());
2747 FromLowSToD(right.AsFpuRegisterPairLow<SRegister>()));
/art/cmdline/detail/
H A Dcmdline_parser_detail.h55 static std::true_type EqualityOperatorTest(const TL& left, const TR& right,
56 std::remove_reference<decltype(left == right)>* = 0); // NOLINT [whitespace/operators] [3]
/art/runtime/verifier/
H A Dreg_type_cache.cc319 const RegType& RegTypeCache::FromUnresolvedMerge(const RegType& left, const RegType& right) { argument
336 if (right.IsUnresolvedMergedReference()) {
337 const UnresolvedMergedType* right_merge = down_cast<const UnresolvedMergedType*>(&right);
340 } else if (right.IsUnresolvedTypes()) {
341 types.SetBit(right.GetId());
344 right_resolved = &right;
347 // Merge the resolved parts. Left and right might be equal, so use SafeMerge.
H A Dreg_type_cache.h67 const RegType& FromUnresolvedMerge(const RegType& left, const RegType& right)
/art/runtime/arch/mips64/
H A Dquick_entrypoints_mips64.S646 dsrl $t3, $t3, 4 # shift the frame size right 4
749 dsrl $t3, $t3, 4 # shift the frame size right 4
/art/compiler/dex/quick/arm64/
H A Dcodegen_arm64.h392 void GenSelect(int32_t left, int32_t right, ConditionCode code, RegStorage rs_dest,

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