| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 177 case ISD::MULHU:
182 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr;
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| H A D | SparcISelLowering.cpp | 1554 setOperationAction(ISD::MULHU, MVT::i64, Expand);
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUISelLowering.cpp | 199 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den);
211 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP);
224 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num);
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| H A D | AMDILISelLowering.cpp | 174 setOperationAction(ISD::MULHU, MVT::i64, Expand);
175 setOperationAction(ISD::MULHU, MVT::v2i64, Expand);
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 306 /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
309 MULHU, MULHS, enumerator in enum:llvm::ISD::NodeType
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| H A D | SelectionDAG.h | 1046 case ISD::MULHU:
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| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelDAGToDAG.cpp | 309 case ISD::MULHU: {
310 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
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| H A D | MipsSEISelLowering.cpp | 117 setOperationAction(ISD::MULHU, MVT::i32, Custom);
128 setOperationAction(ISD::MULHU, MVT::i64, Custom);
162 setOperationAction(ISD::MULHU, MVT::i32, Legal);
209 setOperationAction(ISD::MULHU, MVT::i64, Legal);
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 168 case ISD::MULHU: return "mulhu";
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| H A D | TargetLowering.cpp | 2762 if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) :
2763 isOperationLegalOrCustom(ISD::MULHU, VT))
2764 Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
2814 bool HasMULHU = isOperationLegalOrCustom(ISD::MULHU, HiLoVT);
2850 Hi = DAG.getNode(ISD::MULHU, dl, HiLoVT, LL, RL);
2899 Hi = DAG.getNode(ISD::MULHU, dl, HiLoVT, LL, RL);
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| H A D | LegalizeDAG.cpp | 3552 case ISD::MULHU:
3554 unsigned ExpandOpcode = Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI :
3581 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, VT);
3683 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND },
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| H A D | LegalizeVectorTypes.cpp | 1749 case ISD::MULHU:
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| H A D | DAGCombiner.cpp | 1316 case ISD::MULHU: return visitMULHU(N);
2480 SDValue Res = SimplifyNodeWithTwoResults(N, ISD::MUL, ISD::MULHU);
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| H A D | SelectionDAG.cpp | 3229 case ISD::MULHU:
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| /external/llvm/lib/Target/X86/ |
| H A D | X86IntrinsicsInfo.h | 208 X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
522 X86_INTRINSIC_DATA(sse2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
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| H A D | X86ISelLowering.cpp | 286 setOperationAction(ISD::MULHU, VT, Expand);
705 setOperationAction(ISD::MULHU, VT, Expand);
814 setOperationAction(ISD::MULHU, MVT::v8i16, Legal);
1134 setOperationAction(ISD::MULHU, MVT::v16i16, Legal);
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 145 setOperationAction(ISD::MULHU, MVT::i8, Expand);
150 setOperationAction(ISD::MULHU, MVT::i16, Expand);
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| /external/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 121 setOperationAction(ISD::MULHU, MVT::i64, Expand);
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| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.cpp | 294 setOperationAction(ISD::MULHU, MVT::i64, Expand);
1746 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den);
1758 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP);
1771 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num);
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 106 setOperationAction(ISD::MULHU, MVT::i32, Expand);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3628 unsigned UMULHReg = fastEmit_rr(VT, VT, ISD::MULHU, LHSReg, LHSIsKill,
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| H A D | AArch64ISelLowering.cpp | 592 setOperationAction(ISD::MULHU, VT, Expand);
1357 SDValue UpperBits = DAG.getNode(ISD::MULHU, DL, MVT::i64, LHS, RHS);
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 181 setOperationAction(ISD::MULHU, VT, Expand);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 420 setOperationAction(ISD::MULHU, VT, Expand);
667 setOperationAction(ISD::MULHU, MVT::i32, Expand);
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 463 setOperationAction(ISD::MULHU, VT, Expand);
|