| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 193 /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
195 SDIVREM, UDIVREM, enumerator in enum:llvm::ISD::NodeType
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDILISelLowering.cpp | 145 setOperationAction(ISD::SDIVREM, VT, Expand);
167 setOperationAction(ISD::SDIVREM, VT, Expand);
|
| /external/llvm/lib/Target/R600/ |
| H A D | R600ISelLowering.cpp | 895 SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT), local
897 Results.push_back(SDIVREM);
904 SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT), local
906 Results.push_back(SDIVREM.getValue(1));
909 case ISD::SDIVREM: {
|
| H A D | AMDGPUISelLowering.cpp | 270 setOperationAction(ISD::SDIVREM, VT, Custom);
336 setOperationAction(ISD::SDIVREM, VT, Custom);
610 case ISD::SDIVREM: return LowerSDIVREM(Op, DAG);
1858 SDValue DIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 176 case ISD::SDIVREM: return "sdivrem";
|
| H A D | LegalizeDAG.cpp | 2211 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM;
2238 bool isSigned = Opcode == ISD::SDIVREM;
3500 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM;
3531 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM;
3565 case ISD::SDIVREM:
|
| H A D | DAGCombiner.cpp | 1322 case ISD::SDIVREM: return visitSDIVREM(N);
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 129 setOperationAction(ISD::SDIVREM, MVT::i64, Custom);
136 setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
166 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
213 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
370 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG);
|
| H A D | MipsISelLowering.cpp | 405 setTargetDAGCombine(ISD::SDIVREM);
460 unsigned Opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem16 :
795 case ISD::SDIVREM:
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 158 setOperationAction(ISD::SDIVREM, MVT::i8, Expand);
164 setOperationAction(ISD::SDIVREM, MVT::i16, Expand);
|
| /external/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 116 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1306 setOperationAction(ISD::SDIVREM, VT, Expand);
1638 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
1641 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2436 case ISD::SDIVREM:
2443 bool isSigned = (Opcode == ISD::SDIVREM ||
|
| H A D | X86ISelLowering.cpp | 706 setOperationAction(ISD::SDIVREM, VT, Expand);
1526 setOperationAction(ISD::SDIVREM, MVT::i128, Custom);
15969 case ISD::SDIVREM: isSigned = true; LC = RTLIB::SDIVREM_I128; break;
17305 case ISD::SDIVREM:
23250 if (N0.getOpcode() == ISD::SDIVREM && N0.getResNo() == 1 &&
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1409 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
1416 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 155 setOperationAction(ISD::SDIVREM, VT, Custom);
2726 case ISD::SDIVREM:
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 737 setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
740 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
6328 case ISD::SDIVREM:
10753 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) &&
10755 bool isSigned = (Opcode == ISD::SDIVREM);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 151 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
157 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
159 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
468 setOperationAction(ISD::SDIVREM, VT, Expand);
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 252 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
253 setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
|