| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 444 BitVector &UsedRegs,
460 UsedRegs.set(*AI);
518 BitVector ModifiedRegs, UsedRegs;
520 UsedRegs.resize(TRI->getNumRegs());
568 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
576 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
583 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
590 !UsedRegs[MI->getOperand(0).getReg()]) {
599 !UsedRegs[FirstMI->getOperand(0).getReg()]) {
626 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TR
443 trackRegDefsUses(MachineInstr *MI, BitVector &ModifiedRegs, BitVector &UsedRegs, const TargetRegisterInfo *TRI) argument
[all...] |
| /external/llvm/lib/Target/R600/ |
| H A D | SIInsertWaits.cpp | 74 RegCounters UsedRegs; member in class:__anon10860::SIInsertWaits
307 UsedRegs[j] = LastIssued;
402 increaseCounters(Result, UsedRegs[j]);
455 memset(&UsedRegs, 0, sizeof(UsedRegs));
|
| /external/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 37 UsedRegs.resize((TRI.getNumRegs()+31)/32);
63 UsedRegs[*AI/32] |= 1 << (*AI&31);
|
| H A D | MachineBasicBlock.cpp | 740 SmallVector<unsigned, 4> UsedRegs; local
752 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end())
753 UsedRegs.push_back(Reg);
894 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
|
| H A D | MachineInstr.cpp | 1892 void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs, argument
1904 if (std::none_of(UsedRegs.begin(), UsedRegs.end(),
1912 for (ArrayRef<unsigned>::iterator I = UsedRegs.begin(), E = UsedRegs.end();
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 203 SmallVector<uint32_t, 16> UsedRegs; member in class:llvm::CCState
277 return UsedRegs[Reg/32] & (1 << (Reg&31));
|
| H A D | MachineInstr.h | 1061 /// dead except those in the UsedRegs list.
1064 /// operands for all registers in UsedRegs.
1065 void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 829 SmallVector<unsigned, 8> UsedRegs;
838 UsedRegs.push_back(Reg);
847 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg());
855 UsedRegs.append(MCID.getImplicitUses(),
863 UsedRegs.push_back(Reg);
869 if (!UsedRegs.empty() || II.getImplicitDefs())
870 MIB->setPhysRegsDeadExcept(UsedRegs, *TRI);
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 208 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
2025 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
2052 UsedRegs.push_back(RVLocs[0].getLocReg());
2053 UsedRegs.push_back(RVLocs[1].getLocReg());
2071 UsedRegs.push_back(RVLocs[0].getLocReg());
2271 SmallVector<unsigned, 4> UsedRegs; local
2272 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, false)) return false;
2275 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2422 SmallVector<unsigned, 4> UsedRegs; local
2423 if (!FinishCall(RetVT, UsedRegs,
[all...] |