/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 586 /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 589 VAARG, enumerator in enum:llvm::ISD::NodeType
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 276 case ISD::VAARG: return "vaarg";
|
H A D | LegalizeFloatTypes.cpp | 106 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break; 883 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
|
H A D | LegalizeDAG.cpp | 1185 case ISD::VAARG: 3068 case ISD::VAARG: { 4089 case ISD::VAARG: { 4098 && "VAARG promotion is supported only for vectors or integer types");
|
H A D | LegalizeIntegerTypes.cpp | 81 case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break; 1238 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
|
H A D | SelectionDAG.cpp | 5093 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
|
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 301 // VAARG always uses double-word chunks, so promote anything smaller. 302 setOperationAction(ISD::VAARG, MVT::i1, Promote); 303 AddPromotedToType (ISD::VAARG, MVT::i1, MVT::i64); 304 setOperationAction(ISD::VAARG, MVT::i8, Promote); 305 AddPromotedToType (ISD::VAARG, MVT::i8, MVT::i64); 306 setOperationAction(ISD::VAARG, MVT::i16, Promote); 307 AddPromotedToType (ISD::VAARG, MVT::i16, MVT::i64); 308 setOperationAction(ISD::VAARG, MVT::i32, Promote); 309 AddPromotedToType (ISD::VAARG, MVT::i32, MVT::i64); 310 setOperationAction(ISD::VAARG, MV [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 146 setOperationAction(ISD::VAARG, MVT::Other, Custom); 218 case ISD::VAARG: return LowerVAARG(Op, DAG);
|
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 169 setOperationAction(ISD::VAARG, MVT::Other, Expand);
|
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 365 setOperationAction(ISD::VAARG, MVT::Other, Custom); 847 case ISD::VAARG: return lowerVAARG(Op, DAG);
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1567 // VAARG needs to be lowered to not do unaligned accesses for doubles. 1568 setOperationAction(ISD::VAARG , MVT::Other, Custom); 2809 case ISD::VAARG: return LowerVAARG(Op, DAG);
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1774 setOperationAction(ISD::VAARG, MVT::Other, Expand);
|
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 503 setOperationAction(ISD::VAARG , MVT::Other, Custom); 507 setOperationAction(ISD::VAARG , MVT::Other, Expand); 14483 SDValue VAARG = DAG.getMemIntrinsicNode(X86ISD::VAARG_64, dl, local 14490 Chain = VAARG.getValue(1); 14495 VAARG, 17225 case ISD::VAARG: return LowerVAARG(Op, DAG);
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 203 setOperationAction(ISD::VAARG, MVT::Other, Custom); 1948 case ISD::VAARG:
|
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 754 setOperationAction(ISD::VAARG, MVT::Other, Expand);
|