Searched refs:getDesc (Results 1 - 25 of 103) sorted by relevance

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/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp25 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
32 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
36 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII, function in class:llvm::HexagonMCInstrInfo
51 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
66 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
80 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
94 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
102 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
108 return (!HexagonMCInstrInfo::getDesc(MCII, MCI).isPseudo() &&
154 uint64_t const F = HexagonMCInstrInfo::getDesc(MCI
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H A DHexagonMCCodeEmitter.cpp59 assert(HexagonMCInstrInfo::getDesc(MCII, MI).getSize() == 4 &&
H A DHexagonMCInstrInfo.h35 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
/external/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp22 const MCInstrDesc &MCID = MI->getDesc();
43 const MCInstrDesc &MCID = MI->getDesc();
46 const MCInstrDesc &LastMCID = LastMI->getDesc();
/external/skia/debugger/QT/
H A DSkGLWidget.h54 GrBackendRenderTargetDesc getDesc(int w, int h);
H A DSkGLWidget.cpp61 GrBackendRenderTargetDesc desc = this->getDesc(this->width(), this->height());
85 GrBackendRenderTargetDesc SkGLWidget::getDesc(int w, int h) { function in class:SkGLWidget
/external/llvm/lib/Support/
H A DStatistic.cpp119 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0;
132 Stats.Stats[i]->getDesc());
/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h31 const MCInstrDesc &MCID = MI->getDesc();
/external/skia/src/gpu/gl/
H A DGrGLGpuProgramCache.cpp35 return GrProgramDesc::Less(desc, entry->fProgram->getDesc());
40 return GrProgramDesc::Less(entry->fProgram->getDesc(), desc);
107 if (hashedEntry && hashedEntry->fProgram->getDesc() == *args.fDesc) {
146 int purgedHashIdx = entry->fProgram->getDesc().getChecksum() & ((1 << kHashBits) - 1);
178 const GrProgramDesc& a = fEntries[i]->fProgram->getDesc();
179 const GrProgramDesc& b = fEntries[i + 1]->fProgram->getDesc();
H A DGrGLProgram.h49 const GrProgramDesc& getDesc() { return fDesc; } function in class:GrGLProgram
/external/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp79 for (int i = 0, e = MI.getDesc().getNumDefs(); i != e; ++i) {
99 switch (MI.getDesc().OpInfo[i].RegClass) {
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/stringprep/
H A DTestInputDataStructure.java36 public String getDesc() { method in class:TestInputDataStructure
/external/llvm/lib/CodeGen/
H A DTargetSchedule.cpp79 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass());
105 unsigned SchedClass = MI->getDesc().getSchedClass();
168 unsigned DefClass = DefMI->getDesc().getSchedClass();
212 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()
H A DDFAPacketizer.cpp92 const llvm::MCInstrDesc &MID = MI->getDesc();
99 const llvm::MCInstrDesc &MID = MI->getDesc();
H A DTargetInstrInfo.cpp124 const MCInstrDesc &MCID = MI->getDesc();
148 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
153 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
187 const MCInstrDesc &MCID = MI->getDesc();
222 const MCInstrDesc &MCID = MI->getDesc();
758 unsigned Class = MI->getDesc().getSchedClass();
793 return ItinData->getStageLatency(MI->getDesc().getSchedClass());
802 unsigned DefClass = DefMI->getDesc().getSchedClass();
813 unsigned DefClass = DefMI->getDesc().getSchedClass();
814 unsigned UseClass = UseMI->getDesc()
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H A DExecutionDepsFix.cpp512 const MCInstrDesc &MCID = MI->getDesc();
585 for (unsigned i = mi->getDesc().getNumDefs(),
586 e = mi->getDesc().getNumOperands(); i != e; ++i) {
595 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
614 for (unsigned i = mi->getDesc().getNumDefs(),
615 e = mi->getDesc().getNumOperands(); i != e; ++i) {
H A DPeepholeOptimizer.cpp272 assert(DefIdx < Def->getDesc().getNumDefs() &&
883 assert(MI->getDesc().getNumDefs() == 1 &&
996 const MCInstrDesc &MCID = MI->getDesc();
1016 const MCInstrDesc &MCID = MI->getDesc();
1037 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
1150 const MCInstrDesc &MIDesc = MI->getDesc();
1220 if (Def->getDesc().getNumDefs() != 1)
1412 (DefIdx < Def->getDesc().getNumDefs() || Def->getDesc().isVariadic()) &&
/external/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp380 return (MI->getDesc().isTerminator() || MI->getDesc().isCall());
411 const MCInstrDesc& TID = MI->getDesc();
493 if (MI->getDesc().mayLoad()) {
499 if (MI->getDesc().mayStore()) {
550 const MCInstrDesc& MCID = PacketMI->getDesc();
561 if (PacketSU->getInstr()->getDesc().mayStore() ||
578 MI->getDesc().mayStore() &&
584 PacketMI->getDesc().mayLoad() &&
959 const MCInstrDesc& TID = MI->getDesc();
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H A DHexagonInstrInfo.cpp679 const MCInstrDesc &MID = MI->getDesc();
701 const uint64_t F = MI->getDesc().TSFlags;
715 return MI->getDesc().isBranch();
733 bool isPred = MI->getDesc().isPredicable();
837 const uint64_t F = MI->getDesc().TSFlags;
1054 const uint64_t F = MI->getDesc().TSFlags;
1066 const uint64_t F = MI->getDesc().TSFlags;
1083 const uint64_t F = MI->getDesc().TSFlags;
1098 const uint64_t F = MI->getDesc().TSFlags;
1282 // return MI->getDesc()
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/external/llvm/include/llvm/Support/
H A DRegistry.h35 const char *getDesc() const { return Desc; } function in class:llvm::SimpleRegistryEntry
52 static const char *descof(const entry &Entry) { return Entry.getDesc(); }
/external/llvm/include/llvm/ADT/
H A DStatistic.h44 const char *getDesc() const { return Desc; } function in class:llvm::Statistic
/external/skia/src/gpu/
H A DGrPathRendering.cpp71 SkDescriptor* genericDesc = ad.getDesc();
/external/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp72 (MI.getDesc().TSFlags & NVPTX::SimpleMoveMask) >> NVPTX::SimpleMoveShift;
114 (MI.getDesc().TSFlags & NVPTX::isLoadMask) >> NVPTX::isLoadShift;
125 (MI.getDesc().TSFlags & NVPTX::isStoreMask) >> NVPTX::isStoreShift;
/external/llvm/include/llvm/CodeGen/
H A DMachineInstr.h270 /// getDesc - Returns the target instruction descriptor of this
272 const MCInstrDesc &getDesc() const { return *MCID; } function in class:llvm::MachineInstr
329 operands_begin(), operands_begin() + getDesc().getNumDefs());
333 operands_begin(), operands_begin() + getDesc().getNumDefs());
337 operands_begin() + getDesc().getNumDefs(), operands_end());
341 operands_begin() + getDesc().getNumDefs(), operands_end());
379 return getDesc().getFlags() & (1 << MCFlag);
/external/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp265 return MI->getDesc().getSize();
284 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J)

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