1/*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef __NOUVEAU_DRM_H__
26#define __NOUVEAU_DRM_H__
27
28#define DRM_NOUVEAU_EVENT_NVIF                                       0x80000000
29
30/* reserved object handles when using deprecated object APIs - these
31 * are here so that libdrm can allow interoperability with the new
32 * object APIs
33 */
34#define NOUVEAU_ABI16_CLIENT   0xffffffff
35#define NOUVEAU_ABI16_DEVICE   0xdddddddd
36#define NOUVEAU_ABI16_CHAN(n) (0xcccc0000 | (n))
37
38#define NOUVEAU_GEM_DOMAIN_CPU       (1 << 0)
39#define NOUVEAU_GEM_DOMAIN_VRAM      (1 << 1)
40#define NOUVEAU_GEM_DOMAIN_GART      (1 << 2)
41#define NOUVEAU_GEM_DOMAIN_MAPPABLE  (1 << 3)
42
43#define NOUVEAU_GEM_TILE_COMP        0x00030000 /* nv50-only */
44#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
45#define NOUVEAU_GEM_TILE_16BPP       0x00000001
46#define NOUVEAU_GEM_TILE_32BPP       0x00000002
47#define NOUVEAU_GEM_TILE_ZETA        0x00000004
48#define NOUVEAU_GEM_TILE_NONCONTIG   0x00000008
49
50struct drm_nouveau_gem_info {
51	uint32_t handle;
52	uint32_t domain;
53	uint64_t size;
54	uint64_t offset;
55	uint64_t map_handle;
56	uint32_t tile_mode;
57	uint32_t tile_flags;
58};
59
60struct drm_nouveau_gem_new {
61	struct drm_nouveau_gem_info info;
62	uint32_t channel_hint;
63	uint32_t align;
64};
65
66#define NOUVEAU_GEM_MAX_BUFFERS 1024
67struct drm_nouveau_gem_pushbuf_bo_presumed {
68	uint32_t valid;
69	uint32_t domain;
70	uint64_t offset;
71};
72
73struct drm_nouveau_gem_pushbuf_bo {
74	uint64_t user_priv;
75	uint32_t handle;
76	uint32_t read_domains;
77	uint32_t write_domains;
78	uint32_t valid_domains;
79	struct drm_nouveau_gem_pushbuf_bo_presumed presumed;
80};
81
82#define NOUVEAU_GEM_RELOC_LOW  (1 << 0)
83#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
84#define NOUVEAU_GEM_RELOC_OR   (1 << 2)
85#define NOUVEAU_GEM_MAX_RELOCS 1024
86struct drm_nouveau_gem_pushbuf_reloc {
87	uint32_t reloc_bo_index;
88	uint32_t reloc_bo_offset;
89	uint32_t bo_index;
90	uint32_t flags;
91	uint32_t data;
92	uint32_t vor;
93	uint32_t tor;
94};
95
96#define NOUVEAU_GEM_MAX_PUSH 512
97struct drm_nouveau_gem_pushbuf_push {
98	uint32_t bo_index;
99	uint32_t pad;
100	uint64_t offset;
101	uint64_t length;
102};
103
104struct drm_nouveau_gem_pushbuf {
105	uint32_t channel;
106	uint32_t nr_buffers;
107	uint64_t buffers;
108	uint32_t nr_relocs;
109	uint32_t nr_push;
110	uint64_t relocs;
111	uint64_t push;
112	uint32_t suffix0;
113	uint32_t suffix1;
114	uint64_t vram_available;
115	uint64_t gart_available;
116};
117
118#define NOUVEAU_GEM_CPU_PREP_NOWAIT                                  0x00000001
119#define NOUVEAU_GEM_CPU_PREP_WRITE                                   0x00000004
120struct drm_nouveau_gem_cpu_prep {
121	uint32_t handle;
122	uint32_t flags;
123};
124
125struct drm_nouveau_gem_cpu_fini {
126	uint32_t handle;
127};
128
129#define DRM_NOUVEAU_GETPARAM           0x00 /* deprecated */
130#define DRM_NOUVEAU_SETPARAM           0x01 /* deprecated */
131#define DRM_NOUVEAU_CHANNEL_ALLOC      0x02 /* deprecated */
132#define DRM_NOUVEAU_CHANNEL_FREE       0x03 /* deprecated */
133#define DRM_NOUVEAU_GROBJ_ALLOC        0x04 /* deprecated */
134#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC  0x05 /* deprecated */
135#define DRM_NOUVEAU_GPUOBJ_FREE        0x06 /* deprecated */
136#define DRM_NOUVEAU_NVIF               0x07
137#define DRM_NOUVEAU_GEM_NEW            0x40
138#define DRM_NOUVEAU_GEM_PUSHBUF        0x41
139#define DRM_NOUVEAU_GEM_CPU_PREP       0x42
140#define DRM_NOUVEAU_GEM_CPU_FINI       0x43
141#define DRM_NOUVEAU_GEM_INFO           0x44
142
143#define DRM_IOCTL_NOUVEAU_GEM_NEW            DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
144#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF        DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf)
145#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP       DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep)
146#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI       DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini)
147#define DRM_IOCTL_NOUVEAU_GEM_INFO           DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info)
148
149#endif /* __NOUVEAU_DRM_H__ */
150