1//===- NVPTXInstrFormats.td - NVPTX Instruction Formats-------*- tblgen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11//  Describe NVPTX instructions format
12//
13//===----------------------------------------------------------------------===//
14
15// Vector instruction type enum
16class VecInstTypeEnum<bits<4> val> {
17  bits<4> Value=val;
18}
19def VecNOP : VecInstTypeEnum<0>;
20
21// Generic NVPTX Format
22
23class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern>
24  : Instruction {
25  field bits<14> Inst;
26
27  let Namespace = "NVPTX";
28  dag OutOperandList = outs;
29  dag InOperandList = ins;
30  let AsmString = asmstr;
31  let Pattern = pattern;
32
33  // TSFlagFields
34  bits<4> VecInstType = VecNOP.Value;
35  bit IsSimpleMove = 0;
36  bit IsLoad = 0;
37  bit IsStore = 0;
38
39  bit IsTex = 0;
40  bit IsSust = 0;
41  bit IsSurfTexQuery = 0;
42  bit IsTexModeUnified = 0;
43
44  // The following field is encoded as log2 of the vector size minus one,
45  // with 0 meaning the operation is not a surface instruction.  For example,
46  // if IsSuld == 2, then the instruction is a suld instruction with vector size
47  // 2**(2-1) = 2.
48  bits<2> IsSuld = 0;
49
50  let TSFlags{3-0}   = VecInstType;
51  let TSFlags{4-4}   = IsSimpleMove;
52  let TSFlags{5-5}   = IsLoad;
53  let TSFlags{6-6}   = IsStore;
54  let TSFlags{7}     = IsTex;
55  let TSFlags{9-8}   = IsSuld;
56  let TSFlags{10}    = IsSust;
57  let TSFlags{11}    = IsSurfTexQuery;
58  let TSFlags{12}    = IsTexModeUnified;
59}
60