1//===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// \file 10/// This file a TargetTransformInfo::Concept conforming object specific to the 11/// AMDGPU target machine. It uses the target's detailed information to 12/// provide more precise answers to certain TTI queries, while letting the 13/// target independent and default TTI implementations handle the rest. 14/// 15//===----------------------------------------------------------------------===// 16 17#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H 18#define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H 19 20#include "AMDGPU.h" 21#include "AMDGPUTargetMachine.h" 22#include "llvm/Analysis/TargetTransformInfo.h" 23#include "llvm/CodeGen/BasicTTIImpl.h" 24#include "llvm/Target/TargetLowering.h" 25 26namespace llvm { 27 28class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> { 29 typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT; 30 typedef TargetTransformInfo TTI; 31 friend BaseT; 32 33 const AMDGPUSubtarget *ST; 34 const AMDGPUTargetLowering *TLI; 35 36 const AMDGPUSubtarget *getST() const { return ST; } 37 const AMDGPUTargetLowering *getTLI() const { return TLI; } 38 39public: 40 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM) 41 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {} 42 43 // Provide value semantics. MSVC requires that we spell all of these out. 44 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg) 45 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {} 46 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg) 47 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)), 48 TLI(std::move(Arg.TLI)) {} 49 AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) { 50 BaseT::operator=(static_cast<const BaseT &>(RHS)); 51 ST = RHS.ST; 52 TLI = RHS.TLI; 53 return *this; 54 } 55 AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) { 56 BaseT::operator=(std::move(static_cast<BaseT &>(RHS))); 57 ST = std::move(RHS.ST); 58 TLI = std::move(RHS.TLI); 59 return *this; 60 } 61 62 bool hasBranchDivergence() { return true; } 63 64 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP); 65 66 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) { 67 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); 68 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software; 69 } 70 71 unsigned getNumberOfRegisters(bool Vector); 72 unsigned getRegisterBitWidth(bool Vector); 73 unsigned getMaxInterleaveFactor(); 74}; 75 76} // end namespace llvm 77 78#endif 79