1/* 2 * Copyright (C) 2010 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* ChangeLog for this library: 30 * 31 * NDK r9?: Support for 64-bit CPUs (Intel, ARM & MIPS). 32 * 33 * NDK r8d: Add android_setCpu(). 34 * 35 * NDK r8c: Add new ARM CPU features: VFPv2, VFP_D32, VFP_FP16, 36 * VFP_FMA, NEON_FMA, IDIV_ARM, IDIV_THUMB2 and iWMMXt. 37 * 38 * Rewrite the code to parse /proc/self/auxv instead of 39 * the "Features" field in /proc/cpuinfo. 40 * 41 * Dynamically allocate the buffer that hold the content 42 * of /proc/cpuinfo to deal with newer hardware. 43 * 44 * NDK r7c: Fix CPU count computation. The old method only reported the 45 * number of _active_ CPUs when the library was initialized, 46 * which could be less than the real total. 47 * 48 * NDK r5: Handle buggy kernels which report a CPU Architecture number of 7 49 * for an ARMv6 CPU (see below). 50 * 51 * Handle kernels that only report 'neon', and not 'vfpv3' 52 * (VFPv3 is mandated by the ARM architecture is Neon is implemented) 53 * 54 * Handle kernels that only report 'vfpv3d16', and not 'vfpv3' 55 * 56 * Fix x86 compilation. Report ANDROID_CPU_FAMILY_X86 in 57 * android_getCpuFamily(). 58 * 59 * NDK r4: Initial release 60 */ 61 62#if defined(__le32__) || defined(__le64__) 63 64// When users enter this, we should only provide interface and 65// libportable will give the implementations. 66 67#else // !__le32__ && !__le64__ 68 69#include "cpu-features.h" 70 71#include <dlfcn.h> 72#include <errno.h> 73#include <fcntl.h> 74#include <pthread.h> 75#include <stdio.h> 76#include <stdlib.h> 77#include <sys/system_properties.h> 78 79static pthread_once_t g_once; 80static int g_inited; 81static AndroidCpuFamily g_cpuFamily; 82static uint64_t g_cpuFeatures; 83static int g_cpuCount; 84 85#ifdef __arm__ 86static uint32_t g_cpuIdArm; 87#endif 88 89static const int android_cpufeatures_debug = 0; 90 91#define D(...) \ 92 do { \ 93 if (android_cpufeatures_debug) { \ 94 printf(__VA_ARGS__); fflush(stdout); \ 95 } \ 96 } while (0) 97 98#ifdef __i386__ 99static __inline__ void x86_cpuid(int func, int values[4]) 100{ 101 int a, b, c, d; 102 /* We need to preserve ebx since we're compiling PIC code */ 103 /* this means we can't use "=b" for the second output register */ 104 __asm__ __volatile__ ( \ 105 "push %%ebx\n" 106 "cpuid\n" \ 107 "mov %%ebx, %1\n" 108 "pop %%ebx\n" 109 : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ 110 : "a" (func) \ 111 ); 112 values[0] = a; 113 values[1] = b; 114 values[2] = c; 115 values[3] = d; 116} 117#endif 118 119/* Get the size of a file by reading it until the end. This is needed 120 * because files under /proc do not always return a valid size when 121 * using fseek(0, SEEK_END) + ftell(). Nor can they be mmap()-ed. 122 */ 123static int 124get_file_size(const char* pathname) 125{ 126 int fd, ret, result = 0; 127 char buffer[256]; 128 129 fd = open(pathname, O_RDONLY); 130 if (fd < 0) { 131 D("Can't open %s: %s\n", pathname, strerror(errno)); 132 return -1; 133 } 134 135 for (;;) { 136 int ret = read(fd, buffer, sizeof buffer); 137 if (ret < 0) { 138 if (errno == EINTR) 139 continue; 140 D("Error while reading %s: %s\n", pathname, strerror(errno)); 141 break; 142 } 143 if (ret == 0) 144 break; 145 146 result += ret; 147 } 148 close(fd); 149 return result; 150} 151 152/* Read the content of /proc/cpuinfo into a user-provided buffer. 153 * Return the length of the data, or -1 on error. Does *not* 154 * zero-terminate the content. Will not read more 155 * than 'buffsize' bytes. 156 */ 157static int 158read_file(const char* pathname, char* buffer, size_t buffsize) 159{ 160 int fd, count; 161 162 fd = open(pathname, O_RDONLY); 163 if (fd < 0) { 164 D("Could not open %s: %s\n", pathname, strerror(errno)); 165 return -1; 166 } 167 count = 0; 168 while (count < (int)buffsize) { 169 int ret = read(fd, buffer + count, buffsize - count); 170 if (ret < 0) { 171 if (errno == EINTR) 172 continue; 173 D("Error while reading from %s: %s\n", pathname, strerror(errno)); 174 if (count == 0) 175 count = -1; 176 break; 177 } 178 if (ret == 0) 179 break; 180 count += ret; 181 } 182 close(fd); 183 return count; 184} 185 186/* Extract the content of a the first occurence of a given field in 187 * the content of /proc/cpuinfo and return it as a heap-allocated 188 * string that must be freed by the caller. 189 * 190 * Return NULL if not found 191 */ 192static char* 193extract_cpuinfo_field(const char* buffer, int buflen, const char* field) 194{ 195 int fieldlen = strlen(field); 196 const char* bufend = buffer + buflen; 197 char* result = NULL; 198 int len, ignore; 199 const char *p, *q; 200 201 /* Look for first field occurence, and ensures it starts the line. */ 202 p = buffer; 203 for (;;) { 204 p = memmem(p, bufend-p, field, fieldlen); 205 if (p == NULL) 206 goto EXIT; 207 208 if (p == buffer || p[-1] == '\n') 209 break; 210 211 p += fieldlen; 212 } 213 214 /* Skip to the first column followed by a space */ 215 p += fieldlen; 216 p = memchr(p, ':', bufend-p); 217 if (p == NULL || p[1] != ' ') 218 goto EXIT; 219 220 /* Find the end of the line */ 221 p += 2; 222 q = memchr(p, '\n', bufend-p); 223 if (q == NULL) 224 q = bufend; 225 226 /* Copy the line into a heap-allocated buffer */ 227 len = q-p; 228 result = malloc(len+1); 229 if (result == NULL) 230 goto EXIT; 231 232 memcpy(result, p, len); 233 result[len] = '\0'; 234 235EXIT: 236 return result; 237} 238 239/* Checks that a space-separated list of items contains one given 'item'. 240 * Returns 1 if found, 0 otherwise. 241 */ 242static int 243has_list_item(const char* list, const char* item) 244{ 245 const char* p = list; 246 int itemlen = strlen(item); 247 248 if (list == NULL) 249 return 0; 250 251 while (*p) { 252 const char* q; 253 254 /* skip spaces */ 255 while (*p == ' ' || *p == '\t') 256 p++; 257 258 /* find end of current list item */ 259 q = p; 260 while (*q && *q != ' ' && *q != '\t') 261 q++; 262 263 if (itemlen == q-p && !memcmp(p, item, itemlen)) 264 return 1; 265 266 /* skip to next item */ 267 p = q; 268 } 269 return 0; 270} 271 272/* Parse a number starting from 'input', but not going further 273 * than 'limit'. Return the value into '*result'. 274 * 275 * NOTE: Does not skip over leading spaces, or deal with sign characters. 276 * NOTE: Ignores overflows. 277 * 278 * The function returns NULL in case of error (bad format), or the new 279 * position after the decimal number in case of success (which will always 280 * be <= 'limit'). 281 */ 282static const char* 283parse_number(const char* input, const char* limit, int base, int* result) 284{ 285 const char* p = input; 286 int val = 0; 287 while (p < limit) { 288 int d = (*p - '0'); 289 if ((unsigned)d >= 10U) { 290 d = (*p - 'a'); 291 if ((unsigned)d >= 6U) 292 d = (*p - 'A'); 293 if ((unsigned)d >= 6U) 294 break; 295 d += 10; 296 } 297 if (d >= base) 298 break; 299 val = val*base + d; 300 p++; 301 } 302 if (p == input) 303 return NULL; 304 305 *result = val; 306 return p; 307} 308 309static const char* 310parse_decimal(const char* input, const char* limit, int* result) 311{ 312 return parse_number(input, limit, 10, result); 313} 314 315static const char* 316parse_hexadecimal(const char* input, const char* limit, int* result) 317{ 318 return parse_number(input, limit, 16, result); 319} 320 321/* This small data type is used to represent a CPU list / mask, as read 322 * from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt 323 * 324 * For now, we don't expect more than 32 cores on mobile devices, so keep 325 * everything simple. 326 */ 327typedef struct { 328 uint32_t mask; 329} CpuList; 330 331static __inline__ void 332cpulist_init(CpuList* list) { 333 list->mask = 0; 334} 335 336static __inline__ void 337cpulist_and(CpuList* list1, CpuList* list2) { 338 list1->mask &= list2->mask; 339} 340 341static __inline__ void 342cpulist_set(CpuList* list, int index) { 343 if ((unsigned)index < 32) { 344 list->mask |= (uint32_t)(1U << index); 345 } 346} 347 348static __inline__ int 349cpulist_count(CpuList* list) { 350 return __builtin_popcount(list->mask); 351} 352 353/* Parse a textual list of cpus and store the result inside a CpuList object. 354 * Input format is the following: 355 * - comma-separated list of items (no spaces) 356 * - each item is either a single decimal number (cpu index), or a range made 357 * of two numbers separated by a single dash (-). Ranges are inclusive. 358 * 359 * Examples: 0 360 * 2,4-127,128-143 361 * 0-1 362 */ 363static void 364cpulist_parse(CpuList* list, const char* line, int line_len) 365{ 366 const char* p = line; 367 const char* end = p + line_len; 368 const char* q; 369 370 /* NOTE: the input line coming from sysfs typically contains a 371 * trailing newline, so take care of it in the code below 372 */ 373 while (p < end && *p != '\n') 374 { 375 int val, start_value, end_value; 376 377 /* Find the end of current item, and put it into 'q' */ 378 q = memchr(p, ',', end-p); 379 if (q == NULL) { 380 q = end; 381 } 382 383 /* Get first value */ 384 p = parse_decimal(p, q, &start_value); 385 if (p == NULL) 386 goto BAD_FORMAT; 387 388 end_value = start_value; 389 390 /* If we're not at the end of the item, expect a dash and 391 * and integer; extract end value. 392 */ 393 if (p < q && *p == '-') { 394 p = parse_decimal(p+1, q, &end_value); 395 if (p == NULL) 396 goto BAD_FORMAT; 397 } 398 399 /* Set bits CPU list bits */ 400 for (val = start_value; val <= end_value; val++) { 401 cpulist_set(list, val); 402 } 403 404 /* Jump to next item */ 405 p = q; 406 if (p < end) 407 p++; 408 } 409 410BAD_FORMAT: 411 ; 412} 413 414/* Read a CPU list from one sysfs file */ 415static void 416cpulist_read_from(CpuList* list, const char* filename) 417{ 418 char file[64]; 419 int filelen; 420 421 cpulist_init(list); 422 423 filelen = read_file(filename, file, sizeof file); 424 if (filelen < 0) { 425 D("Could not read %s: %s\n", filename, strerror(errno)); 426 return; 427 } 428 429 cpulist_parse(list, file, filelen); 430} 431#if defined(__aarch64__) 432// see <uapi/asm/hwcap.h> kernel header 433#define HWCAP_FP (1 << 0) 434#define HWCAP_ASIMD (1 << 1) 435#define HWCAP_AES (1 << 3) 436#define HWCAP_PMULL (1 << 4) 437#define HWCAP_SHA1 (1 << 5) 438#define HWCAP_SHA2 (1 << 6) 439#define HWCAP_CRC32 (1 << 7) 440#endif 441 442#if defined(__arm__) 443 444// See <asm/hwcap.h> kernel header. 445#define HWCAP_VFP (1 << 6) 446#define HWCAP_IWMMXT (1 << 9) 447#define HWCAP_NEON (1 << 12) 448#define HWCAP_VFPv3 (1 << 13) 449#define HWCAP_VFPv3D16 (1 << 14) 450#define HWCAP_VFPv4 (1 << 16) 451#define HWCAP_IDIVA (1 << 17) 452#define HWCAP_IDIVT (1 << 18) 453 454// see <uapi/asm/hwcap.h> kernel header 455#define HWCAP2_AES (1 << 0) 456#define HWCAP2_PMULL (1 << 1) 457#define HWCAP2_SHA1 (1 << 2) 458#define HWCAP2_SHA2 (1 << 3) 459#define HWCAP2_CRC32 (1 << 4) 460 461// This is the list of 32-bit ARMv7 optional features that are _always_ 462// supported by ARMv8 CPUs, as mandated by the ARM Architecture Reference 463// Manual. 464#define HWCAP_SET_FOR_ARMV8 \ 465 ( HWCAP_VFP | \ 466 HWCAP_NEON | \ 467 HWCAP_VFPv3 | \ 468 HWCAP_VFPv4 | \ 469 HWCAP_IDIVA | \ 470 HWCAP_IDIVT ) 471#endif 472 473#if defined(__arm__) || defined(__aarch64__) 474 475#define AT_HWCAP 16 476#define AT_HWCAP2 26 477 478// Probe the system's C library for a 'getauxval' function and call it if 479// it exits, or return 0 for failure. This function is available since API 480// level 20. 481// 482// This code does *NOT* check for '__ANDROID_API__ >= 20' to support the 483// edge case where some NDK developers use headers for a platform that is 484// newer than the one really targetted by their application. 485// This is typically done to use newer native APIs only when running on more 486// recent Android versions, and requires careful symbol management. 487// 488// Note that getauxval() can't really be re-implemented here, because 489// its implementation does not parse /proc/self/auxv. Instead it depends 490// on values that are passed by the kernel at process-init time to the 491// C runtime initialization layer. 492static uint32_t 493get_elf_hwcap_from_getauxval(int hwcap_type) { 494 typedef unsigned long getauxval_func_t(unsigned long); 495 496 dlerror(); 497 void* libc_handle = dlopen("libc.so", RTLD_NOW); 498 if (!libc_handle) { 499 D("Could not dlopen() C library: %s\n", dlerror()); 500 return 0; 501 } 502 503 uint32_t ret = 0; 504 getauxval_func_t* func = (getauxval_func_t*) 505 dlsym(libc_handle, "getauxval"); 506 if (!func) { 507 D("Could not find getauxval() in C library\n"); 508 } else { 509 // Note: getauxval() returns 0 on failure. Doesn't touch errno. 510 ret = (uint32_t)(*func)(hwcap_type); 511 } 512 dlclose(libc_handle); 513 return ret; 514} 515#endif 516 517#if defined(__arm__) 518// Parse /proc/self/auxv to extract the ELF HW capabilities bitmap for the 519// current CPU. Note that this file is not accessible from regular 520// application processes on some Android platform releases. 521// On success, return new ELF hwcaps, or 0 on failure. 522static uint32_t 523get_elf_hwcap_from_proc_self_auxv(void) { 524 const char filepath[] = "/proc/self/auxv"; 525 int fd = TEMP_FAILURE_RETRY(open(filepath, O_RDONLY)); 526 if (fd < 0) { 527 D("Could not open %s: %s\n", filepath, strerror(errno)); 528 return 0; 529 } 530 531 struct { uint32_t tag; uint32_t value; } entry; 532 533 uint32_t result = 0; 534 for (;;) { 535 int ret = TEMP_FAILURE_RETRY(read(fd, (char*)&entry, sizeof entry)); 536 if (ret < 0) { 537 D("Error while reading %s: %s\n", filepath, strerror(errno)); 538 break; 539 } 540 // Detect end of list. 541 if (ret == 0 || (entry.tag == 0 && entry.value == 0)) 542 break; 543 if (entry.tag == AT_HWCAP) { 544 result = entry.value; 545 break; 546 } 547 } 548 close(fd); 549 return result; 550} 551 552/* Compute the ELF HWCAP flags from the content of /proc/cpuinfo. 553 * This works by parsing the 'Features' line, which lists which optional 554 * features the device's CPU supports, on top of its reference 555 * architecture. 556 */ 557static uint32_t 558get_elf_hwcap_from_proc_cpuinfo(const char* cpuinfo, int cpuinfo_len) { 559 uint32_t hwcaps = 0; 560 long architecture = 0; 561 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture"); 562 if (cpuArch) { 563 architecture = strtol(cpuArch, NULL, 10); 564 free(cpuArch); 565 566 if (architecture >= 8L) { 567 // This is a 32-bit ARM binary running on a 64-bit ARM64 kernel. 568 // The 'Features' line only lists the optional features that the 569 // device's CPU supports, compared to its reference architecture 570 // which are of no use for this process. 571 D("Faking 32-bit ARM HWCaps on ARMv%ld CPU\n", architecture); 572 return HWCAP_SET_FOR_ARMV8; 573 } 574 } 575 576 char* cpuFeatures = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "Features"); 577 if (cpuFeatures != NULL) { 578 D("Found cpuFeatures = '%s'\n", cpuFeatures); 579 580 if (has_list_item(cpuFeatures, "vfp")) 581 hwcaps |= HWCAP_VFP; 582 if (has_list_item(cpuFeatures, "vfpv3")) 583 hwcaps |= HWCAP_VFPv3; 584 if (has_list_item(cpuFeatures, "vfpv3d16")) 585 hwcaps |= HWCAP_VFPv3D16; 586 if (has_list_item(cpuFeatures, "vfpv4")) 587 hwcaps |= HWCAP_VFPv4; 588 if (has_list_item(cpuFeatures, "neon")) 589 hwcaps |= HWCAP_NEON; 590 if (has_list_item(cpuFeatures, "idiva")) 591 hwcaps |= HWCAP_IDIVA; 592 if (has_list_item(cpuFeatures, "idivt")) 593 hwcaps |= HWCAP_IDIVT; 594 if (has_list_item(cpuFeatures, "idiv")) 595 hwcaps |= HWCAP_IDIVA | HWCAP_IDIVT; 596 if (has_list_item(cpuFeatures, "iwmmxt")) 597 hwcaps |= HWCAP_IWMMXT; 598 599 free(cpuFeatures); 600 } 601 return hwcaps; 602} 603 604/* Check Houdini Binary Translator is installed on the system. 605 * 606 * If this function returns 1, get_elf_hwcap_from_getauxval() function 607 * will causes SIGSEGV while calling getauxval() function. 608 */ 609static int 610has_houdini_binary_translator(void) { 611 int found = 0; 612 if (access("/system/lib/libhoudini.so", F_OK) != -1) { 613 D("Found Houdini binary translator\n"); 614 found = 1; 615 } 616 return found; 617} 618#endif /* __arm__ */ 619 620/* Return the number of cpus present on a given device. 621 * 622 * To handle all weird kernel configurations, we need to compute the 623 * intersection of the 'present' and 'possible' CPU lists and count 624 * the result. 625 */ 626static int 627get_cpu_count(void) 628{ 629 CpuList cpus_present[1]; 630 CpuList cpus_possible[1]; 631 632 cpulist_read_from(cpus_present, "/sys/devices/system/cpu/present"); 633 cpulist_read_from(cpus_possible, "/sys/devices/system/cpu/possible"); 634 635 /* Compute the intersection of both sets to get the actual number of 636 * CPU cores that can be used on this device by the kernel. 637 */ 638 cpulist_and(cpus_present, cpus_possible); 639 640 return cpulist_count(cpus_present); 641} 642 643static void 644android_cpuInitFamily(void) 645{ 646#if defined(__arm__) 647 g_cpuFamily = ANDROID_CPU_FAMILY_ARM; 648#elif defined(__i386__) 649 g_cpuFamily = ANDROID_CPU_FAMILY_X86; 650#elif defined(__mips64) 651/* Needs to be before __mips__ since the compiler defines both */ 652 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS64; 653#elif defined(__mips__) 654 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS; 655#elif defined(__aarch64__) 656 g_cpuFamily = ANDROID_CPU_FAMILY_ARM64; 657#elif defined(__x86_64__) 658 g_cpuFamily = ANDROID_CPU_FAMILY_X86_64; 659#else 660 g_cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN; 661#endif 662} 663 664static void 665android_cpuInit(void) 666{ 667 char* cpuinfo = NULL; 668 int cpuinfo_len; 669 670 android_cpuInitFamily(); 671 672 g_cpuFeatures = 0; 673 g_cpuCount = 1; 674 g_inited = 1; 675 676 cpuinfo_len = get_file_size("/proc/cpuinfo"); 677 if (cpuinfo_len < 0) { 678 D("cpuinfo_len cannot be computed!"); 679 return; 680 } 681 cpuinfo = malloc(cpuinfo_len); 682 if (cpuinfo == NULL) { 683 D("cpuinfo buffer could not be allocated"); 684 return; 685 } 686 cpuinfo_len = read_file("/proc/cpuinfo", cpuinfo, cpuinfo_len); 687 D("cpuinfo_len is (%d):\n%.*s\n", cpuinfo_len, 688 cpuinfo_len >= 0 ? cpuinfo_len : 0, cpuinfo); 689 690 if (cpuinfo_len < 0) /* should not happen */ { 691 free(cpuinfo); 692 return; 693 } 694 695 /* Count the CPU cores, the value may be 0 for single-core CPUs */ 696 g_cpuCount = get_cpu_count(); 697 if (g_cpuCount == 0) { 698 g_cpuCount = 1; 699 } 700 701 D("found cpuCount = %d\n", g_cpuCount); 702 703#ifdef __arm__ 704 { 705 /* Extract architecture from the "CPU Architecture" field. 706 * The list is well-known, unlike the the output of 707 * the 'Processor' field which can vary greatly. 708 * 709 * See the definition of the 'proc_arch' array in 710 * $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in 711 * same file. 712 */ 713 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture"); 714 715 if (cpuArch != NULL) { 716 char* end; 717 long archNumber; 718 int hasARMv7 = 0; 719 720 D("found cpuArch = '%s'\n", cpuArch); 721 722 /* read the initial decimal number, ignore the rest */ 723 archNumber = strtol(cpuArch, &end, 10); 724 725 /* Note that ARMv8 is upwards compatible with ARMv7. */ 726 if (end > cpuArch && archNumber >= 7) { 727 hasARMv7 = 1; 728 } 729 730 /* Unfortunately, it seems that certain ARMv6-based CPUs 731 * report an incorrect architecture number of 7! 732 * 733 * See http://code.google.com/p/android/issues/detail?id=10812 734 * 735 * We try to correct this by looking at the 'elf_format' 736 * field reported by the 'Processor' field, which is of the 737 * form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for 738 * an ARMv6-one. 739 */ 740 if (hasARMv7) { 741 char* cpuProc = extract_cpuinfo_field(cpuinfo, cpuinfo_len, 742 "Processor"); 743 if (cpuProc != NULL) { 744 D("found cpuProc = '%s'\n", cpuProc); 745 if (has_list_item(cpuProc, "(v6l)")) { 746 D("CPU processor and architecture mismatch!!\n"); 747 hasARMv7 = 0; 748 } 749 free(cpuProc); 750 } 751 } 752 753 if (hasARMv7) { 754 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7; 755 } 756 757 /* The LDREX / STREX instructions are available from ARMv6 */ 758 if (archNumber >= 6) { 759 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX; 760 } 761 762 free(cpuArch); 763 } 764 765 /* Check Houdini binary translator is installed */ 766 int has_houdini = has_houdini_binary_translator(); 767 768 /* Extract the list of CPU features from ELF hwcaps */ 769 uint32_t hwcaps = 0; 770 if (!has_houdini) { 771 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP); 772 } 773 if (!hwcaps) { 774 D("Parsing /proc/self/auxv to extract ELF hwcaps!\n"); 775 hwcaps = get_elf_hwcap_from_proc_self_auxv(); 776 } 777 if (!hwcaps) { 778 // Parsing /proc/self/auxv will fail from regular application 779 // processes on some Android platform versions, when this happens 780 // parse proc/cpuinfo instead. 781 D("Parsing /proc/cpuinfo to extract ELF hwcaps!\n"); 782 hwcaps = get_elf_hwcap_from_proc_cpuinfo(cpuinfo, cpuinfo_len); 783 } 784 785 if (hwcaps != 0) { 786 int has_vfp = (hwcaps & HWCAP_VFP); 787 int has_vfpv3 = (hwcaps & HWCAP_VFPv3); 788 int has_vfpv3d16 = (hwcaps & HWCAP_VFPv3D16); 789 int has_vfpv4 = (hwcaps & HWCAP_VFPv4); 790 int has_neon = (hwcaps & HWCAP_NEON); 791 int has_idiva = (hwcaps & HWCAP_IDIVA); 792 int has_idivt = (hwcaps & HWCAP_IDIVT); 793 int has_iwmmxt = (hwcaps & HWCAP_IWMMXT); 794 795 // The kernel does a poor job at ensuring consistency when 796 // describing CPU features. So lots of guessing is needed. 797 798 // 'vfpv4' implies VFPv3|VFP_FMA|FP16 799 if (has_vfpv4) 800 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 | 801 ANDROID_CPU_ARM_FEATURE_VFP_FP16 | 802 ANDROID_CPU_ARM_FEATURE_VFP_FMA; 803 804 // 'vfpv3' or 'vfpv3d16' imply VFPv3. Note that unlike GCC, 805 // a value of 'vfpv3' doesn't necessarily mean that the D32 806 // feature is present, so be conservative. All CPUs in the 807 // field that support D32 also support NEON, so this should 808 // not be a problem in practice. 809 if (has_vfpv3 || has_vfpv3d16) 810 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3; 811 812 // 'vfp' is super ambiguous. Depending on the kernel, it can 813 // either mean VFPv2 or VFPv3. Make it depend on ARMv7. 814 if (has_vfp) { 815 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7) 816 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3; 817 else 818 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2; 819 } 820 821 // Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA 822 if (has_neon) { 823 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 | 824 ANDROID_CPU_ARM_FEATURE_NEON | 825 ANDROID_CPU_ARM_FEATURE_VFP_D32; 826 if (has_vfpv4) 827 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA; 828 } 829 830 // VFPv3 implies VFPv2 and ARMv7 831 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3) 832 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2 | 833 ANDROID_CPU_ARM_FEATURE_ARMv7; 834 835 if (has_idiva) 836 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM; 837 if (has_idivt) 838 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2; 839 840 if (has_iwmmxt) 841 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt; 842 } 843 844 /* Extract the list of CPU features from ELF hwcaps2 */ 845 uint32_t hwcaps2 = 0; 846 if (!has_houdini) { 847 hwcaps2 = get_elf_hwcap_from_getauxval(AT_HWCAP2); 848 } 849 if (hwcaps2 != 0) { 850 int has_aes = (hwcaps2 & HWCAP2_AES); 851 int has_pmull = (hwcaps2 & HWCAP2_PMULL); 852 int has_sha1 = (hwcaps2 & HWCAP2_SHA1); 853 int has_sha2 = (hwcaps2 & HWCAP2_SHA2); 854 int has_crc32 = (hwcaps2 & HWCAP2_CRC32); 855 856 if (has_aes) 857 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_AES; 858 if (has_pmull) 859 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_PMULL; 860 if (has_sha1) 861 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA1; 862 if (has_sha2) 863 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA2; 864 if (has_crc32) 865 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_CRC32; 866 } 867 /* Extract the cpuid value from various fields */ 868 // The CPUID value is broken up in several entries in /proc/cpuinfo. 869 // This table is used to rebuild it from the entries. 870 static const struct CpuIdEntry { 871 const char* field; 872 char format; 873 char bit_lshift; 874 char bit_length; 875 } cpu_id_entries[] = { 876 { "CPU implementer", 'x', 24, 8 }, 877 { "CPU variant", 'x', 20, 4 }, 878 { "CPU part", 'x', 4, 12 }, 879 { "CPU revision", 'd', 0, 4 }, 880 }; 881 size_t i; 882 D("Parsing /proc/cpuinfo to recover CPUID\n"); 883 for (i = 0; 884 i < sizeof(cpu_id_entries)/sizeof(cpu_id_entries[0]); 885 ++i) { 886 const struct CpuIdEntry* entry = &cpu_id_entries[i]; 887 char* value = extract_cpuinfo_field(cpuinfo, 888 cpuinfo_len, 889 entry->field); 890 if (value == NULL) 891 continue; 892 893 D("field=%s value='%s'\n", entry->field, value); 894 char* value_end = value + strlen(value); 895 int val = 0; 896 const char* start = value; 897 const char* p; 898 if (value[0] == '0' && (value[1] == 'x' || value[1] == 'X')) { 899 start += 2; 900 p = parse_hexadecimal(start, value_end, &val); 901 } else if (entry->format == 'x') 902 p = parse_hexadecimal(value, value_end, &val); 903 else 904 p = parse_decimal(value, value_end, &val); 905 906 if (p > (const char*)start) { 907 val &= ((1 << entry->bit_length)-1); 908 val <<= entry->bit_lshift; 909 g_cpuIdArm |= (uint32_t) val; 910 } 911 912 free(value); 913 } 914 915 // Handle kernel configuration bugs that prevent the correct 916 // reporting of CPU features. 917 static const struct CpuFix { 918 uint32_t cpuid; 919 uint64_t or_flags; 920 } cpu_fixes[] = { 921 /* The Nexus 4 (Qualcomm Krait) kernel configuration 922 * forgets to report IDIV support. */ 923 { 0x510006f2, ANDROID_CPU_ARM_FEATURE_IDIV_ARM | 924 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 }, 925 { 0x510006f3, ANDROID_CPU_ARM_FEATURE_IDIV_ARM | 926 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 }, 927 }; 928 size_t n; 929 for (n = 0; n < sizeof(cpu_fixes)/sizeof(cpu_fixes[0]); ++n) { 930 const struct CpuFix* entry = &cpu_fixes[n]; 931 932 if (g_cpuIdArm == entry->cpuid) 933 g_cpuFeatures |= entry->or_flags; 934 } 935 936 // Special case: The emulator-specific Android 4.2 kernel fails 937 // to report support for the 32-bit ARM IDIV instruction. 938 // Technically, this is a feature of the virtual CPU implemented 939 // by the emulator. Note that it could also support Thumb IDIV 940 // in the future, and this will have to be slightly updated. 941 char* hardware = extract_cpuinfo_field(cpuinfo, 942 cpuinfo_len, 943 "Hardware"); 944 if (hardware) { 945 if (!strcmp(hardware, "Goldfish") && 946 g_cpuIdArm == 0x4100c080 && 947 (g_cpuFamily & ANDROID_CPU_ARM_FEATURE_ARMv7) != 0) { 948 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM; 949 } 950 free(hardware); 951 } 952 } 953#endif /* __arm__ */ 954#ifdef __aarch64__ 955 { 956 /* Extract the list of CPU features from ELF hwcaps */ 957 uint32_t hwcaps = 0; 958 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP); 959 if (hwcaps != 0) { 960 int has_fp = (hwcaps & HWCAP_FP); 961 int has_asimd = (hwcaps & HWCAP_ASIMD); 962 int has_aes = (hwcaps & HWCAP_AES); 963 int has_pmull = (hwcaps & HWCAP_PMULL); 964 int has_sha1 = (hwcaps & HWCAP_SHA1); 965 int has_sha2 = (hwcaps & HWCAP_SHA2); 966 int has_crc32 = (hwcaps & HWCAP_CRC32); 967 968 if(has_fp == 0) { 969 D("ERROR: Floating-point unit missing, but is required by Android on AArch64 CPUs\n"); 970 } 971 if(has_asimd == 0) { 972 D("ERROR: ASIMD unit missing, but is required by Android on AArch64 CPUs\n"); 973 } 974 975 if (has_fp) 976 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_FP; 977 if (has_asimd) 978 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_ASIMD; 979 if (has_aes) 980 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_AES; 981 if (has_pmull) 982 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_PMULL; 983 if (has_sha1) 984 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA1; 985 if (has_sha2) 986 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA2; 987 if (has_crc32) 988 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_CRC32; 989 } 990 } 991#endif /* __aarch64__ */ 992 993#ifdef __i386__ 994 int regs[4]; 995 996/* According to http://en.wikipedia.org/wiki/CPUID */ 997#define VENDOR_INTEL_b 0x756e6547 998#define VENDOR_INTEL_c 0x6c65746e 999#define VENDOR_INTEL_d 0x49656e69 1000 1001 x86_cpuid(0, regs); 1002 int vendorIsIntel = (regs[1] == VENDOR_INTEL_b && 1003 regs[2] == VENDOR_INTEL_c && 1004 regs[3] == VENDOR_INTEL_d); 1005 1006 x86_cpuid(1, regs); 1007 if ((regs[2] & (1 << 9)) != 0) { 1008 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3; 1009 } 1010 if ((regs[2] & (1 << 23)) != 0) { 1011 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT; 1012 } 1013 if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) { 1014 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE; 1015 } 1016#endif 1017 1018 free(cpuinfo); 1019} 1020 1021 1022AndroidCpuFamily 1023android_getCpuFamily(void) 1024{ 1025 pthread_once(&g_once, android_cpuInit); 1026 return g_cpuFamily; 1027} 1028 1029 1030uint64_t 1031android_getCpuFeatures(void) 1032{ 1033 pthread_once(&g_once, android_cpuInit); 1034 return g_cpuFeatures; 1035} 1036 1037 1038int 1039android_getCpuCount(void) 1040{ 1041 pthread_once(&g_once, android_cpuInit); 1042 return g_cpuCount; 1043} 1044 1045static void 1046android_cpuInitDummy(void) 1047{ 1048 g_inited = 1; 1049} 1050 1051int 1052android_setCpu(int cpu_count, uint64_t cpu_features) 1053{ 1054 /* Fail if the library was already initialized. */ 1055 if (g_inited) 1056 return 0; 1057 1058 android_cpuInitFamily(); 1059 g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count); 1060 g_cpuFeatures = cpu_features; 1061 pthread_once(&g_once, android_cpuInitDummy); 1062 1063 return 1; 1064} 1065 1066#ifdef __arm__ 1067uint32_t 1068android_getCpuIdArm(void) 1069{ 1070 pthread_once(&g_once, android_cpuInit); 1071 return g_cpuIdArm; 1072} 1073 1074int 1075android_setCpuArm(int cpu_count, uint64_t cpu_features, uint32_t cpu_id) 1076{ 1077 if (!android_setCpu(cpu_count, cpu_features)) 1078 return 0; 1079 1080 g_cpuIdArm = cpu_id; 1081 return 1; 1082} 1083#endif /* __arm__ */ 1084 1085/* 1086 * Technical note: Making sense of ARM's FPU architecture versions. 1087 * 1088 * FPA was ARM's first attempt at an FPU architecture. There is no Android 1089 * device that actually uses it since this technology was already obsolete 1090 * when the project started. If you see references to FPA instructions 1091 * somewhere, you can be sure that this doesn't apply to Android at all. 1092 * 1093 * FPA was followed by "VFP", soon renamed "VFPv1" due to the emergence of 1094 * new versions / additions to it. ARM considers this obsolete right now, 1095 * and no known Android device implements it either. 1096 * 1097 * VFPv2 added a few instructions to VFPv1, and is an *optional* extension 1098 * supported by some ARMv5TE, ARMv6 and ARMv6T2 CPUs. Note that a device 1099 * supporting the 'armeabi' ABI doesn't necessarily support these. 1100 * 1101 * VFPv3-D16 adds a few instructions on top of VFPv2 and is typically used 1102 * on ARMv7-A CPUs which implement a FPU. Note that it is also mandated 1103 * by the Android 'armeabi-v7a' ABI. The -D16 suffix in its name means 1104 * that it provides 16 double-precision FPU registers (d0-d15) and 32 1105 * single-precision ones (s0-s31) which happen to be mapped to the same 1106 * register banks. 1107 * 1108 * VFPv3-D32 is the name of an extension to VFPv3-D16 that provides 16 1109 * additional double precision registers (d16-d31). Note that there are 1110 * still only 32 single precision registers. 1111 * 1112 * VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision 1113 * registers. It is only used on ARMv7-M (i.e. on micro-controllers) which 1114 * are not supported by Android. Note that it is not compatible with VFPv2. 1115 * 1116 * NOTE: The term 'VFPv3' usually designate either VFPv3-D16 or VFPv3-D32 1117 * depending on context. For example GCC uses it for VFPv3-D32, but 1118 * the Linux kernel code uses it for VFPv3-D16 (especially in 1119 * /proc/cpuinfo). Always try to use the full designation when 1120 * possible. 1121 * 1122 * NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides 1123 * instructions to perform parallel computations on vectors of 8, 16, 1124 * 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all 1125 * NEON registers are also mapped to the same register banks. 1126 * 1127 * VFPv4-D16, adds a few instructions on top of VFPv3-D16 in order to 1128 * perform fused multiply-accumulate on VFP registers, as well as 1129 * half-precision (16-bit) conversion operations. 1130 * 1131 * VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision 1132 * registers. 1133 * 1134 * VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fused 1135 * multiply-accumulate instructions that work on the NEON registers. 1136 * 1137 * NOTE: Similarly, "VFPv4" might either reference VFPv4-D16 or VFPv4-D32 1138 * depending on context. 1139 * 1140 * The following information was determined by scanning the binutils-2.22 1141 * sources: 1142 * 1143 * Basic VFP instruction subsets: 1144 * 1145 * #define FPU_VFP_EXT_V1xD 0x08000000 // Base VFP instruction set. 1146 * #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns. 1147 * #define FPU_VFP_EXT_V2 0x02000000 // ARM10E VFPr1. 1148 * #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision. 1149 * #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision. 1150 * #define FPU_NEON_EXT_V1 0x00400000 // Neon (SIMD) insns. 1151 * #define FPU_VFP_EXT_D32 0x00200000 // Registers D16-D31. 1152 * #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions. 1153 * #define FPU_NEON_EXT_FMA 0x00080000 // Neon fused multiply-add 1154 * #define FPU_VFP_EXT_FMA 0x00040000 // VFP fused multiply-add 1155 * 1156 * FPU types (excluding NEON) 1157 * 1158 * FPU_VFP_V1xD (EXT_V1xD) 1159 * | 1160 * +--------------------------+ 1161 * | | 1162 * FPU_VFP_V1 (+EXT_V1) FPU_VFP_V3xD (+EXT_V2+EXT_V3xD) 1163 * | | 1164 * | | 1165 * FPU_VFP_V2 (+EXT_V2) FPU_VFP_V4_SP_D16 (+EXT_FP16+EXT_FMA) 1166 * | 1167 * FPU_VFP_V3D16 (+EXT_Vx3D+EXT_V3) 1168 * | 1169 * +--------------------------+ 1170 * | | 1171 * FPU_VFP_V3 (+EXT_D32) FPU_VFP_V4D16 (+EXT_FP16+EXT_FMA) 1172 * | | 1173 * | FPU_VFP_V4 (+EXT_D32) 1174 * | 1175 * FPU_VFP_HARD (+EXT_FMA+NEON_EXT_FMA) 1176 * 1177 * VFP architectures: 1178 * 1179 * ARCH_VFP_V1xD (EXT_V1xD) 1180 * | 1181 * +------------------+ 1182 * | | 1183 * | ARCH_VFP_V3xD (+EXT_V2+EXT_V3xD) 1184 * | | 1185 * | ARCH_VFP_V3xD_FP16 (+EXT_FP16) 1186 * | | 1187 * | ARCH_VFP_V4_SP_D16 (+EXT_FMA) 1188 * | 1189 * ARCH_VFP_V1 (+EXT_V1) 1190 * | 1191 * ARCH_VFP_V2 (+EXT_V2) 1192 * | 1193 * ARCH_VFP_V3D16 (+EXT_V3xD+EXT_V3) 1194 * | 1195 * +-------------------+ 1196 * | | 1197 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16) 1198 * | 1199 * +-------------------+ 1200 * | | 1201 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA) 1202 * | | 1203 * | ARCH_VFP_V4 (+EXT_D32) 1204 * | | 1205 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA) 1206 * | 1207 * ARCH_VFP_V3 (+EXT_D32) 1208 * | 1209 * +-------------------+ 1210 * | | 1211 * | ARCH_VFP_V3_FP16 (+EXT_FP16) 1212 * | 1213 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON) 1214 * | 1215 * ARCH_NEON_FP16 (+EXT_FP16) 1216 * 1217 * -fpu=<name> values and their correspondance with FPU architectures above: 1218 * 1219 * {"vfp", FPU_ARCH_VFP_V2}, 1220 * {"vfp9", FPU_ARCH_VFP_V2}, 1221 * {"vfp3", FPU_ARCH_VFP_V3}, // For backwards compatbility. 1222 * {"vfp10", FPU_ARCH_VFP_V2}, 1223 * {"vfp10-r0", FPU_ARCH_VFP_V1}, 1224 * {"vfpxd", FPU_ARCH_VFP_V1xD}, 1225 * {"vfpv2", FPU_ARCH_VFP_V2}, 1226 * {"vfpv3", FPU_ARCH_VFP_V3}, 1227 * {"vfpv3-fp16", FPU_ARCH_VFP_V3_FP16}, 1228 * {"vfpv3-d16", FPU_ARCH_VFP_V3D16}, 1229 * {"vfpv3-d16-fp16", FPU_ARCH_VFP_V3D16_FP16}, 1230 * {"vfpv3xd", FPU_ARCH_VFP_V3xD}, 1231 * {"vfpv3xd-fp16", FPU_ARCH_VFP_V3xD_FP16}, 1232 * {"neon", FPU_ARCH_VFP_V3_PLUS_NEON_V1}, 1233 * {"neon-fp16", FPU_ARCH_NEON_FP16}, 1234 * {"vfpv4", FPU_ARCH_VFP_V4}, 1235 * {"vfpv4-d16", FPU_ARCH_VFP_V4D16}, 1236 * {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16}, 1237 * {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4}, 1238 * 1239 * 1240 * Simplified diagram that only includes FPUs supported by Android: 1241 * Only ARCH_VFP_V3D16 is actually mandated by the armeabi-v7a ABI, 1242 * all others are optional and must be probed at runtime. 1243 * 1244 * ARCH_VFP_V3D16 (EXT_V1xD+EXT_V1+EXT_V2+EXT_V3xD+EXT_V3) 1245 * | 1246 * +-------------------+ 1247 * | | 1248 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16) 1249 * | 1250 * +-------------------+ 1251 * | | 1252 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA) 1253 * | | 1254 * | ARCH_VFP_V4 (+EXT_D32) 1255 * | | 1256 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA) 1257 * | 1258 * ARCH_VFP_V3 (+EXT_D32) 1259 * | 1260 * +-------------------+ 1261 * | | 1262 * | ARCH_VFP_V3_FP16 (+EXT_FP16) 1263 * | 1264 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON) 1265 * | 1266 * ARCH_NEON_FP16 (+EXT_FP16) 1267 * 1268 */ 1269 1270#endif // defined(__le32__) || defined(__le64__) 1271