| d1ee80948144526b985afb44a0574248cf7da58a |
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13-Apr-2016 |
Vladimir Marko <vmarko@google.com> |
Move Assemblers to the Arena.
And clean up some APIs to return std::unique_ptr<> instead
of raw pointers that don't communicate ownership.
(cherry picked from commit 93205e395f777c1dd81d3f164cf9a4aec4bde45f)
Bug: 27505766
Change-Id: I3017302307a0253d661240750298802fb0d9585e
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| ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34 |
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17-Dec-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing/ARM: Fix CmpConstant().
CMN updates flags based on addition of its operands.
Do not confuse the "N" suffix with bitwise inversion
performed by MVN.
Also add more special cases analogous to AddConstant()
and use CmpConstant() more in code generator.
Change-Id: I0d4571770a3f0fdf162e97d4bde56814098e7246
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| f5c09c3ed5bca4c34d8476dd9ed2714106fafbcf |
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17-Dec-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing/ARM: Fix AddConstant() to adhere to set_cc.
And improve it to use shorter code sequences.
Bug: 26121945
Change-Id: Ia4f1688652c195a7ca19af36d919388a550e2841
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| b4536b7de576b20c74c612406c5d3132998075ef |
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24-Nov-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing/ARM: Implement kDexCachePcRelative dispatch.
Change-Id: I0fe2da50a30a3f62bec8ea01688dd1fec84b1831
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| f9d741e32c6f1629ce70eefc68d3363fa1cfd696 |
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20-Nov-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing/ARM: Improve long shifts by 1.
Implement long
Shl(x,1) as LSLS+ADC,
Shr(x,1) as ASR+RRX and
UShr(x,1) as LSR+RRX.
Remove the simplification substituting Shl(x,1) with
ADD(x,x) as it interferes with some other optimizations
instead of helping them. And since it didn't help 64-bit
architectures anyway, codegen is the correct place for it.
This is now implemented for ARM and x86, so only mips32 can
be improved.
Change-Id: Idd14f23292198b2260189e1497ca5411b21743b3
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| 6fd0ffe8da212723a3ac0256ce350b5872cc61d4 |
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19-Nov-2015 |
Vladimir Marko <vmarko@google.com> |
Optimizing/Thumb2: Improve load/store for large offsets.
This reduces the boot.oat size on Nexus 5 by 568KiB (0.8%).
Also change 32-bit ADD/SUB immediate to use the recommended
encoding T3 when both T3 and T4 are available.
Change-Id: I174382bda2b22da70560b947f5536acf8c1814a9
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| d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1 |
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14-Sep-2015 |
Vladimir Marko <vmarko@google.com> |
Improve Thumb2 bitwise operations.
Allow embedding constants in AND, ORR, EOR. Add ORN to
assembler, use BIC and ORN for AND and ORR when needed.
Change-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661
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| 73cf0fb75de2a449ce4fe329b5f1fb42eef1372f |
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30-Jul-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Add 16-bit Thumb2 ROR, NEGS and CMP for high registers.
Also clean up the usage of set_cc flag. Define a SetCc
enumeration that specifies whether to set or keep condition
codes or whether we don't care and a 16-bit instruction
should be selected if one exists.
This reduces the size of Nexus 5 boot.oat by 44KiB (when
compiled with Optimizing which is not the default yet).
Change-Id: I047072dc197ea678bf2019c01bcb28943fa9b604
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| c60e1b755c5632dfeb04c333489ede52ee5c945f |
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30-Jul-2015 |
Andreas Gampe <agampe@google.com> |
ART: Use __ANDROID__ instead of HAVE_ANDROID_OS
Use the proper define.
Change-Id: I71e291ac25f5d5f0187ac9b6ef2d6872f19e6085
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| cf93a5cd9c978f59113d42f9f642fab5e2cc8877 |
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16-Jun-2015 |
Vladimir Marko <vmarko@google.com> |
Revert "Revert "ART: Implement literal pool for arm, fix branch fixup.""
This reverts commit fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98.
Adjust block label positions. Bad catch block labels were the
reason for the revert.
Change-Id: Ia6950d639d46b9da6b07f3ade63ab46d03d63310
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| fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98 |
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16-Jun-2015 |
Vladimir Marko <vmarko@google.com> |
Revert "ART: Implement literal pool for arm, fix branch fixup."
This reverts commit f38caa68cce551fb153dff37d01db518e58ed00f.
Change-Id: Id88b82cc949d288cfcdb3c401b96f884b777fc40
Reason: broke the tests.
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| f38caa68cce551fb153dff37d01db518e58ed00f |
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29-May-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Implement literal pool for arm, fix branch fixup.
Change-Id: Iecc91418bb4ee1c957f42fefb737d0ee2ba960e7
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| d56376cce54e7df976780ecbd03228f60d276433 |
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21-May-2015 |
Nicolas Geoffray <ngeoffray@google.com> |
Revert "Revert "Introduce a NearLabel in thumb2.""
This reverts commit 1f277e3cef6c33cd35e91123978491d83338d2ad.
- Fix CompareAndBranch to not use cbz/cbnz with high registers.
- Add a test for CompareAndBranch with the *inc file, as the
other assembler test infrastructure does not handle labels.
Change-Id: If552bf1112b96caa3b9bb6c73c4b40bb90a33db7
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| fd11470897ea356e5870280e4ab38a18dc83b48f |
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14-May-2015 |
Andreas Gampe <agampe@google.com> |
ART: Fix unused return-value in test
Check the return value of system() call.
Change-Id: I1f5f9621f6a39029b9df5b0d4ab0e230ba6c79a3
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| 3e52aa4d406fe802dabee2a2e7ba8764cc13aaaa |
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12-Apr-2015 |
David Srbecky <dsrbecky@google.com> |
Move GetAndroidToolsDir to common location.
Move the code which looks for the prebuilts directory
to CommonRuntimeTest and add test for it.
Change-Id: Id804de31c466656957fdd4b6a470f80a00477aed
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| 7b7e524c86a67f7357bbcfd0e7bde07ded50cca2 |
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03-Feb-2015 |
Andreas Gampe <agampe@google.com> |
ART: Fix assembler_thumb_test
Fix the inconsistent calls. This was bad practice, requiring that
shape meant arm32 and thumb were not interchangeable.
Also fix an error in the assembler itself for tst and teq.
Change-Id: I50242801002aa81cc17bfaa53eb8b7c1d9488fbc
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| 52ed9ad728bf03cc996feff6b3874c1c5a3d0a1f |
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05-Sep-2014 |
Tong Shen <endlessroad@google.com> |
ART: Fix host test failure (assembler_thumb_test).
Check if "bin/{as,objcopy,objdump}" exists in the tools dir we found in "prebuilts/gcc/linux-x86/arm/".
Now there's an empty tree in platform/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9,
causing assembler_thumb_test to fail.
Change-Id: If6ba4f778b79f95239aa85e54816ab168e7d8940
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| 3c7bb98698f77af10372cf31824d3bb115d9bf0f |
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23-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Implement array get and array put in optimizing.
Also fix a couple of assembler/disassembler issues.
Change-Id: I705c8572988c1a9c4df3172b304678529636d5f6
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| 4470c1d5a94ebedd8e579a212eb4c60da1ae6b24 |
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22-Jul-2014 |
Andreas Gampe <agampe@google.com> |
ART: Increase command buffer size in assembler_thumb_test
Change-Id: I5fe0014a2928772650bdb120a877eb9624bf7651
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| 8baf0d9263f914aee8ca91df92660342ace9e671 |
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21-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Fix sizeof -> strlen to get the test to run on build servers.
Change-Id: I8501d02a9bc5f84a769a80d46d0ec5754c972e5d
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| 96f89a290eb67d7bf4b1636798fa28df14309cc7 |
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11-Jul-2014 |
Nicolas Geoffray <ngeoffray@google.com> |
Add assembly operations with constants in optimizing compiler.
Change-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f
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| 0bb9ade51635559f991259a7ac90d8570ad886aa |
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27-Jun-2014 |
Dave Allison <dallison@google.com> |
Fix off-by-one errors in limit checking for ldr/str instructions.
The LDR/STR encoder in the thumb assembler had an off-by-one
error for limit checking for immediates. This resulted in an
assertion failure for things like 'ldr rx,[ry,#128]'
Bug: 15876206
Change-Id: Ic866212e2feae94e0bd4c753724898d84f5cb944
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| 45fdb93f04b981f70f7b6d98949ab3986b7331f8 |
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25-Jun-2014 |
Dave Allison <dallison@google.com> |
Support additional instructions in ARM and thumb assemblers
This adds the following support for the ARM and thumb assemblers:
1. Shifting by a register.
2. LDR/STR with a register offset, possibly shifted.
3. LDR(literal).
4. STR PC relative.
Also adds tests for them in the thumb assembler gtest.
Change-Id: Ie467e3c1d06b699cacbdef3482ed9a92e4f1809b
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| d20ddb22891f083b762a81eb64ec391e0f60b43a |
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05-Jun-2014 |
Dave Allison <dallison@google.com> |
Remove unused variable in assembler test.
This is flagged as an error when building master, but not others...
Change-Id: Iaea5307b06d8e4fa1a9d1035905fc204eb98559a
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| c819e0d9485f23a8dcfc94419292dcd053053eb9 |
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05-Jun-2014 |
Dave Allison <dallison@google.com> |
Fix assembler test to use path if it can't find tools.
This fixes build breakage.
Change-Id: I8074d47f1c1470cf886d517e9e68a6a6b4330485
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| 65fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7 |
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28-Apr-2014 |
Dave Allison <dallison@google.com> |
Thumb2 assembler for JNI compiler and optimizing compiler
This provides a programmatic assembler for the thumb2 instruction set for
ARM. The interface is the same as the ARM assembler and the ARM assembler has
been moved into Arm32Assembler. The assembler handles most 16 and 32 bit instructions
and also allows relocations due to branch expansion. It will also rewrite cbz/cbnz
instructions if they go out of range.
It also changes the JNI compiler to use the thumb2 assembler as opposed
to forcing it to use ARM32. The trampoline compiler still uses ARM due to the
way it returns the address of its generated code. A trampoline in thumb2 is the
same size as that in ARM anyway (8 bytes).
Provides gtest for testing the thumb2 instruction output. This gtest only runs
on the host as it uses arm-eabi-objdump to disassemble the generated code. On the
target the output is not checked but the assembler will still be run to perform
all its checks.
Change-Id: Icd9742b6f13541bec5b23097896727392e3a6fb6
|