| d967266cdfc8011c81ba6e9857a247c4a73bd0fc |
|
03-Sep-2015 |
Lazar Trsic <Lazar.Trsic@imgtec.com> |
MIPS64: Remove unaligned memory access from art generated code
Unaligned memory access was caused by sd, ld, ldc1 and sdc1
instructions. Check if offset is unaligned and replace it
with two 32 bit memory accesses, if so.
Added assembler tests for new instructions, as well as assembler
tests for LoadFromOffset, LoadFpuFromOffset, StoreToOffset and
StoreFpuToOffset.
Change-Id: I0228a4a2ce6c801eeb5b46952b8330e14468deb3
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| baf60b7cceb3968ae36540e2f7f92cec3805f6ed |
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23-Dec-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS: Improve conversion between ints and floats.
Change-Id: I767fe9623cc14e8480c31e305725eb5221cac282
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| 299a93993fb8f3efbf0465cf674d80c3bcfdc66c |
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09-Dec-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS64: Fuse long and FP compare & condition in Optimizing.
Bug: 25559148
Change-Id: I2d14ac75460a76848c71c08cffff6d7a18f5f580
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| a0e87b0a97fadd54540ec7e8331b61bebd82d378 |
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25-Sep-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS64: Support short and long branches
Change-Id: I618c960bd211048166d9fde78d4106bd3ca42b3a
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| 5c75ffad3aaf9d62ea3ac4cf2c0a2fd699368f83 |
|
24-Sep-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS64: small improvements in code generation
Specifically:
- More efficient load/store of constant 0 (and +0.0)
- Improved swapping of floats/doubles in registers
- Use kNoOutputOverlap wherever possible
- More efficient 64-bit integer comparison with 0
- More efficient load of integer constants of the form (2**n)-1
Change-Id: Ic2914d8865aa6616b9a0b21b3cc173d4477eb8c7
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| c857c746707dfd45d74b75cb7fa84484ca68cc2a |
|
24-Sep-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS64: Improve integer division by constants
This also removes some unused instructions and instructions not
available on MIPS64R6.
Change-Id: I44bfe12c60344312c88c45e97b6b07dcd5bdc630
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| 9aebff2f19b605bff864308be51b604b7191163e |
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23-Sep-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS64: Add intrinsic support for bit rotation
- int java.lang.Integer.rotateRight(int i, int distance)
- int java.lang.Long.rotateRight(long i, int distance)
Assembler tests for new MIPS instructions will be provided in a
separate patch.
Change-Id: I6dd4786e2d5f674bf56ff3d5afd321bb1bef589e
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| 5141763acd9ca2ddb2ee6bcc742d6d2a2aebd7df |
|
02-Oct-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS64: Additional assember tests:
- MOV.fmt - NEG.fmt - CVT.D.fmt - CVT.S.fmt
- JALR - SLL - SRL - SRA
- DSLL - DSRA - DSRL - DSLL32
- DSRL32 - DSRA32
Change-Id: Ib15ac72128805a9bca707211359191e32d95d5d7
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| 2fadd7bb67abf5bc3c5370f9508cfb5959d6e536 |
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14-Aug-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
Additional MIPS64 instructions needed by intrinsics code.
Change-Id: If2a48300aac7a10dadf485d1765fb5bdeed975fe
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| 4d02711ea578dbb789abb30cbaf12f9926e13d81 |
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01-Jul-2015 |
Roland Levillain <rpl@google.com> |
Implement heap poisoning in ART's Optimizing compiler.
- Instrument ARM, ARM64, x86 and x86-64 code generators.
- Note: To turn heap poisoning on in Optimizing, set the
environment variable `ART_HEAP_POISONING' to "true"
before compiling ART.
Bug: 12687968
Change-Id: Ib3120b38cf805a8a50207a314b9ccc90c8d93740
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| a1935c4fa255b5c20f5e9b2abce6be2d0f7cb0a8 |
|
26-Jun-2015 |
Roland Levillain <rpl@google.com> |
MIPS: Initial version of optimizing compiler for MIPS64R6.
(cherry picked from commit 4dda3376b71209fae07f5c3c8ac3eb4b54207aa8)
(amended for mnc-dev)
Bug: 21555893
Change-Id: I874dc356eee6ab061a32f8f3df5f8ac3a4ab7dcf
Signed-off-by: Alexey Frunze <Alexey.Frunze@imgtec.com>
Signed-off-by: Douglas Leung <douglas.leung@imgtec.com>
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| 559b1cc279deb9299414ddd46595bb8bca7fa090 |
|
24-Jun-2015 |
Lazar Trsic <Lazar.Trsic@imgtec.com> |
[MIPS64] JNI Compiler: Sign-extend int function arguments
MIPS n64 ABI differs from arm64. Arguments smaller than the 8B stack
slot need to be sign-extended.
Use combination (lw,sd), instead of (lw,sw) for 4B values.
Change fixes software keyboard crash on mips64.
Bug: 21555893
(cherry picked from commit f652d605753f1387e7797461b47116c5dcdf928d)
Change-Id: I7574d37f6039e9e8c9e0047254be71d28d4c829a
|
| f652d605753f1387e7797461b47116c5dcdf928d |
|
24-Jun-2015 |
Lazar Trsic <Lazar.Trsic@imgtec.com> |
[MIPS64] JNI Compiler: Sign-extend int function arguments
MIPS n64 ABI differs from arm64. Arguments smaller than the 8B stack
slot need to be sign-extended.
Use combination (lw,sd), instead of (lw,sw) for 4B values.
Change fixes software keyboard crash on mips64.
Change-Id: I7574d37f6039e9e8c9e0047254be71d28d4c829a
|
| 4dda3376b71209fae07f5c3c8ac3eb4b54207aa8 |
|
02-Jun-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS: Initial version of optimizing compiler for MIPS64R6.
Bug: 21555893
Change-Id: I874dc356eee6ab061a32f8f3df5f8ac3a4ab7dcf
Signed-off-by: Alexey Frunze <Alexey.Frunze@imgtec.com>
Signed-off-by: Douglas Leung <douglas.leung@imgtec.com>
|
| 3d21bdf8894e780d349c481e5c9e29fe1556051c |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native
Optimizing + quick tests are passing, devices boot.
TODO: Test and fix bugs in mips64.
Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.
Some of the savings are from removal of virtual methods and direct
methods object arrays.
Bug: 19264997
(cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33)
Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
Fix some ArtMethod related bugs
Added root visiting for runtime methods, not currently required
since the GcRoots in these methods are null.
Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes
--trace run-tests 005, 044.
Fixed optimizing compiler bug where we used a normal stack location
instead of double on ARM64, this fixes the debuggable tests.
TODO: Fix JDWP tests.
Bug: 19264997
Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3
ART: Fix casts for 64-bit pointers on 32-bit compiler.
Bug: 19264997
Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457
Fix JDWP tests after ArtMethod change
Fixes Throwable::GetStackDepth for exception event detection after
internal stack trace representation change.
Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of
proxy method.
Bug: 19264997
Change-Id: I363e293796848c3ec491c963813f62d868da44d2
Fix accidental IMT and root marking regression
Was always using the conflict trampoline. Also included fix for
regression in GC time caused by extra roots. Most of the regression
was IMT.
Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to
detached thread.
EvaluateAndApplyChanges:
From ~2500 -> ~1980
GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots
Bug: 19264997
Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0
Fix bogus image test assert
Previously we were comparing the size of the non moving space to
size of the image file.
Now we properly compare the size of the image space against the size
of the image file.
Bug: 19264997
Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a
[MIPS64] Fix art_quick_invoke_stub argument offsets.
ArtMethod reference's size got bigger, so we need to move other args
and leave enough space for ArtMethod* and 'this' pointer.
This fixes mips64 boot.
Bug: 19264997
Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
|
| e401d146407d61eeb99f8d6176b2ac13c4df1e33 |
|
22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native
Optimizing + quick tests are passing, devices boot.
TODO: Test and fix bugs in mips64.
Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.
Some of the savings are from removal of virtual methods and direct
methods object arrays.
Bug: 19264997
Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
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| 41b175aba41c9365a1c53b8a1afbd17129c87c14 |
|
19-May-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Clean up arm64 kNumberOfXRegisters usage.
Avoid undefined behavior for arm64 stemming from 1u << 32 in
loops with upper bound kNumberOfXRegisters.
Create iterators for enumerating bits in an integer either
from high to low or from low to high and use them for
<arch>Context::FillCalleeSaves() on all architectures.
Refactor runtime/utils.{h,cc} by moving all bit-fiddling
functions to runtime/base/bit_utils.{h,cc} (together with
the new bit iterators) and all time-related functions to
runtime/base/time_utils.{h,cc}. Improve test coverage and
fix some corner cases for the bit-fiddling functions.
Bug: 13925192
(cherry picked from commit 80afd02024d20e60b197d3adfbb43cc303cf29e0)
Change-Id: I905257a21de90b5860ebe1e39563758f721eab82
|
| 80afd02024d20e60b197d3adfbb43cc303cf29e0 |
|
19-May-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Clean up arm64 kNumberOfXRegisters usage.
Avoid undefined behavior for arm64 stemming from 1u << 32 in
loops with upper bound kNumberOfXRegisters.
Create iterators for enumerating bits in an integer either
from high to low or from low to high and use them for
<arch>Context::FillCalleeSaves() on all architectures.
Refactor runtime/utils.{h,cc} by moving all bit-fiddling
functions to runtime/base/bit_utils.{h,cc} (together with
the new bit iterators) and all time-related functions to
runtime/base/time_utils.{h,cc}. Improve test coverage and
fix some corner cases for the bit-fiddling functions.
Bug: 13925192
Change-Id: I704884dab15b41ecf7a1c47d397ab1c3fc7ee0f7
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| d90957fbe6f41c66d5494ae5db1f60d2434d4c84 |
|
01-May-2015 |
Douglas Leung <douglas.leung@imgtec.com> |
ART: Fix mips64 jni bugs.
For mips64, 32-bits loads can be zero extended or sign extended to
64-bits. The extension type must match the data type to be loaded.
Also re-enable mips64 generic jni testing.
Change-Id: I9cabaf80b4fde63d9868fccd74593b36d1c324e8
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| dd97393aca1a3ff2abec4dc4f78d7724300971bc |
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07-Apr-2015 |
David Srbecky <dsrbecky@google.com> |
Implement CFI for JNI.
CFI is necessary for stack unwinding in gdb, lldb, and libunwind.
Change-Id: I37eb7973f99a6975034cf0e699e138c3a9aba10f
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| 75c40d419b621342ac834e5b61abcdcd84537063 |
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03-Apr-2015 |
Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> |
Fix JNI compiler for mips64
Fix assembly instructions in JNI stub to store the right size. Fix
callee-saves in JNI calling convention to reflect return registers.
Fix pointer size in mips64 assembler.
Change-Id: I4eccd1f56f62fa9119918192ec424e9073398bc7
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| 57b34294758e9c00993913ebe43c7ee4698a5cc6 |
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15-Jan-2015 |
Andreas Gampe <agampe@google.com> |
ART: Allow to compile interpret-only mips64 files
Include enough infrastructure to allow cross-compiling for mips64,
interpret-only. This includes the instruction-set-features, frame
size info and utils assembler.
Also add a disassembler for oatdump, and support in patchoat.
Note: the runtime cannot run mips64, yet.
Change-Id: Id106581fa76b478984741c62a8a03be0f370d992
|