/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1045 SmallVectorImpl<SDValue> &InVals) const { 1068 Outs, OutVals, Ins, dl, DAG, InVals); 1078 SmallVectorImpl<SDValue> &InVals) { 1087 InVals.push_back(Chain.getValue(0)); 1091 InVals.size())); 1093 InVals.push_back(SDValue()); 1105 InVals[index] = load; 1129 SmallVectorImpl<SDValue> &InVals) const { 1247 return LowerCallResult(Chain, InFlag, RVLocs, dl, DAG, InVals); 1266 SmallVectorImpl<SDValue> &InVals) 1075 LowerCallResult(SDValue Chain, SDValue InFlag, const SmallVectorImpl<CCValAssign> &RVLocs, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) argument [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 617 SmallVectorImpl<SDValue> &InVals, 635 InVals.push_back(Chain.getValue(0)); 645 SmallVectorImpl<SDValue> &InVals) const { 870 InVals, OutVals, Callee); 1031 SmallVectorImpl<SDValue> &InVals) 1074 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); 1079 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); 1087 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); 1094 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); 1102 InVals 612 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SmallVectorImpl<SDValue> &OutVals, SDValue Callee) const argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2573 SmallVectorImpl<SDValue> &InVals) const { 2813 InVals, CLI); 2821 SmallVectorImpl<SDValue> &InVals, 2875 InVals.push_back(Val); 2946 SmallVectorImpl<SDValue> &InVals) 2995 copyByValRegs(Chain, DL, OutChains, DAG, Flags, InVals, &*FuncArg, 3031 InVals.push_back(ArgValue); 3061 InVals.push_back(ArgValue); 3076 SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), DL, Reg, InVals[i]); 3086 // the size of Ins and InVals 2818 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, TargetLowering::CallLoweringInfo &CLI) const argument 3642 copyByValRegs( SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2368 SmallVectorImpl<SDValue> &InVals) const { 2425 InVals.push_back(FrameIdxN); 2476 InVals.push_back(ArgValue); 2520 InVals.push_back(ArgValue); 2644 SmallVectorImpl<SDValue> &InVals, bool isThisReturn, 2664 InVals.push_back(ThisVal); 2683 InVals.push_back(Val); 2855 SmallVectorImpl<SDValue> &InVals) const { 3215 InVals, IsThisReturn, 2641 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2771 SmallVectorImpl<SDValue> &InVals) 2776 dl, DAG, InVals); 2779 dl, DAG, InVals); 2782 dl, DAG, InVals); 2793 SmallVectorImpl<SDValue> &InVals) const { 2900 InVals.push_back(ArgValue); 2911 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, 3043 SmallVectorImpl<SDValue> &InVals) const { 3158 // etc. However, we have to provide a place-holder in InVals, so 3164 InVals 4358 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, bool IsPatchPoint, bool hasNest, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals, ImmutableCallSite *CS) const argument 4503 LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, bool IsPatchPoint, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, ImmutableCallSite *CS) const argument 4745 LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, bool IsPatchPoint, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, ImmutableCallSite *CS) const argument 5375 LowerCall_Darwin(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, bool IsPatchPoint, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, ImmutableCallSite *CS) const argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1427 SmallVectorImpl<SDValue> &InVals, 1447 InVals.push_back(ThisVal); 1501 InVals.push_back(Val); 1556 SmallVectorImpl<SDValue> &InVals) const { 1965 InVals, isThisReturn, 3064 SmallVectorImpl<SDValue> &InVals) 3206 InVals.push_back(ArgValue); 3234 InVals.push_back(DAG.getFrameIndex(FrameIndex, PtrVT)); 3243 InVals.push_back(DAG.getLoad( 1423 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument
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