Searched defs:NewReg (Results 1 - 19 of 19) sorted by relevance

/external/llvm/lib/CodeGen/
H A DAntiDepBreaker.h57 /// other machine instruction to use NewReg.
58 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) { argument
61 MI->getOperand(0).setReg(NewReg);
H A DCriticalAntiDepBreaker.cpp319 // be replaced by NewReg. Return true if any of their parent instructions may
324 // the two-address instruction also defines NewReg, as may happen with
328 // both NewReg and AntiDepReg covers it.
332 unsigned NewReg)
338 // operands, in case they may be assigned to NewReg. In this case antidep
343 // Handle cases in which this instruction defines NewReg.
348 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg))
352 CheckOper.getReg() != NewReg)
355 // Don't allow the instruction to define NewReg and AntiDepReg.
361 // NewReg
330 isNewRegClobberedByRefs(RegRefIter RegRefBegin, RegRefIter RegRefEnd, unsigned NewReg) argument
384 unsigned NewReg = Order[i]; local
[all...]
H A DMachineCSE.cpp541 unsigned NewReg = CSMI->getOperand(i).getReg(); local
550 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
553 if (OldReg == NewReg) {
559 TargetRegisterInfo::isVirtualRegister(NewReg) &&
562 if (!isProfitableToCSE(NewReg, OldReg, CSMI, MI)) {
571 if (!MRI->constrainRegClass(NewReg, OldRC)) {
577 CSEPairs.push_back(std::make_pair(OldReg, NewReg));
585 unsigned NewReg = CSEPairs[i].second; local
587 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg);
589 Def->clearRegisterDeads(NewReg);
[all...]
H A DTailDuplication.cpp89 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
379 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg, argument
383 LI->second.push_back(std::make_pair(BB, NewReg));
386 Vals.push_back(std::make_pair(BB, NewReg));
441 unsigned NewReg = MRI->createVirtualRegister(RC); local
442 MO.setReg(NewReg);
443 LocalVRMap.insert(std::make_pair(Reg, NewReg));
445 AddSSAUpdateEntry(Reg, NewReg, PredBB);
H A DPeepholeOptimizer.cpp801 /// \brief Rewrite the current source with \p NewReg and \p NewSubReg
804 virtual bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) { argument
808 MOSrc.setReg(NewReg);
1005 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1010 MO.setReg(NewReg);
1054 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1059 CopyLike.getOperand(CurrentSrcIdx).setReg(NewReg); variable
1133 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1140 MO.setReg(NewReg);
H A DTwoAddressInstructionPass.cpp738 unsigned NewReg = 0; local
741 NewReg, IsDstPhys)) {
751 VirtRegPairs.push_back(NewReg);
754 bool isNew = SrcRegMap.insert(std::make_pair(NewReg, Reg)).second;
756 assert(SrcRegMap[NewReg] == Reg && "Can't map to two src registers!");
757 VirtRegPairs.push_back(NewReg);
758 Reg = NewReg;
H A DRegisterCoalescer.cpp681 unsigned NewReg = NewDstMO.getReg(); local
682 if (NewReg != IntB.reg || !IntB.Query(AValNo->def).isKill())
746 UseMO.setReg(NewReg);
756 if (TargetRegisterInfo::isPhysicalRegister(NewReg))
757 UseMO.substPhysReg(NewReg, *TRI);
759 UseMO.setReg(NewReg);
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp76 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); local
77 MO.setReg(NewReg);
79 MFI.stackifyVReg(NewReg);
80 MFI.addWAReg(NewReg, WebAssemblyFunctionInfo::UnusedReg);
/external/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp110 unsigned NewReg; local
116 NewReg = AArch64::WZR;
119 NewReg = AArch64::XZR;
123 MO.setReg(NewReg);
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp282 MCOperand NewReg; local
287 NewReg = MCOperand::createReg(MRI.getMatchingSuperReg(
289 NewMI.addOperand(NewReg);
/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp658 unsigned NewReg = optimizeSDPattern(MI); local
660 if (NewReg != 0) {
666 // reference into a plain DPR, and that will end poorly. NewReg is
669 MRI->constrainRegClass(NewReg, MRI->getRegClass((*I)->getReg()));
673 << PrintReg(NewReg) << "\n");
674 (*I)->substVirtReg(NewReg, 0, *TRI);
677 Replacements[MI] = NewReg;
H A DARMBaseRegisterInfo.cpp279 ARMBaseRegisterInfo::updateRegAllocHint(unsigned Reg, unsigned NewReg, argument
294 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg);
295 if (TargetRegisterInfo::isVirtualRegister(NewReg))
296 MRI->setRegAllocationHint(NewReg,
H A DARMBaseInstrInfo.cpp2738 unsigned NewReg = MRI->createVirtualRegister(MRI->getRegClass(Reg)); local
2741 get(NewUseOpc), NewReg)
2745 UseMI->getOperand(1).setReg(NewReg);
/external/v8/test/unittests/compiler/
H A Dinstruction-sequence-unittest.h185 VReg NewReg() { return VReg(sequence()->NextVirtualRegister()); } function in class:v8::internal::compiler::InstructionSequenceTest
/external/clang/lib/StaticAnalyzer/Core/
H A DExprEngineCXX.cpp491 const MemRegion *NewReg = symVal.castAs<loc::MemRegionVal>().getRegion(); local
494 getStoreManager().GetElementZeroRegion(NewReg, ObjTy);
/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1578 unsigned NewReg = ScratchFPReg; local
1579 duplicateToTop(FirstFPRegOp, NewReg, MI);
1580 FirstFPRegOp = NewReg;
/external/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp586 Record *NewReg = new Record(Name, Def->getLoc(), Def->getRecords()); variable
587 Elts.insert(NewReg);
593 NewReg->addSuperClass(Supers[i], Ranges[i]);
600 if (NewReg->getValue(RV.getNameInit()))
624 NewReg->addValue(*Def->getValue(Field));
633 NewReg->addValue(*DefRV);
638 NewReg->addValue(RV);
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp1445 unsigned NewReg = MRI.createVirtualRegister(TRC); local
1446 return NewReg;
/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp5912 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0, local
5915 ARMOperand::CreateReg(NewReg, Op1.getStartLoc(), Op2.getEndLoc());

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