/external/llvm/include/llvm/IR/ |
H A D | User.h | 68 User(Type *ty, unsigned vty, Use *, unsigned NumOps) argument 70 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); 71 NumUserOperands = NumOps; 168 void setGlobalVariableNumOperands(unsigned NumOps) { 169 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); 170 NumUserOperands = NumOps; 176 void setNumHungOffUseOperands(unsigned NumOps) { 178 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); 179 NumUserOperands = NumOps;
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H A D | Constant.h | 47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) argument 48 : User(ty, vty, Ops, NumOps) {}
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H A D | GlobalObject.h | 30 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, argument 33 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name, AddressSpace),
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H A D | GlobalValue.h | 68 GlobalValue(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, argument 70 : Constant(PointerType::get(Ty, AddressSpace), VTy, Ops, NumOps),
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H A D | InlineAsm.h | 268 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { argument 269 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); 271 return Kind | (NumOps << 3);
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H A D | Constants.h | 885 ConstantExpr(Type *ty, unsigned Opcode, Use *Ops, unsigned NumOps) argument 886 : Constant(ty, ConstantExprVal, Ops, NumOps) {
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/external/llvm/lib/IR/ |
H A D | Instructions.cpp | 133 unsigned NumOps = e + e / 2; local 134 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common. 136 ReservedSpace = NumOps; 3654 unsigned NumOps = getNumOperands(); 3658 if (2 + (idx + 1) * 2 != NumOps) { 3659 OL[2 + idx * 2] = OL[NumOps - 2]; 3660 OL[2 + idx * 2 + 1] = OL[NumOps - 1]; 3664 OL[NumOps-2].set(nullptr); 3665 OL[NumOps [all...] |
H A D | Instruction.cpp | 23 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 25 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { 35 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 37 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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H A D | Metadata.cpp | 392 void *MDNode::operator new(size_t Size, unsigned NumOps) { argument 393 size_t OpSize = NumOps * sizeof(MDOperand); 399 for (MDOperand *E = O - NumOps; O != E; --O)
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/external/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 123 unsigned NumOps = Outs.size(); local 124 for (unsigned i = 0; i != NumOps; ++i) { 141 unsigned NumOps = ArgVTs.size(); local 142 for (unsigned i = 0; i != NumOps; ++i) {
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H A D | MachineRegisterInfo.cpp | 136 unsigned NumOps = MI->getNumOperands(); local 137 if (!(MO >= MO0 && MO < MO0+NumOps)) { 231 /// Move NumOps operands from Src to Dst, updating use-def lists as needed. 240 unsigned NumOps) { 241 assert(Src != Dst && NumOps && "Noop moveOperands"); 245 if (Dst >= Src && Dst < Src + NumOps) { 247 Dst += NumOps - 1; 248 Src += NumOps - 1; 277 } while (--NumOps); 238 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGSDNodes.cpp | 204 unsigned NumOps = Node->getNumOperands(); local 205 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other) 206 Chain = Node->getOperand(NumOps-1).getNode();
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H A D | LegalizeTypes.cpp | 433 for (unsigned i = 0, NumOps = Node.getNumOperands(); i < NumOps; ++i) 1062 unsigned NumOps = N->getNumOperands(); local 1064 if (NumOps == 0) { 1067 } else if (NumOps == 1) { 1071 } else if (NumOps == 2) { 1076 SmallVector<SDValue, 8> Ops(NumOps); 1077 for (unsigned i = 0; i < NumOps; ++i)
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H A D | ScheduleDAGFast.cpp | 493 unsigned NumOps = Node->getNumOperands(); local 494 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) 495 --NumOps; // Ignore the glue operand. 497 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { 681 unsigned NumOps = N->getNumOperands(); local 682 if (unsigned NumLeft = NumOps) { 688 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
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H A D | ScheduleDAGRRList.cpp | 1288 unsigned NumOps = Node->getNumOperands(); local 1289 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) 1290 --NumOps; // Ignore the glue operand. 1292 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { 2703 unsigned NumOps = MCID.getNumOperands() - NumRes; 2704 for (unsigned i = 0; i != NumOps; ++i) { 2930 unsigned NumOps = MCID.getNumOperands() - NumRes; 2931 for (unsigned j = 0; j != NumOps; ++j) {
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 162 unsigned NumOps = N->getNumOperands(); local 173 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1) 178 for(unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; ++i) { 223 assert((i+2 < NumOps) && "Invalid number of operands in inline asm");
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86BaseInfo.h | 632 unsigned NumOps = Desc.getNumOperands(); local 634 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) 636 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 641 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 642 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) 646 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
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H A D | X86MCCodeEmitter.cpp | 711 unsigned NumOps = Desc.getNumOperands(); local 861 unsigned RcOperand = NumOps-1; 998 unsigned NumOps = MI.getNumOperands(); local 1000 bool isTwoAddr = NumOps > 1 && 1005 for (; i != NumOps; ++i) { 1024 for (; i != NumOps; ++i) { 1036 for (; i != NumOps; ++i) { 1054 if (NumOps > e && MI.getOperand(e).isReg() && 1073 for (unsigned e = NumOps; i != e; ++i) { 1173 unsigned NumOps local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86CallFrameOptimization.cpp | 489 unsigned NumOps = DefMov->getDesc().getNumOperands(); local 490 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i)
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H A D | X86FloatingPoint.cpp | 964 unsigned NumOps = MI->getDesc().getNumOperands(); local 965 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && 969 unsigned Reg = getFPReg(MI->getOperand(NumOps-1)); 998 MI->RemoveOperand(NumOps-1); // Remove explicit ST(0) operand 1026 unsigned NumOps = MI->getDesc().getNumOperands(); local 1027 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); 1367 unsigned NumOps = 0; local 1372 i != e && MI->getOperand(i).isImm(); i += 1 + NumOps) { 1375 NumOps [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenPredicate.cpp | 355 unsigned NumOps = MI->getNumOperands(); local 356 for (unsigned i = 0; i < NumOps; ++i) { 392 NumOps = 2; 408 for (unsigned i = 1; i < NumOps; ++i) {
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/external/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.cpp | 72 unsigned NumOps = 1; local 94 NumOps = NumArgs; 120 NumOps, MIOpInfo); 121 MIOperandNo += NumOps;
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H A D | DAGISelMatcherEmitter.cpp | 678 unsigned NumOps = P.getNumOperands(); local 681 ++NumOps; // Get the chained node too. 684 OS << " Result.resize(NextRes+" << NumOps << ");\n"; local 699 for (unsigned i = 0; i != NumOps; ++i)
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2SizeReduction.cpp | 719 unsigned NumOps = MCID.getNumOperands(); local 720 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); 721 if (HasCC && MI->getOperand(NumOps-1).isDead()) 745 unsigned NumOps = MCID.getNumOperands(); local 747 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 814 unsigned NumOps = MCID.getNumOperands(); local 815 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); 816 if (HasCC && MI->getOperand(NumOps-1).isDead()) 840 unsigned NumOps = MCID.getNumOperands(); local 842 if (i < NumOps [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 663 unsigned NumOps = OldMI->getNumOperands(); local 664 for (unsigned I = 1; I < NumOps; ++I) { 683 unsigned NumOps = MI->getNumOperands(); local 717 for (unsigned I = 2; I < NumOps; ++I) 869 unsigned NumOps = MI->getNumExplicitOperands(); local 870 if (OpNum == NumOps - 1) {
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