| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelDAGToDAG.cpp | 60 std::vector<SDValue> &OutOps) override;
108 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
114 OutOps.push_back(Op);
107 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 108 std::vector<SDValue> &OutOps) override;
285 std::vector<SDValue> &OutOps) {
295 OutOps.push_back(Op0);
296 OutOps.push_back(Op1);
284 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 236 std::vector<SDValue> &OutOps) {
245 OutOps.push_back(Op);
235 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| H A D | MipsSEISelDAGToDAG.cpp | 953 std::vector<SDValue> &OutOps) {
961 OutOps.push_back(Op);
962 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32));
966 OutOps.push_back(Base);
967 OutOps.push_back(Offset);
970 OutOps.push_back(Op);
971 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32));
980 OutOps.push_back(Base);
981 OutOps.push_back(Offset);
984 OutOps
952 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 55 std::vector<SDValue> &OutOps) override;
389 std::vector<SDValue> &OutOps) {
400 OutOps.push_back(Op0);
401 OutOps.push_back(Op1);
387 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelDAGToDAG.cpp | 69 std::vector<SDValue> &OutOps) override;
113 std::vector<SDValue> &OutOps) {
128 OutOps.push_back(Reg);
129 OutOps.push_back(Op.getOperand(0));
112 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGISel.h | 86 /// OutOps vector.
89 std::vector<SDValue> &OutOps) {
87 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 5105 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
5112 OutOps.push_back(Op0);
5113 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32));
5117 OutOps.push_back(Op0);
5118 OutOps.push_back(Op1);
5104 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 348 std::vector<SDValue> &OutOps) override;
1287 std::vector<SDValue> &OutOps) {
1303 OutOps.push_back(Base);
1304 OutOps.push_back(Disp);
1305 OutOps.push_back(Index);
1285 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 92 std::vector<SDValue> &OutOps) override;
1352 std::vector<SDValue> &OutOps) {
1363 OutOps.push_back(Res);
1365 OutOps.push_back(Inp);
1369 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32));
1351 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 66 std::vector<SDValue> &OutOps) override;
230 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
240 OutOps.push_back(Op);
229 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 258 std::vector<SDValue> &OutOps) override;
3921 std::vector<SDValue> &OutOps) {
3942 OutOps.push_back(Op);
3920 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 241 std::vector<SDValue> &OutOps) override;
2987 std::vector<SDValue> &OutOps) {
3005 OutOps.push_back(Op0);
3006 OutOps.push_back(Op1);
3007 OutOps.push_back(Op2);
3008 OutOps.push_back(Op3);
3009 OutOps.push_back(Op4);
2986 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6664 SDValue OutOps[] = { OutLo, OutHi }; local
6665 return DAG.getMergeValues(OutOps, dl);
6693 SDValue OutOps[] = { OutLo, OutHi }; local
6694 return DAG.getMergeValues(OutOps, dl);
6722 SDValue OutOps[] = { OutLo, OutHi }; local
6723 return DAG.getMergeValues(OutOps, dl);
|