Searched refs:BaseIdx (Results 1 - 6 of 6) sorted by relevance
| /external/llvm/utils/TableGen/ |
| H A D | PseudoLoweringEmitter.cpp | 58 unsigned BaseIdx);
75 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) {
83 OperandMap[BaseIdx + i].Kind = OpData::Reg;
84 OperandMap[BaseIdx + i].Data.Reg = DI->getDef();
91 // FIXME: We probably shouldn't ever get a non-zero BaseIdx here.
92 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!");
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
102 OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
105 OperandMap[BaseIdx
74 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, IndexedMap<OpData> &OperandMap, unsigned BaseIdx) argument
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| /external/clang/lib/StaticAnalyzer/Core/ |
| H A D | Store.cpp | 459 SVal BaseIdx = ElemR->getIndex(); local
461 if (!BaseIdx.getAs<nonloc::ConcreteInt>())
465 BaseIdx.castAs<nonloc::ConcreteInt>().getValue();
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| /external/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 39 unsigned BaseIdx = AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG - 4 - 4; local
40 unsigned BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx));
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| /external/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 1343 Value *BaseIdx = local
1349 GCRelocateDecl, {StatepointToken, BaseIdx, LiveIdx},
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3139 SDValue BaseIdx = N->getOperand(1); local
3146 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(),
3147 BaseIdx, DAG.getConstant(i, dl, BaseIdx.getValueType()));
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5877 /// in range [BaseIdx, LastIdx).
5880 unsigned BaseIdx, unsigned LastIdx,
5884 assert(BaseIdx * 2 <= LastIdx && "Invalid Indices in input!");
5890 unsigned ExpectedVExtractIdx = BaseIdx;
5891 unsigned NumElts = LastIdx - BaseIdx;
5897 SDValue Op = N->getOperand(i + BaseIdx);
5903 ExpectedVExtractIdx = BaseIdx;
5942 ExpectedVExtractIdx = BaseIdx;
5878 isHorizontalBinOp(const BuildVectorSDNode *N, unsigned Opcode, SelectionDAG &DAG, unsigned BaseIdx, unsigned LastIdx, SDValue &V0, SDValue &V1) argument
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