| /external/llvm/lib/Target/X86/ |
| H A D | X86MachineFunctionInfo.cpp | 23 for (const MCPhysReg *CSR =
25 unsigned Reg = *CSR;
26 ++CSR)
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenExtract.cpp | 87 ConstantInt *CSL = 0, *CSR = 0, *CM = 0; local
94 bool Match = match(In, m_And(m_Shl(m_LShr(m_Value(BF), m_ConstantInt(CSR)),
101 Match = match(In, m_And(m_Shl(m_AShr(m_Value(BF), m_ConstantInt(CSR)),
108 CSR = ConstantInt::get(Type::getInt32Ty(Ctx), 0);
118 Match = match(In, m_And(m_LShr(m_Value(BF), m_ConstantInt(CSR)),
125 Match = match(In, m_And(m_AShr(m_Value(BF), m_ConstantInt(CSR)),
132 Match = match(In, m_Shl(m_LShr(m_Value(BF), m_ConstantInt(CSR)),
139 Match = match(In, m_Shl(m_AShr(m_Value(BF), m_ConstantInt(CSR)),
152 uint32_t SR = CSR->getZExtValue();
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| H A D | HexagonFrameLowering.cpp | 94 // stack frame | (aligned) | | (CSR, spills, etc.) |FP|
232 bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR) { argument
261 if (CSR[R])
331 BitVector CSR(Hexagon::NUM_TARGET_REGS);
333 CSR[*P] = true;
336 if (needsStackFrame(I, CSR))
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| H A D | HexagonVLIWPacketizer.cpp | 316 for (auto *CSR = TRI->getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
317 if (MI->modifiesRegister(*CSR, TRI))
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| /external/llvm/lib/CodeGen/ |
| H A D | LivePhysRegs.cpp | 143 for (const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
144 LiveRegs.addReg(*CSR);
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| H A D | RegisterClassInfo.cpp | 51 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF); local
52 if (Update || CSR != CalleeSaved) {
53 // Build a CSRNum map. Every CSR alias gets an entry pointing to the last
54 // overlapping CSR.
57 for (unsigned N = 0; unsigned Reg = CSR[N]; ++N)
59 CSRNum[*AI] = N + 1; // 0 means no CSR, 1 means CalleeSaved[0], ...
62 CalleeSaved = CSR;
77 /// registers filtered out. Volatile registers come first followed by CSR
78 /// aliases ordered according to the CSR order specified by the target.
107 // PhysReg aliases a CSR, sav
[all...] |
| H A D | MachineFunction.cpp | 619 for (const MCPhysReg *CSR = TRI->getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
620 BV.set(*CSR);
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| H A D | RegAllocPBQP.cpp | 547 const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); local
548 for (unsigned i = 0; CSR[i] != 0; ++i)
549 if (TRI.regsOverlap(reg, CSR[i]))
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| H A D | RegAllocGreedy.cpp | 845 unsigned CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg); local
846 if (CSR == 0)
896 // Don't start using a CSR when the CostPerUseLimit is low.
898 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " would clobber CSR "
2232 /// Using a CSR for the first time has a cost because it causes push|pop
2234 /// range can have lower cost than using the CSR for the first time;
2236 /// the CSR for the first time. Returns the physical register if we decide
2237 /// to use the CSR; otherwise return 0.
2244 // We choose spill over using the CSR for the first time if the spill cost
2256 // We choose pre-splitting over using the CSR fo
[all...] |
| /external/llvm/include/llvm/ADT/ |
| H A D | Triple.h | 129 CSR, enumerator in enum:llvm::Triple::VendorType
|
| /external/llvm/lib/Support/ |
| H A D | Triple.cpp | 149 case CSR: return "csr";
409 .Case("csr", Triple::CSR)
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| /external/clang/lib/Sema/ |
| H A D | SemaChecking.cpp | 4421 const CharSourceRange &CSR = getSpecifierRange(StartSpecifier, local
4436 << IsEnum << CSR << E->getSourceRange(),
4437 E->getLocStart(), /*IsStringLocation*/ false, CSR);
4448 << CSR
4450 E->getLocStart(), /*IsStringLocation*/false, CSR);
4462 << CSR
4464 E->getLocStart(), /*IsStringLocation*/false, CSR);
|
| /external/harfbuzz_ng/src/ |
| H A D | hb-ot-shape-complex-indic-table.cc | 357 /* 17C8 */ _(M,R), _(RS,T), _(RS,T), _(SM,T),_(CSR,T), _(CK,T), _(SM,T), _(SM,T),
438 /* 1B00 */ _(Bi,T), _(Bi,T), _(Bi,T),_(CSR,T), _(Vs,R), _(VI,x), _(VI,x), _(VI,x),
457 /* 1B80 */ _(Bi,T),_(CSR,T), _(Vs,R), _(VI,x), _(VI,x), _(VI,x), _(VI,x), _(VI,x),
590 /* A980 */ _(Bi,T), _(Bi,T),_(CSR,T), _(Vs,R), _(VI,x), _(VI,x), _(VI,x), _(VI,x),
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