Searched refs:EndIdx (Results 1 - 9 of 9) sorted by relevance
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 866 unsigned StartIdx, EndIdx; member in struct:__anon12286::BitPermutationSelector::BitGroup
879 : V(V), RLAmt(R), StartIdx(S), EndIdx(E), Repl32(false), Repl32CR(false),
1085 BitGroups[BitGroups.size()-1].EndIdx == Bits.size()-1 &&
1089 BitGroups[BitGroups.size()-1].EndIdx = BitGroups[0].EndIdx;
1140 if (BG.StartIdx <= BG.EndIdx) {
1141 for (unsigned i = BG.StartIdx; i <= BG.EndIdx; ++i) {
1154 for (unsigned i = 0; i <= BG.EndIdx; ++i) {
1166 if (BG.StartIdx < 32 && BG.EndIdx < 32) {
1177 " [" << BG.StartIdx << ", " << BG.EndIdx << "]\
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 292 int EndIdx = NotSet;
302 EndIdx = Idx;
306 if (StartIdx == NotSet || EndIdx == NotSet)
317 if (StartIdx > EndIdx) {
318 std::swap(StartIdx, EndIdx);
333 if ((Idx < StartIdx || EndIdx < Idx) && Chunk != Outside) {
344 } else if (Idx > StartIdx && Idx < EndIdx && Chunk != Inside) {
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| H A D | AArch64InstrInfo.cpp | 715 for (unsigned OpIdx = 0, EndIdx = Instr->getNumOperands(); OpIdx < EndIdx;
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1554 for (unsigned SubIdx = 0, EndIdx = RegUnitSets.size();
1555 SubIdx != EndIdx; ++SubIdx) {
1558 for (; SuperIdx != EndIdx; ++SuperIdx) {
1579 if (SuperIdx == EndIdx)
1648 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) {
1656 SearchIdx != EndIdx; ++SearchIdx) { local
1829 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx)
1834 for (unsigned Idx = 0, EndIdx
[all...] |
| H A D | SubtargetEmitter.cpp | 975 for (unsigned UseIdx = 0, EndIdx = Reads.size();
976 UseIdx != EndIdx; ++UseIdx) {
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| /external/llvm/lib/CodeGen/ |
| H A D | PostRASchedulerList.cpp | 152 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; } argument
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| H A D | LiveInterval.cpp | 790 SlotIndex EndIdx = Indexes.getMBBEndIdx(MBB);
793 LiveRange::iterator I = LR.find(EndIdx.getPrevSlot());
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| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 821 unsigned EndIdx = Mask.back(); local
822 if (BegIdx > EndIdx || EndIdx >= LHSElems || EndIdx - BegIdx != MaskElems - 1)
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8144 int EndIdx =
8146 if (BroadcastIdx >= BeginIdx && BroadcastIdx < EndIdx) {
[all...] |
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