1// Copyright 2015 Google Inc. All Rights Reserved. 2// 3// Licensed under the Apache License, Version 2.0 (the "License"); 4// you may not use this file except in compliance with the License. 5// You may obtain a copy of the License at 6// 7// http://www.apache.org/licenses/LICENSE-2.0 8// 9// Unless required by applicable law or agreed to in writing, software 10// distributed under the License is distributed on an "AS IS" BASIS, 11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12// See the License for the specific language governing permissions and 13// limitations under the License. 14 15// kernel_neon.h: a collection of NEON optimized kernels. 16// Check in kernel_default.h which one(s) are actually used by default. 17// Others are mere experiments; they are still covered by tests 18// in case they might be useful some day. 19 20#ifndef GEMMLOWP_INTERNAL_KERNEL_NEON_H_ 21#define GEMMLOWP_INTERNAL_KERNEL_NEON_H_ 22 23#include "kernel.h" 24 25#include <arm_neon.h> 26#include <cassert> 27 28namespace gemmlowp { 29 30// The kernels here are specifically arm 32bit assembly, not arm 64bit. 31#ifdef GEMMLOWP_NEON_32 32 33// Our main GEMM kernel. 34struct NEON_32_Kernel12x4Depth2 : KernelBase { 35 typedef KernelFormat<KernelSideFormat<CellFormat<4, 2>, 3>, 36 KernelSideFormat<CellFormat<4, 2>, 1> > 37 Format; 38 39 const char* Name() const override { return "NEON, 12x4, depth 2"; } 40 41 // TODO(benoitjacob): reorder function arguments so dst comes last 42 void Run(std::int32_t* dst_ptr, std::size_t dst_row_stride, 43 std::size_t dst_col_stride, const std::uint8_t* lhs_ptr, 44 const std::uint8_t* rhs_ptr, std::size_t start_depth, 45 std::size_t run_depth) const override { 46 ScopedProfilingLabel label("optimized kernel (NEON 12x4)"); 47 48// For iOS assembler, the %= style of local labels cause compilation errors, 49// so use numerical ones instead. See 50// http://stackoverflow.com/questions/3898435/labels-in-gcc-inline-assembly 51// If you add any labels, remember to undef them at the end. 52#define GEMMLOWP_LOOP_NEON_KERNEL_12X4_DEPTH2 "1" 53#define GEMMLOWP_STORE_RESULT_NEON_KERNEL_12X4_DEPTH2 "2" 54 55 assert(dst_row_stride == 1); 56 asm volatile( 57 // Clear accumulator registers (see layout below) 58 "vmov.s32 q4, #0\n" 59 "vmov.s32 q8, q4\n" 60 "vmov.s32 q12, q4\n" 61 "vmov.s32 q5, q4\n" 62 "vmov.s32 q9, q4\n" 63 "vmov.s32 q13, q4\n" 64 "vmov.s32 q6, q4\n" 65 "vmov.s32 q10, q4\n" 66 "vmov.s32 q14, q4\n" 67 "vmov.s32 q7, q4\n" 68 "vmov.s32 q11, q4\n" 69 "vmov.s32 q15, q4\n" 70 71 /* Main loop */ 72 73 GEMMLOWP_LOOP_NEON_KERNEL_12X4_DEPTH2 74 ":\n" 75 76 // Overview of register layout: 77 // 78 // A 2x4 cell of Rhs is stored in 16bit in d0--d1 (q0). 79 // A 12x2 block of 3 4x2 cells Lhs is stored in 16bit in d2--d7 80 // (q1--q3). 81 // A 12x4 block of accumulators is stored in 32bit in q4--q15. 82 // 83 // +-----+-----+-----+-----+ 84 // |d0[0]|d0[1]|d0[2]|d0[3]| 85 // Rhs +-----+-----+-----+-----+ 86 // |d1[0]|d1[1]|d1[2]|d1[3]| 87 // +-----+-----+-----+-----+ 88 // 89 // | | | | | 90 // 91 // Lhs | | | | | 92 // 93 // +--+--+ - - - - +-----+-----+-----+-----+ 94 // |d2|d3| | q4 | q5 | q6 | q7 | 95 // |d2|d3| | q4 | q5 | q6 | q7 | 96 // |d2|d3| | q4 | q5 | q6 | q7 | 97 // |d2|d3| | q4 | q5 | q6 | q7 | 98 // +--+--+ - - - - +-----+-----+-----+-----+ 99 // |d4|d5| | q8 | q9 | q10 | q11 | 100 // |d4|d5| | q8 | q9 | q10 | q11 | 101 // |d4|d5| | q8 | q9 | q10 | q11 | 102 // |d4|d5| | q8 | q9 | q10 | q11 | 103 // +--+--+ - - - - +-----+-----+-----+-----+ 104 // |d6|d7| | q12 | q13 | q14 | q15 | 105 // |d6|d7| | q12 | q13 | q14 | q15 | 106 // |d6|d7| | q12 | q13 | q14 | q15 | 107 // |d6|d7| | q12 | q13 | q14 | q15 | 108 // +--+--+ - - - - +-----+-----+-----+-----+ 109 // 110 // Accumulator 111 112 // Load 1 Rhs cell of size 2x4 113 "vld1.8 {d0}, [%[rhs_ptr]:64]!\n" 114 115 // Load 3 Lhs cells of size 4x2 each 116 "vld1.8 {d2}, [%[lhs_ptr]:64]!\n" 117 "vld1.8 {d4}, [%[lhs_ptr]:64]!\n" 118 "vld1.8 {d6}, [%[lhs_ptr]:64]!\n" 119 120 // Expand Lhs/Rhs cells to 16 bit. 121 "vmovl.u8 q0, d0\n" 122 "vmovl.u8 q1, d2\n" 123 "vmovl.u8 q2, d4\n" 124 "vmovl.u8 q3, d6\n" 125 126 // Multiply-accumulate, level of depth 0 127 "vmlal.u16 q4, d2, d0[0]\n" 128 "vmlal.u16 q5, d2, d0[1]\n" 129 "vmlal.u16 q6, d2, d0[2]\n" 130 "vmlal.u16 q7, d2, d0[3]\n" 131 "vmlal.u16 q8, d4, d0[0]\n" 132 "vmlal.u16 q9, d4, d0[1]\n" 133 "vmlal.u16 q10, d4, d0[2]\n" 134 "vmlal.u16 q11, d4, d0[3]\n" 135 "vmlal.u16 q12, d6, d0[0]\n" 136 "vmlal.u16 q13, d6, d0[1]\n" 137 "vmlal.u16 q14, d6, d0[2]\n" 138 "vmlal.u16 q15, d6, d0[3]\n" 139 140 // Multiply-accumulate, level of depth 1 141 "vmlal.u16 q4, d3, d1[0]\n" 142 "vmlal.u16 q5, d3, d1[1]\n" 143 "vmlal.u16 q6, d3, d1[2]\n" 144 "vmlal.u16 q7, d3, d1[3]\n" 145 "vmlal.u16 q8, d5, d1[0]\n" 146 "vmlal.u16 q9, d5, d1[1]\n" 147 "vmlal.u16 q10, d5, d1[2]\n" 148 "vmlal.u16 q11, d5, d1[3]\n" 149 "vmlal.u16 q12, d7, d1[0]\n" 150 "vmlal.u16 q13, d7, d1[1]\n" 151 "vmlal.u16 q14, d7, d1[2]\n" 152 "vmlal.u16 q15, d7, d1[3]\n" 153 154 // Loop. Decrement loop index (depth) by 2, since we just handled 2 155 // levels of depth (Kernel::kDepth=2). 156 "subs %[run_depth], #2\n" 157 "bne " GEMMLOWP_LOOP_NEON_KERNEL_12X4_DEPTH2 158 "b\n" 159 160 /* end of main loop */ 161 162 /* Accumulate our local accumulator registers into the destination block 163 */ 164 165 // Compute stride between consecutive columns, in bytes 166 "mov r0, #4\n" // multiply by 4 = sizeof(int32) 167 "mul %[dst_col_stride], r0\n" 168 169 // If start_depth == 0, then there is no preexisting accumulator 170 // to accumulate, so we can simply store our result. 171 "cmp %[start_depth], #0\n" 172 "beq " GEMMLOWP_STORE_RESULT_NEON_KERNEL_12X4_DEPTH2 173 "f\n" 174 175 "mov r0, %[dst_ptr]\n" 176 177 // Load a column 178 "mov r1, r0\n" 179 "vld1.32 {d0, d1}, [r1]!\n" 180 "vld1.32 {d2, d3}, [r1]!\n" 181 "vld1.32 {d4, d5}, [r1]!\n" 182 // Accumulate a column 183 "vadd.s32 q4, q4, q0\n" 184 "vadd.s32 q8, q8, q1\n" 185 "vadd.s32 q12, q12, q2\n" 186 187 "add r0, %[dst_col_stride]\n" 188 // Load a column 189 "mov r1, r0\n" 190 "vld1.32 {d0, d1}, [r1]!\n" 191 "vld1.32 {d2, d3}, [r1]!\n" 192 "vld1.32 {d4, d5}, [r1]!\n" 193 // Accumulate a column 194 "vadd.s32 q5, q5, q0\n" 195 "vadd.s32 q9, q9, q1\n" 196 "vadd.s32 q13, q13, q2\n" 197 198 "add r0, %[dst_col_stride]\n" 199 // Load a column 200 "mov r1, r0\n" 201 "vld1.32 {d0, d1}, [r1]!\n" 202 "vld1.32 {d2, d3}, [r1]!\n" 203 "vld1.32 {d4, d5}, [r1]!\n" 204 // Accumulate a column 205 "vadd.s32 q6, q6, q0\n" 206 "vadd.s32 q10, q10, q1\n" 207 "vadd.s32 q14, q14, q2\n" 208 209 "add r0, %[dst_col_stride]\n" 210 // Load a column 211 "mov r1, r0\n" 212 "vld1.32 {d0, d1}, [r1]!\n" 213 "vld1.32 {d2, d3}, [r1]!\n" 214 "vld1.32 {d4, d5}, [r1]!\n" 215 // Accumulate a column 216 "vadd.s32 q7, q7, q0\n" 217 "vadd.s32 q11, q11, q1\n" 218 "vadd.s32 q15, q15, q2\n" 219 220 GEMMLOWP_STORE_RESULT_NEON_KERNEL_12X4_DEPTH2 221 ":\n" 222 223 "mov r0, %[dst_ptr]\n" 224 // Store a column 225 "mov r1, r0\n" 226 "vst1.32 {d8, d9}, [r1]!\n" 227 "vst1.32 {d16, d17}, [r1]!\n" 228 "vst1.32 {d24, d25}, [r1]!\n" 229 // Store a column 230 "add r0, %[dst_col_stride]\n" 231 "mov r1, r0\n" 232 "vst1.32 {d10, d11}, [r1]!\n" 233 "vst1.32 {d18, d19}, [r1]!\n" 234 "vst1.32 {d26, d27}, [r1]!\n" 235 // Store a column 236 "add r0, %[dst_col_stride]\n" 237 "mov r1, r0\n" 238 "vst1.32 {d12, d13}, [r1]!\n" 239 "vst1.32 {d20, d21}, [r1]!\n" 240 "vst1.32 {d28, d29}, [r1]!\n" 241 // Store a column 242 "add r0, %[dst_col_stride]\n" 243 "mov r1, r0\n" 244 "vst1.32 {d14, d15}, [r1]!\n" 245 "vst1.32 {d22, d23}, [r1]!\n" 246 "vst1.32 {d30, d31}, [r1]!\n" 247 : // outputs 248 [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), 249 [dst_ptr] "+r"(dst_ptr), 250 [run_depth] "+r"(run_depth) 251 : // inputs 252 [start_depth] "r"(start_depth), 253 [dst_col_stride] "r"(dst_col_stride) 254 : // clobbers 255 "cc", "memory", "r0", "r1", 256 // note: someone on internet says that quad registers are 257 // unsupported in the clobber list! 258 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10", 259 "d11", "d12", "d13", "d14", "d15", "d16", "d17", "d18", "d19", "d20", 260 "d21", "d22", "d23", "d24", "d25", "d26", "d27", "d28", "d29", "d30", 261 "d31"); 262#undef GEMMLOWP_LOOP_NEON_KERNEL_12X4_DEPTH2 263#undef GEMMLOWP_STORE_RESULT_NEON_KERNEL_12X4_DEPTH2 264 } 265}; 266 267struct NEON_32_Kernel12x4Depth2Assuming12BitProducts : KernelBase { 268 typedef KernelFormat< 269 KernelSideFormat<CellFormat<4, 2, CellOrder::WidthMajor>, 3>, 270 KernelSideFormat<CellFormat<4, 2, CellOrder::WidthMajor>, 1> > 271 Format; 272 273 const char* Name() const override { 274 return "NEON, 12x4, depth 2, assuming 12-bit products"; 275 } 276 277 // TODO(benoitjacob): reorder function arguments so dst comes last 278 void Run(std::int32_t* dst_ptr, std::size_t dst_row_stride, 279 std::size_t dst_col_stride, const std::uint8_t* lhs_ptr, 280 const std::uint8_t* rhs_ptr, std::size_t start_depth, 281 std::size_t run_depth) const override { 282 ScopedProfilingLabel label( 283 "optimized kernel (NEON 12x4, assuming 12-bit products)"); 284 assert(dst_row_stride == 1); 285 286// See comments above for why we need local numerical labels in our asm. 287#define GEMMLOWP_LOOP_NEON_32_KERNEL_12X4_DEPTH2_ASSUMING_12BIT_PRODUCTS "1" 288#define GEMMLOWP_LOAD_GLOBAL_ACCUMULATORS_NEON_32_KERNEL_12X4_DEPTH2_12BIT "2" 289#define GEMMLOWP_LABEL_32 "3" 290#define GEMMLOWP_LABEL_24 "4" 291#define GEMMLOWP_LABEL_16 "5" 292#define GEMMLOWP_LABEL_8 "6" 293#define GEMMLOWP_LABEL_2 "7" 294 295 // This kernel is special in that it uses local 16-bit accumulators. 296 // Because it assumes that each product fits in 12 bits, it can accumulate 297 // 16 products into a local 16-bit accumulator without risking overflow. 298 // At that point, it must accumulate these local 16-bit accumulators back 299 // into global 32-bit accumulators, which have to be stored in memory for 300 // lack of register space. 301 // This 12x4 block of global accumulators is laid out as 3 cells of size 4x4 302 // stored in diagonal-major order like this for the first 4x4 cell: 303 // 304 // 0 4 8 12 305 // 13 1 5 9 306 // 10 14 2 6 307 // 7 11 15 3 308 // 309 // and likewise for the 2nd cell (16--31) and 3rd cell (32--47) 310 std::int32_t global_accumulators[3 * 4 * 4]; 311 asm volatile( 312 // Compute stride between consecutive columns, in bytes 313 "mov r0, #4\n" // multiply by 4 = sizeof(int32) 314 "mul %[dst_col_stride], r0\n" 315 316 "cmp %[start_depth], #0\n" 317 "bne" 318 " " GEMMLOWP_LOAD_GLOBAL_ACCUMULATORS_NEON_32_KERNEL_12X4_DEPTH2_12BIT 319 "f\n" 320 321 // If start_depth==0, we need to clear our global accumulators 322 "mov r0, %[global_accumulators]\n" 323 "vmov.s32 q8, #0\n" 324 "vmov.s32 q9, q8\n" 325 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 326 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 327 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 328 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 329 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 330 "vst1.32 {d16,d17,d18,d19}, [r0]!\n" 331 "b " GEMMLOWP_LOOP_NEON_32_KERNEL_12X4_DEPTH2_ASSUMING_12BIT_PRODUCTS 332 "f\n" 333 334 // If start_depth!=0, we need to load our existing global accumulators 335 GEMMLOWP_LOAD_GLOBAL_ACCUMULATORS_NEON_32_KERNEL_12X4_DEPTH2_12BIT 336 ":\n" 337 // Load global accumulators from destination matrix, column-major 338 "mov r1, %[dst_ptr]\n" 339 "mov r0, %[dst_col_stride]\n" 340 "sub r0, #32\n" 341 "vld1.32 {d0,d1}, [r1]!\n" 342 "vld1.32 {d8,d9}, [r1]!\n" 343 "vld1.32 {d16,d17}, [r1], r0\n" 344 "vld1.32 {d2,d3}, [r1]!\n" 345 "vld1.32 {d10,d11}, [r1]!\n" 346 "vld1.32 {d18,d19}, [r1], r0\n" 347 "vld1.32 {d4,d5}, [r1]!\n" 348 "vld1.32 {d12,d13}, [r1]!\n" 349 "vld1.32 {d20,d21}, [r1], r0\n" 350 "vld1.32 {d6,d7}, [r1]!\n" 351 "vld1.32 {d14,d15}, [r1]!\n" 352 "vld1.32 {d22,d23}, [r1], r0\n" 353 // Now we need to convert the global accumulator registers to 354 // 4x4-block-wise diagonal-major order. What we effectively want to do 355 // is to rotate the rows, however the accumulators are stored in 356 // column-major order in registers. So we achieve this by 357 // transposing, rotating the registers, and transposing again each 358 // 4x4 block. 359 // 360 // Transpose 3 4x4 blocks separately 361 "vtrn.32 q0, q1\n" 362 "vtrn.32 q2, q3\n" 363 "vswp d1, d4\n" 364 "vswp d3, d6\n" 365 "vtrn.32 q4, q5\n" 366 "vtrn.32 q6, q7\n" 367 "vswp d9, d12\n" 368 "vswp d11, d14\n" 369 "vtrn.32 q8, q9\n" 370 "vtrn.32 q10, q11\n" 371 "vswp d17, d20\n" 372 "vswp d19, d22\n" 373 // Rotate the registers 374 "vext.32 q1, q1, q1, #1\n" 375 "vext.32 q2, q2, q2, #2\n" 376 "vext.32 q3, q3, q3, #3\n" 377 "vext.32 q5, q5, q5, #1\n" 378 "vext.32 q6, q6, q6, #2\n" 379 "vext.32 q7, q7, q7, #3\n" 380 "vext.32 q9, q9, q9, #1\n" 381 "vext.32 q10, q10, q10, #2\n" 382 "vext.32 q11, q11, q11, #3\n" 383 // Transpose again and store into our global accumulators 384 // buffer. These two operations are done at once using vst4. 385 "mov r0, %[global_accumulators]\n" 386 "vst4.32 {d0,d2,d4,d6}, [r0]!\n" 387 "vst4.32 {d1,d3,d5,d7}, [r0]!\n" 388 "vst4.32 {d8,d10,d12,d14}, [r0]!\n" 389 "vst4.32 {d9,d11,d13,d15}, [r0]!\n" 390 "vst4.32 {d16,d18,d20,d22}, [r0]!\n" 391 "vst4.32 {d17,d19,d21,d23}, [r0]!\n" 392 393 /* Main loop */ 394 395 GEMMLOWP_LOOP_NEON_32_KERNEL_12X4_DEPTH2_ASSUMING_12BIT_PRODUCTS 396 ":\n" 397 398// Overview of register layout: 399// 400// Registers q4--q16 are the local 16-bit accumulators. 401// However, each entry in the result matrix is represented 402// by *two* local 16-bit accumulators: one for even levels 403// of depth and one for odd levels of depth. These correspond 404// to the scalars at even and odd indices within each q-register. 405// Thus we effectively use 32 bits of register space for each 406// entry in the result matrix. The accumulators register layout 407// is the same as was described above for the global 32-bit 408// accumulators (3 cells of size 4x4 in diagonal-major order) 409// with the only difference that instead of 32bit values we have 410// pairs of 16bit values. 411// 412// A 2x4 cell of Rhs is stored in 8bit in d0. 413// A 12x2 block of 3 4x2 cells Lhs is stored in 8bit in d1--d3. 414// 415// +--------+--------+--------+--------+ 416// |d0[0] |d0[2] |d0[4] |d0[6] | 417// Rhs +--------+--------+--------+--------+ 418// |d0[1] |d0[3] |d0[5] |d0[7] | 419// +--------+--------+--------+--------+ 420// 421// | | | | | 422// 423// Lhs | | | | | 424// 425// +-----+-----+ - - - +--------+--------+--------+--------+ 426// |d1[0]|d1[1]| |q4[0,1] |q5[0,1] |q6[0,1] |q7[0,1] | 427// |d1[2]|d1[3]| |q7[2,3] |q4[2,3] |q5[2,3] |q6[2,3] | 428// |d1[4]|d1[5]| |q6[4,5] |q7[4,5] |q4[4,5] |q5[4,5] | 429// |d1[6]|d1[7]| |q5[6,7] |q6[6,7] |q7[6,7] |q4[6,7] | 430// +-----+-----+ - - - +--------+--------+--------+--------+ 431// |d2[0]|d2[1]| |q8[0,1] |q8[0,1] |q8[0,1] |q8[0,1] | 432// |d2[2]|d2[3]| |q9[2,3] |q9[2,3] |q9[2,3] |q9[2,3] | 433// |d2[4]|d2[5]| |q10[4,5]|q10[4,5]|q10[4,5]|q10[4,5]| 434// |d2[6]|d2[7]| |q11[6,7]|q11[6,7]|q11[6,7]|q11[6,7]| 435// +-----+-----+ - - - +--------+--------+--------+--------+ 436// |d3[0]|d3[1]| |q12[0,1]|q12[0,1]|q12[0,1]|q12[0,1]| 437// |d3[2]|d3[3]| |q13[2,3]|q13[2,3]|q13[2,3]|q13[2,3]| 438// |d3[4]|d3[5]| |q14[4,5]|q14[4,5]|q14[4,5]|q14[4,5]| 439// |d3[6]|d3[7]| |q15[6,7]|q15[6,7]|q15[6,7]|q15[6,7]| 440// +-----+-----+ - - - +--------+--------+--------+--------+ 441// 442// Local 16-bit accumulators 443// Note: 2 scalars per matrix entry 444 445#define GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH \ 446 /* Load 3 Lhs cells of size 4x2 */ \ 447 "vld1.8 {d1,d2,d3}, [%[lhs_ptr]:64]!\n" \ 448 \ 449 /* Load 1 Rhs cell of size 2x4 */ \ 450 "vld1.8 {d0}, [%[rhs_ptr]:64]!\n" \ 451 \ 452 /* Multiply-accumulate */ \ 453 "vmlal.u8 q4, d1, d0\n" \ 454 "vmlal.u8 q8, d2, d0\n" \ 455 "vmlal.u8 q12, d3, d0\n" \ 456 "vext.8 d0, d0, d0, #2\n" \ 457 "vmlal.u8 q5, d1, d0\n" \ 458 "vmlal.u8 q9, d2, d0\n" \ 459 "vmlal.u8 q13, d3, d0\n" \ 460 "vext.8 d0, d0, d0, #2\n" \ 461 "vmlal.u8 q6, d1, d0\n" \ 462 "vmlal.u8 q10, d2, d0\n" \ 463 "vmlal.u8 q14, d3, d0\n" \ 464 "vext.8 d0, d0, d0, #2\n" \ 465 "vmlal.u8 q7, d1, d0\n" \ 466 "vmlal.u8 q11, d2, d0\n" \ 467 "vmlal.u8 q15, d3, d0\n" \ 468 \ 469 "sub %[run_depth], #2\n" 470 471#define GEMMLOWP_ACCUMULATE_8_LEVELS_OF_DEPTH \ 472 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH \ 473 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH \ 474 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH \ 475 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH 476 477 // Clear local 16-bit accumulators 478 "vmov.s32 q4, #0\n" 479 "vmov.s32 q5, q4\n" 480 "vmov.s32 q6, q4\n" 481 "vmov.s32 q7, q4\n" 482 "vmov.s32 q8, q4\n" 483 "vmov.s32 q9, q4\n" 484 "vmov.s32 q10, q4\n" 485 "vmov.s32 q11, q4\n" 486 "vmov.s32 q12, q4\n" 487 "vmov.s32 q13, q4\n" 488 "vmov.s32 q14, q4\n" 489 "vmov.s32 q15, q4\n" 490 491 // Select a suitable number of depth levels 492 // to process at this iteration. TODO (benoitjacob) I guess that 493 // someone who really knows asm should make this a jump table. 494 "cmp %[run_depth], #32\n" 495 "bge " GEMMLOWP_LABEL_32 496 "f\n" 497 "cmp %[run_depth], #24\n" 498 "bge " GEMMLOWP_LABEL_24 499 "f\n" 500 "cmp %[run_depth], #16\n" 501 "bge " GEMMLOWP_LABEL_16 502 "f\n" 503 "cmp %[run_depth], #8\n" 504 "bge " GEMMLOWP_LABEL_8 505 "f\n" 506 "b " GEMMLOWP_LABEL_2 "f\n" 507 508 GEMMLOWP_LABEL_32 509 ":\n" GEMMLOWP_ACCUMULATE_8_LEVELS_OF_DEPTH GEMMLOWP_LABEL_24 510 ":\n" GEMMLOWP_ACCUMULATE_8_LEVELS_OF_DEPTH GEMMLOWP_LABEL_16 511 ":\n" GEMMLOWP_ACCUMULATE_8_LEVELS_OF_DEPTH GEMMLOWP_LABEL_8 512 ":\n" GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH 513 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH 514 GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH GEMMLOWP_LABEL_2 515 ":\n" GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH 516 517 // Accumulate the local accumulators into the global accumulators. 518 // This is about summing adjacent pairs of 16-bit scalars into 519 // single 32-bit scalars, so we use pairwise long addition (vpadal). 520 "mov r0, %[global_accumulators]\n" 521 "mov r1, %[global_accumulators]\n" 522 "vld1.32 {d0,d1,d2,d3}, [r0]!\n" 523 "vld1.32 {d4,d5,d6,d7}, [r0]!\n" 524 "vpadal.u16 q0, q4\n" 525 "vpadal.u16 q1, q5\n" 526 "vpadal.u16 q2, q6\n" 527 "vpadal.u16 q3, q7\n" 528 "vst1.32 {d0,d1,d2,d3}, [r1]!\n" 529 "vst1.32 {d4,d5,d6,d7}, [r1]!\n" 530 "vld1.32 {d0,d1,d2,d3}, [r0]!\n" 531 "vld1.32 {d4,d5,d6,d7}, [r0]!\n" 532 "vpadal.u16 q0, q8\n" 533 "vpadal.u16 q1, q9\n" 534 "vpadal.u16 q2, q10\n" 535 "vpadal.u16 q3, q11\n" 536 "vst1.32 {d0,d1,d2,d3}, [r1]!\n" 537 "vst1.32 {d4,d5,d6,d7}, [r1]!\n" 538 "vld1.32 {d0,d1,d2,d3}, [r0]!\n" 539 "vld1.32 {d4,d5,d6,d7}, [r0]!\n" 540 "vpadal.u16 q0, q12\n" 541 "vpadal.u16 q1, q13\n" 542 "vpadal.u16 q2, q14\n" 543 "vpadal.u16 q3, q15\n" 544 "vst1.32 {d0,d1,d2,d3}, [r1]!\n" 545 "vst1.32 {d4,d5,d6,d7}, [r1]!\n" 546 547 // Loop. 548 "cmp %[run_depth], #0\n" 549 "bne " GEMMLOWP_LOOP_NEON_32_KERNEL_12X4_DEPTH2_ASSUMING_12BIT_PRODUCTS 550 "b\n" 551 552#undef GEMMLOWP_CLEAR_LOCAL_ACCUMULATORS 553#undef GEMMLOWP_ACCUMULATE_8_LEVELS_OF_DEPTH 554#undef GEMMLOWP_ACCUMULATE_2_LEVELS_OF_DEPTH 555#undef GEMMLOWP_ADD_TO_GLOBAL_ACCUMULATORS 556 557 /* end of main loop */ 558 559 // Store the global accumulators to the destination matrix 560 // (column-major) 561 // This is the reverse of the steps that we followed at the beginning 562 // when we load the global accumulators from the destination matrix. 563 // The problem is the same: how to convert 4x4 blocks 564 // between column-major and diagonal-major orders. 565 // Like above, we do this by rotating rows, and we achieve that by 566 // tranposing, rotating columns, and transposing again. 567 // 568 // Load and transpose 4x4 blocks of global accumulators 569 // These two steps are done at once by the vld4 instruction. 570 "mov r0, %[global_accumulators]\n" 571 "vld4.32 {d0,d2,d4,d6}, [r0]!\n" 572 "vld4.32 {d1,d3,d5,d7}, [r0]!\n" 573 "vld4.32 {d8,d10,d12,d14}, [r0]!\n" 574 "vld4.32 {d9,d11,d13,d15}, [r0]!\n" 575 "vld4.32 {d16,d18,d20,d22}, [r0]!\n" 576 "vld4.32 {d17,d19,d21,d23}, [r0]!\n" 577 // Rotate the rows of each 4x4 block 578 "vext.32 q1, q1, q1, #3\n" 579 "vext.32 q2, q2, q2, #2\n" 580 "vext.32 q3, q3, q3, #1\n" 581 "vext.32 q5, q5, q5, #3\n" 582 "vext.32 q6, q6, q6, #2\n" 583 "vext.32 q7, q7, q7, #1\n" 584 "vext.32 q9, q9, q9, #3\n" 585 "vext.32 q10, q10, q10, #2\n" 586 "vext.32 q11, q11, q11, #1\n" 587 // Transpose again each 4x4 block 588 "vtrn.32 q0, q1\n" 589 "vtrn.32 q2, q3\n" 590 "vswp d1, d4\n" 591 "vswp d3, d6\n" 592 "vtrn.32 q4, q5\n" 593 "vtrn.32 q6, q7\n" 594 "vswp d9, d12\n" 595 "vswp d11, d14\n" 596 "vtrn.32 q8, q9\n" 597 "vtrn.32 q10, q11\n" 598 "vswp d17, d20\n" 599 "vswp d19, d22\n" 600 // Store into the column-major destination matrix 601 "mov r1, %[dst_ptr]\n" 602 "mov r0, %[dst_col_stride]\n" 603 "sub r0, #32\n" 604 "vst1.32 {d0,d1}, [r1]!\n" 605 "vst1.32 {d8,d9}, [r1]!\n" 606 "vst1.32 {d16,d17}, [r1], r0\n" 607 "vst1.32 {d2,d3}, [r1]!\n" 608 "vst1.32 {d10,d11}, [r1]!\n" 609 "vst1.32 {d18,d19}, [r1], r0\n" 610 "vst1.32 {d4,d5}, [r1]!\n" 611 "vst1.32 {d12,d13}, [r1]!\n" 612 "vst1.32 {d20,d21}, [r1], r0\n" 613 "vst1.32 {d6,d7}, [r1]!\n" 614 "vst1.32 {d14,d15}, [r1]!\n" 615 "vst1.32 {d22,d23}, [r1], r0\n" 616 : // outputs 617 [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), 618 [dst_ptr] "+r"(dst_ptr), 619 [run_depth] "+r"(run_depth) 620 : // inputs 621 [start_depth] "r"(start_depth), [dst_col_stride] "r"(dst_col_stride), 622 [global_accumulators] "r"(&global_accumulators[0]) 623 : // clobbers 624 "cc", "memory", "r0", "r1", 625 // note: someone on internet says that quad registers are 626 // unsupported in the clobber list! 627 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10", 628 "d11", "d12", "d13", "d14", "d15", "d16", "d17", "d18", "d19", "d20", 629 "d21", "d22", "d23", "d24", "d25", "d26", "d27", "d28", "d29", "d30", 630 "d31"); 631#undef GEMMLOWP_LOOP_NEON_32_KERNEL_12X4_DEPTH2_ASSUMING_12BIT_PRODUCTS 632#undef GEMMLOWP_LOAD_GLOBAL_ACCUMULATORS_NEON_32_KERNEL_12X4_DEPTH2_12BIT 633#undef GEMMLOWP_LABEL_32 634#undef GEMMLOWP_LABEL_24 635#undef GEMMLOWP_LABEL_16 636#undef GEMMLOWP_LABEL_8 637#undef GEMMLOWP_LABEL_2 638 } 639}; 640 641#endif // GEMMLOWP_NEON_32 642 643// The kernels here are specifically arm 64bit assembly, not arm 32bit. 644#ifdef GEMMLOWP_NEON_64 645 646// Our main GEMM kernel. 647struct NEON_64_Kernel12x8Depth2 : KernelBase { 648 typedef KernelFormat<KernelSideFormat<CellFormat<4, 2>, 3>, 649 KernelSideFormat<CellFormat<4, 2>, 2> > 650 Format; 651 652 const char* Name() const override { return "NEON, 12x8, depth 2"; } 653 654 // TODO(benoitjacob): reorder function arguments so dst comes last 655 void Run(std::int32_t* dst_ptr, std::size_t dst_row_stride, 656 std::size_t dst_col_stride, const std::uint8_t* lhs_ptr, 657 const std::uint8_t* rhs_ptr, std::size_t start_depth, 658 std::size_t run_depth) const override { 659 ScopedProfilingLabel label("optimized kernel (NEON 12x8)"); 660// See comments above for why we need local numerical labels in our asm. 661#define GEMMLOWP_LOOP_NEON_64_KERNEL_12X8_DEPTH2 "1" 662#define GEMMLOWP_STORE_RESULT_NEON_64_KERNEL_12x8_DEPTH2 "2" 663 664 assert(dst_row_stride == 1); 665 asm volatile( 666 // Clear accumulator registers (see layout below) 667 "dup v8.4s, wzr\n" 668 "dup v9.4s, wzr\n" 669 "dup v10.4s, wzr\n" 670 "dup v11.4s, wzr\n" 671 "dup v12.4s, wzr\n" 672 "dup v13.4s, wzr\n" 673 "dup v14.4s, wzr\n" 674 "dup v15.4s, wzr\n" 675 "dup v16.4s, wzr\n" 676 "dup v17.4s, wzr\n" 677 "dup v18.4s, wzr\n" 678 "dup v19.4s, wzr\n" 679 "dup v20.4s, wzr\n" 680 "dup v21.4s, wzr\n" 681 "dup v22.4s, wzr\n" 682 "dup v23.4s, wzr\n" 683 "dup v24.4s, wzr\n" 684 "dup v25.4s, wzr\n" 685 "dup v26.4s, wzr\n" 686 "dup v27.4s, wzr\n" 687 "dup v28.4s, wzr\n" 688 "dup v29.4s, wzr\n" 689 "dup v30.4s, wzr\n" 690 "dup v31.4s, wzr\n" 691 692 /* Main loop */ 693 694 GEMMLOWP_LOOP_NEON_64_KERNEL_12X8_DEPTH2 695 ":\n" 696 697 // Overview of register layout: 698 // 699 // A 2x8 block of 2 2x4 cells of Rhs is stored in 16bit in v0--v1. 700 // A 12x2 block of 3 4x2 cells Lhs is stored in 16bit in v2--v4. 701 // A 12x8 block of accumulators is stored in 32bit in v8--v31. 702 // 703 // +--------+--------+-----+--------+--------+ 704 // |v0.h[0] |v0.h[1] | ... |v1.h[2] |v1.h[3] | 705 // Rhs +--------+--------+-----+--------+--------+ 706 // |v0.h[4] |v0.h[5] | ... |v1.h[6] |v1.h[7] | 707 // +--------+--------+-----+--------+--------+ 708 // 709 // | | | | | | 710 // 711 // Lhs | | | | | | 712 // 713 // +-------+-------+ - - +--------+--------+-----+--------+--------+ 714 // |v2.h[0]|v2.h[4]| |v8.s[0] |v9.s[0] | ... |v14.s[0]|v15.s[0]| 715 // |v2.h[1]|v2.h[5]| |v8.s[1] |v9.s[1] | ... |v14.s[1]|v15.s[1]| 716 // |v2.h[2]|v2.h[6]| |v8.s[2] |v9.s[2] | ... |v14.s[2]|v15.s[2]| 717 // |v2.h[3]|v2.h[7]| |v8.s[3] |v9.s[3] | ... |v14.s[3]|v15.s[3]| 718 // +-------+-------+ - - +--------+--------+-----+--------+--------+ 719 // |v3.h[0]|v3.h[4]| |v16.s[0]|v17.s[0]| ... |v22.s[0]|v23.s[0]| 720 // |v3.h[1]|v3.h[5]| |v16.s[1]|v17.s[1]| ... |v22.s[1]|v23.s[1]| 721 // |v3.h[2]|v3.h[6]| |v16.s[2]|v17.s[2]| ... |v22.s[2]|v23.s[2]| 722 // |v3.h[3]|v3.h[7]| |v16.s[3]|v17.s[3]| ... |v22.s[3]|v23.s[3]| 723 // +-------+-------+ - - +--------+--------+-----+--------+--------+ 724 // |v4.h[0]|v4.h[4]| |v24.s[0]|v25.s[0]| ... |v30.s[0]|v31.s[0]| 725 // |v4.h[1]|v4.h[5]| |v24.s[1]|v25.s[1]| ... |v30.s[1]|v31.s[1]| 726 // |v4.h[2]|v4.h[6]| |v24.s[2]|v25.s[2]| ... |v30.s[2]|v31.s[2]| 727 // |v4.h[3]|v4.h[7]| |v24.s[3]|v25.s[3]| ... |v30.s[3]|v31.s[3]| 728 // +-------+-------+ - - +--------+--------+-----+--------+--------+ 729 // 730 // Accumulator 731 732 // Load 1 Rhs cell of size 2x8 733 "ld1 {v0.8b}, [%[rhs_ptr]], #8\n" 734 "ld1 {v1.8b}, [%[rhs_ptr]], #8\n" 735 736 // Load 3 Lhs cells of size 4x2 each 737 "ld1 {v2.8b}, [%[lhs_ptr]], #8\n" 738 "ld1 {v3.8b}, [%[lhs_ptr]], #8\n" 739 "ld1 {v4.8b}, [%[lhs_ptr]], #8\n" 740 741 // Expand Lhs/Rhs cells to 16 bit. 742 "uxtl v0.8h, v0.8b\n" 743 "uxtl v1.8h, v1.8b\n" 744 "uxtl v2.8h, v2.8b\n" 745 "uxtl v3.8h, v3.8b\n" 746 "uxtl v4.8h, v4.8b\n" 747 748 // Multiply-accumulate, level of depth 0 749 "umlal v8.4s, v2.4h, v0.h[0]\n" 750 "umlal v9.4s, v2.4h, v0.h[1]\n" 751 "umlal v10.4s, v2.4h, v0.h[2]\n" 752 "umlal v11.4s, v2.4h, v0.h[3]\n" 753 "umlal v12.4s, v2.4h, v1.h[0]\n" 754 "umlal v13.4s, v2.4h, v1.h[1]\n" 755 "umlal v14.4s, v2.4h, v1.h[2]\n" 756 "umlal v15.4s, v2.4h, v1.h[3]\n" 757 "umlal v16.4s, v3.4h, v0.h[0]\n" 758 "umlal v17.4s, v3.4h, v0.h[1]\n" 759 "umlal v18.4s, v3.4h, v0.h[2]\n" 760 "umlal v19.4s, v3.4h, v0.h[3]\n" 761 "umlal v20.4s, v3.4h, v1.h[0]\n" 762 "umlal v21.4s, v3.4h, v1.h[1]\n" 763 "umlal v22.4s, v3.4h, v1.h[2]\n" 764 "umlal v23.4s, v3.4h, v1.h[3]\n" 765 "umlal v24.4s, v4.4h, v0.h[0]\n" 766 "umlal v25.4s, v4.4h, v0.h[1]\n" 767 "umlal v26.4s, v4.4h, v0.h[2]\n" 768 "umlal v27.4s, v4.4h, v0.h[3]\n" 769 "umlal v28.4s, v4.4h, v1.h[0]\n" 770 "umlal v29.4s, v4.4h, v1.h[1]\n" 771 "umlal v30.4s, v4.4h, v1.h[2]\n" 772 "umlal v31.4s, v4.4h, v1.h[3]\n" 773 774 // Multiply-accumulate, level of depth 1 775 "umlal2 v8.4s, v2.8h, v0.h[4]\n" 776 "umlal2 v9.4s, v2.8h, v0.h[5]\n" 777 "umlal2 v10.4s, v2.8h, v0.h[6]\n" 778 "umlal2 v11.4s, v2.8h, v0.h[7]\n" 779 "umlal2 v12.4s, v2.8h, v1.h[4]\n" 780 "umlal2 v13.4s, v2.8h, v1.h[5]\n" 781 "umlal2 v14.4s, v2.8h, v1.h[6]\n" 782 "umlal2 v15.4s, v2.8h, v1.h[7]\n" 783 "umlal2 v16.4s, v3.8h, v0.h[4]\n" 784 "umlal2 v17.4s, v3.8h, v0.h[5]\n" 785 "umlal2 v18.4s, v3.8h, v0.h[6]\n" 786 "umlal2 v19.4s, v3.8h, v0.h[7]\n" 787 "umlal2 v20.4s, v3.8h, v1.h[4]\n" 788 "umlal2 v21.4s, v3.8h, v1.h[5]\n" 789 "umlal2 v22.4s, v3.8h, v1.h[6]\n" 790 "umlal2 v23.4s, v3.8h, v1.h[7]\n" 791 "umlal2 v24.4s, v4.8h, v0.h[4]\n" 792 "umlal2 v25.4s, v4.8h, v0.h[5]\n" 793 "umlal2 v26.4s, v4.8h, v0.h[6]\n" 794 "umlal2 v27.4s, v4.8h, v0.h[7]\n" 795 "umlal2 v28.4s, v4.8h, v1.h[4]\n" 796 "umlal2 v29.4s, v4.8h, v1.h[5]\n" 797 "umlal2 v30.4s, v4.8h, v1.h[6]\n" 798 "umlal2 v31.4s, v4.8h, v1.h[7]\n" 799 800 // Loop. Decrement loop index (depth) by 2, since we just handled 2 801 // levels of depth (Kernel::kDepth=2). 802 "subs %[run_depth], %[run_depth], #2\n" 803 "bne " GEMMLOWP_LOOP_NEON_64_KERNEL_12X8_DEPTH2 804 "b\n" 805 806 /* end of main loop */ 807 808 /* Accumulate our local accumulator registers into the destination block 809 */ 810 811 // Compute stride between consecutive columns, in bytes 812 "mov x0, #4\n" // multiply by 4 = sizeof(int32) 813 "mul %[dst_col_stride], %[dst_col_stride], x0\n" 814 815 // If start_depth == 0, then there is no preexisting accumulator 816 // to accumulate, so we can simply store our result. 817 "cmp %[start_depth], #0\n" 818 "beq " GEMMLOWP_STORE_RESULT_NEON_64_KERNEL_12x8_DEPTH2 819 "f\n" 820 821 "mov x0, %[dst_ptr]\n" 822 823 // Load a column 824 "mov x1, x0\n" 825 "ld1 {v0.4s}, [x1], #16\n" 826 "ld1 {v1.4s}, [x1], #16\n" 827 "ld1 {v2.4s}, [x1], #16\n" 828 // Accumulate a column 829 "add v8.4s, v8.4s, v0.4s\n" 830 "add v16.4s, v16.4s, v1.4s\n" 831 "add v24.4s, v24.4s, v2.4s\n" 832 833 "add x0, x0, %[dst_col_stride]\n" 834 // Load a column 835 "mov x1, x0\n" 836 "ld1 {v0.4s}, [x1], #16\n" 837 "ld1 {v1.4s}, [x1], #16\n" 838 "ld1 {v2.4s}, [x1], #16\n" 839 // Accumulate a column 840 "add v9.4s, v9.4s, v0.4s\n" 841 "add v17.4s, v17.4s, v1.4s\n" 842 "add v25.4s, v25.4s, v2.4s\n" 843 844 "add x0, x0, %[dst_col_stride]\n" 845 // Load a column 846 "mov x1, x0\n" 847 "ld1 {v0.4s}, [x1], #16\n" 848 "ld1 {v1.4s}, [x1], #16\n" 849 "ld1 {v2.4s}, [x1], #16\n" 850 // Accumulate a column 851 "add v10.4s, v10.4s, v0.4s\n" 852 "add v18.4s, v18.4s, v1.4s\n" 853 "add v26.4s, v26.4s, v2.4s\n" 854 855 "add x0, x0, %[dst_col_stride]\n" 856 // Load a column 857 "mov x1, x0\n" 858 "ld1 {v0.4s}, [x1], #16\n" 859 "ld1 {v1.4s}, [x1], #16\n" 860 "ld1 {v2.4s}, [x1], #16\n" 861 // Accumulate a column 862 "add v11.4s, v11.4s, v0.4s\n" 863 "add v19.4s, v19.4s, v1.4s\n" 864 "add v27.4s, v27.4s, v2.4s\n" 865 866 "add x0, x0, %[dst_col_stride]\n" 867 // Load a column 868 "mov x1, x0\n" 869 "ld1 {v0.4s}, [x1], #16\n" 870 "ld1 {v1.4s}, [x1], #16\n" 871 "ld1 {v2.4s}, [x1], #16\n" 872 // Accumulate a column 873 "add v12.4s, v12.4s, v0.4s\n" 874 "add v20.4s, v20.4s, v1.4s\n" 875 "add v28.4s, v28.4s, v2.4s\n" 876 877 "add x0, x0, %[dst_col_stride]\n" 878 // Load a column 879 "mov x1, x0\n" 880 "ld1 {v0.4s}, [x1], #16\n" 881 "ld1 {v1.4s}, [x1], #16\n" 882 "ld1 {v2.4s}, [x1], #16\n" 883 // Accumulate a column 884 "add v13.4s, v13.4s, v0.4s\n" 885 "add v21.4s, v21.4s, v1.4s\n" 886 "add v29.4s, v29.4s, v2.4s\n" 887 888 "add x0, x0, %[dst_col_stride]\n" 889 // Load a column 890 "mov x1, x0\n" 891 "ld1 {v0.4s}, [x1], #16\n" 892 "ld1 {v1.4s}, [x1], #16\n" 893 "ld1 {v2.4s}, [x1], #16\n" 894 // Accumulate a column 895 "add v14.4s, v14.4s, v0.4s\n" 896 "add v22.4s, v22.4s, v1.4s\n" 897 "add v30.4s, v30.4s, v2.4s\n" 898 899 "add x0, x0, %[dst_col_stride]\n" 900 // Load a column 901 "mov x1, x0\n" 902 "ld1 {v0.4s}, [x1], #16\n" 903 "ld1 {v1.4s}, [x1], #16\n" 904 "ld1 {v2.4s}, [x1], #16\n" 905 // Accumulate a column 906 "add v15.4s, v15.4s, v0.4s\n" 907 "add v23.4s, v23.4s, v1.4s\n" 908 "add v31.4s, v31.4s, v2.4s\n" 909 910 GEMMLOWP_STORE_RESULT_NEON_64_KERNEL_12x8_DEPTH2 911 ":\n" 912 913 "mov x0, %[dst_ptr]\n" 914 // Store a column 915 "mov x1, x0\n" 916 "st1 {v8.4s}, [x1], #16\n" 917 "st1 {v16.4s}, [x1], #16\n" 918 "st1 {v24.4s}, [x1], #16\n" 919 // Store a column 920 "add x0, x0, %[dst_col_stride]\n" 921 "mov x1, x0\n" 922 "st1 {v9.4s}, [x1], #16\n" 923 "st1 {v17.4s}, [x1], #16\n" 924 "st1 {v25.4s}, [x1], #16\n" 925 // Store a column 926 "add x0, x0, %[dst_col_stride]\n" 927 "mov x1, x0\n" 928 "st1 {v10.4s}, [x1], #16\n" 929 "st1 {v18.4s}, [x1], #16\n" 930 "st1 {v26.4s}, [x1], #16\n" 931 // Store a column 932 "add x0, x0, %[dst_col_stride]\n" 933 "mov x1, x0\n" 934 "st1 {v11.4s}, [x1], #16\n" 935 "st1 {v19.4s}, [x1], #16\n" 936 "st1 {v27.4s}, [x1], #16\n" 937 // Store a column 938 "add x0, x0, %[dst_col_stride]\n" 939 "mov x1, x0\n" 940 "st1 {v12.4s}, [x1], #16\n" 941 "st1 {v20.4s}, [x1], #16\n" 942 "st1 {v28.4s}, [x1], #16\n" 943 // Store a column 944 "add x0, x0, %[dst_col_stride]\n" 945 "mov x1, x0\n" 946 "st1 {v13.4s}, [x1], #16\n" 947 "st1 {v21.4s}, [x1], #16\n" 948 "st1 {v29.4s}, [x1], #16\n" 949 // Store a column 950 "add x0, x0, %[dst_col_stride]\n" 951 "mov x1, x0\n" 952 "st1 {v14.4s}, [x1], #16\n" 953 "st1 {v22.4s}, [x1], #16\n" 954 "st1 {v30.4s}, [x1], #16\n" 955 // Store a column 956 "add x0, x0, %[dst_col_stride]\n" 957 "mov x1, x0\n" 958 "st1 {v15.4s}, [x1], #16\n" 959 "st1 {v23.4s}, [x1], #16\n" 960 "st1 {v31.4s}, [x1], #16\n" 961 : // outputs 962 [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), 963 [dst_ptr] "+r"(dst_ptr), 964 [run_depth] "+r"(run_depth) 965 : // inputs 966 [start_depth] "r"(start_depth), 967 [dst_col_stride] "r"(dst_col_stride) 968 : // clobbers 969 "cc", "memory", "x0", "x1", "v0", "v1", "v2", "v3", "v4", "v5", "v6", 970 "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", 971 "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", 972 "v27", "v28", "v29", "v30", "v31"); 973#undef GEMMLOWP_LOOP_NEON_64_KERNEL_12X8_DEPTH2 974#undef GEMMLOWP_STORE_RESULT_NEON_64_KERNEL_12x8_DEPTH2 975 } 976}; 977 978#endif // GEMMLOWP_NEON_64 979 980// Our main GEMV kernel. 981// Because our GEMV performance is low and not dominated by the kernel 982// at the moment, it's not worth optimizing too hard yet. 983// Using intrinsics allows us to write one implementation for both 32bit and 984// 64bit ARM, and should also perform OK here because the register pressure 985// is not so high in this GEMV kernel. 986// When/if we get serious about GEMV performance, we will want to 987// implement it to bypass packing altogether, and use source data in-place 988// with different GEMV kernels for row-major and column-major LHS. 989template <int Cells> 990struct NEONKernel4Nx1Depth2 : KernelBase { 991 typedef KernelFormat<KernelSideFormat<CellFormat<4, 2>, Cells>, 992 KernelSideFormat<CellFormat<1, 2>, 1> > 993 Format; 994 995 const char* Name() const override { return "NEON intrinsics, 4Nx1, depth 2"; } 996 997 void Run(std::int32_t* dst_ptr, std::size_t dst_row_stride, 998 std::size_t dst_col_stride, const std::uint8_t* lhs_ptr, 999 const std::uint8_t* rhs_ptr, std::size_t start_depth, 1000 std::size_t run_depth) const override { 1001 ScopedProfilingLabel label("optimized kernel (NEON 4Nx1)"); 1002 1003 assert(dst_row_stride == 1); 1004 1005 // Clear accumulators 1006 uint32x4_t acc[Cells]; 1007 for (int cell = 0; cell < Cells; cell++) { 1008 acc[cell] = vdupq_n_u32(0); 1009 } 1010 // Main loop 1011 for (std::size_t d = 0; d < run_depth; d += 2) { 1012 // Load LHS cells 1013 uint16x8_t lhs[Cells]; 1014 for (int cell = 0; cell < Cells; cell++) { 1015 lhs[cell] = vmovl_u8(vld1_u8(lhs_ptr)); 1016 lhs_ptr += 8; 1017 } 1018 // Load RHS cell 1019 uint16_t rhs0 = rhs_ptr[0]; 1020 uint16_t rhs1 = rhs_ptr[1]; 1021 rhs_ptr += 2; 1022 // Multiply-accumulate, level of depth 0 1023 for (int cell = 0; cell < Cells; cell++) { 1024 acc[cell] = vmlal_n_u16(acc[cell], vget_low_u16(lhs[cell]), rhs0); 1025 } 1026 // Multiply-accumulate, level of depth 1 1027 for (int cell = 0; cell < Cells; cell++) { 1028 acc[cell] = vmlal_n_u16(acc[cell], vget_high_u16(lhs[cell]), rhs1); 1029 } 1030 } 1031 // If start_depth is nonzero, accumulate with the existing accumulator 1032 if (start_depth) { 1033 for (int cell = 0; cell < Cells; cell++) { 1034 acc[cell] = vaddq_u32( 1035 acc[cell], vreinterpretq_u32_s32(vld1q_s32(dst_ptr + 4 * cell))); 1036 } 1037 } 1038 // Store the accumulators 1039 for (int cell = 0; cell < Cells; cell++) { 1040 vst1q_s32(dst_ptr + 4 * cell, vreinterpretq_s32_u32(acc[cell])); 1041 } 1042 } 1043}; 1044 1045} // namespace gemmlowp 1046 1047#endif // GEMMLOWP_INTERNAL_KERNEL_NEON_H_ 1048