MachineInstr.h revision 9edf7deb37f0f97664f279040fa15d89f32e23d9
148486893f46d2e12e926682a3ecb908716bc66c4Chris Lattner//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 7ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 10a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// This file contains the declaration of the MachineInstr class, which is the 11ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman// basic representation for all target dependent machine instructions used by 12a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// the back end. 13a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 14a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner//===----------------------------------------------------------------------===// 1523ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 1623ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#ifndef LLVM_CODEGEN_MACHINEINSTR_H 1723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#define LLVM_CODEGEN_MACHINEINSTR_H 1823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 19103a64318bb716d68a4248996466900411d789beChris Lattner#include "llvm/CodeGen/MachineOperand.h" 2079e6ed9d4733ef6bfaf6e6ae71a013c8b226b7c9Owen Anderson#include "llvm/Target/TargetInstrDesc.h" 21518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner#include "llvm/Target/TargetOpcodes.h" 2284e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist.h" 2384e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/ilist_node.h" 2484e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/STLExtras.h" 2584e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/DenseMapInfo.h" 261e86a66b00b94adc4ad6977ef6b47c516ac62cecDevang Patel#include "llvm/Support/DebugLoc.h" 271baa88e3de8947b02d9ef4caa73e5860f048ec6eDan Gohman#include <vector> 28be583b914d8156b99d3da264d5adca37fee8dbc9John Criswell 29d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 30d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 3118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesentemplate <typename T> class SmallVectorImpl; 32e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohmanclass AliasAnalysis; 33749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattnerclass TargetInstrDesc; 34b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengclass TargetInstrInfo; 356f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo; 368e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanclass MachineFunction; 37c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanclass MachineMemOperand; 38c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 39b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 408b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// MachineInstr - Representation of each machine instruction. 418b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// 42fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohmanclass MachineInstr : public ilist_node<MachineInstr> { 43c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanpublic: 44c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman typedef MachineMemOperand **mmo_iterator; 45c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman 4645282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// Flags to specify different kinds of comments to output in 4745282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// assembly code. These flags carry semantic information not 4845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// otherwise easily derivable from the IR text. 4945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// 5045282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner enum CommentFlag { 5145282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner ReloadReuse = 0x1 5245282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner }; 5345282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner 54c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanprivate: 55749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc *TID; // Instruction descriptor. 56c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng unsigned short NumImplicitOps; // Number of implicit operands (which 579a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng // are determined at construction time). 589a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 591251443929a256c833717e1030c368d3b6e4cb7cDavid Greene unsigned short AsmPrinterFlags; // Various bits of information used by 601251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // the AsmPrinter to emit helpful 611251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // comments. This is *not* semantic 621251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information. Do not use this for 631251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // anything other than to convey comment 641251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information to AsmPrinter. 651251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 66943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner std::vector<MachineOperand> Operands; // the operands 67c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefs; // information on memory references 68c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator MemRefsEnd; 69f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock *Parent; // Pointer to the owning basic block. 7006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen DebugLoc debugLoc; // Source line information. 71c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke 72413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner // OperandComplete - Return true if it's illegal to add a new operand 73413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner bool OperandsComplete() const; 74a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 758e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(const MachineInstr&); // DO NOT IMPLEMENT 769452b0797a80001920576d7e2ef4af05242cba69Chris Lattner void operator=(const MachineInstr&); // DO NOT IMPLEMENT 77c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 78c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos // Intrusive list support 79fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineInstr>; 80fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineBasicBlock>; 81f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner void setParent(MachineBasicBlock *P) { Parent = P; } 828e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 838e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr ctor - This constructor creates a copy of the given 848e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr in the given MachineFunction. 858e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(MachineFunction &, const MachineInstr &); 868e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 87c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng /// MachineInstr ctor - This constructor creates a dummy MachineInstr with 8867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// TID NULL and no operands. 89c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng MachineInstr(); 90e8b57ef2603ed522083dc18e559ca4e20abf22aeVikram S. Adve 9106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // The next two constructors have DebugLoc and non-DebugLoc versions; 9206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // over time, the non-DebugLoc versions should be phased out and eventually 9306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // removed. 9406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 95666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// MachineInstr ctor - This constructor creates a MachineInstr and adds the 96666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// implicit operands. It reserves space for the number of operands specified 97666f8cb9b7486a45f59fd9ba3202e4b67dbad58cBob Wilson /// by the TargetInstrDesc. The version with a DebugLoc should be preferred. 98749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false); 99d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 1007db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// MachineInstr ctor - Work exactly the same as the ctor above, except that 1017db458fb0768059f050d3a0f1a26818fa8e22712Chris Lattner /// the MachineInstr is created and added to the end of the specified basic 10206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. The version with a DebugLoc should be preferred. 103749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID); 104ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 10506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - This constructor create a MachineInstr and add the 10606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// implicit operands. It reserves space for number of operands specified by 10706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// TargetInstrDesc. An explicit DebugLoc is supplied. 10806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl, 10906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen bool NoImp = false); 11006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 11106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// MachineInstr ctor - Work exactly the same as the ctor above, except that 11206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// the MachineInstr is created and added to the end of the specified basic 11306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// block. 11406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 11506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen const TargetInstrDesc &TID); 11606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 117aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos ~MachineInstr(); 118aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 1198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // MachineInstrs are pool-allocated and owned by MachineFunction. 1208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman friend class MachineFunction; 1218e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1228e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanpublic: 123f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner const MachineBasicBlock* getParent() const { return Parent; } 124f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock* getParent() { return Parent; } 12506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 1261251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlags - Return the asm printer flags bitvector. 1271251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 1281251443929a256c833717e1030c368d3b6e4cb7cDavid Greene unsigned short getAsmPrinterFlags() const { return AsmPrinterFlags; } 1291251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1301251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// getAsmPrinterFlag - Return whether an AsmPrinter flag is set. 1311251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 13245282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner bool getAsmPrinterFlag(CommentFlag Flag) const { 1331251443929a256c833717e1030c368d3b6e4cb7cDavid Greene return AsmPrinterFlags & Flag; 1341251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 1351251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1361251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// setAsmPrinterFlag - Set a flag for the AsmPrinter. 1371251443929a256c833717e1030c368d3b6e4cb7cDavid Greene /// 13845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner void setAsmPrinterFlag(CommentFlag Flag) { 13945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner AsmPrinterFlags |= (unsigned short)Flag; 1401251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 1411251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 14206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// getDebugLoc - Returns the debug location id of this MachineInstr. 14306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 144d5fb7906130989a579d1bfe4490b414331e94feeChris Lattner DebugLoc getDebugLoc() const { return debugLoc; } 14567f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng 14669244300b8a0112efb44b6273ecea4ca6264b8cfChris Lattner /// getDesc - Returns the target instruction descriptor of this 14767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// MachineInstr. 148749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &getDesc() const { return *TID; } 149ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenos 150c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke /// getOpcode - Returns the opcode of this MachineInstr. 151cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 15279e6ed9d4733ef6bfaf6e6ae71a013c8b226b7c9Owen Anderson int getOpcode() const { return TID->Opcode; } 1539f495b54fa94dba4e0be59ba9736c7cf18d996d9Vikram S. Adve 154cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// Access to explicit operands of the instruction. 155cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 15634cd4a484e532cc463fd5a4bf59b88d13c5467c1Evan Cheng unsigned getNumOperands() const { return (unsigned)Operands.size(); } 157ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 158572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner const MachineOperand& getOperand(unsigned i) const { 159a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 160943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 161572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 162572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner MachineOperand& getOperand(unsigned i) { 163a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 164943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 165572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 1666d6c3f86186333037f2fd3fb001e8b2998c080d9Chris Lattner 16719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// getNumExplicitOperands - Returns the number of non-implicit operands. 16819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// 16919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng unsigned getNumExplicitOperands() const; 170fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner 17169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// Access to memory operands of the instruction 172c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_begin() const { return MemRefs; } 173c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_end() const { return MemRefsEnd; } 174c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman bool memoperands_empty() const { return MemRefsEnd == MemRefs; } 17569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 176cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// hasOneMemOperand - Return true if this instruction has exactly one 177cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman /// MachineMemOperand. 178cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman bool hasOneMemOperand() const { 179c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman return MemRefsEnd - MemRefs == 1; 180cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman } 181cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman 182506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng enum MICheckType { 183506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng CheckDefs, // Check all operands for equality 184506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreDefs, // Ignore all definitions 185506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreVRegDefs // Ignore virtual register definitions 186506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng }; 187506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng 188fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// isIdenticalTo - Return true if this instruction is identical to (same 189fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// opcode and same operands as) the specified instruction. 190506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng bool isIdenticalTo(const MachineInstr *Other, 191506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng MICheckType Check = CheckDefs) const; 192a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 1936b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// removeFromParent - This method unlinks 'this' from the containing basic 1946b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block, and returns it, but does not delete it. 1956b560918426182d2b46b899d609911d49f6739f7Chris Lattner MachineInstr *removeFromParent(); 1966b560918426182d2b46b899d609911d49f6739f7Chris Lattner 1976b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// eraseFromParent - This method unlinks 'this' from the containing basic 1986b560918426182d2b46b899d609911d49f6739f7Chris Lattner /// block and deletes it. 1998e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman void eraseFromParent(); 200466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 2014406604047423576e36657c7ede266ca42e79642Dan Gohman /// isLabel - Returns true if the MachineInstr represents a label. 2024406604047423576e36657c7ede266ca42e79642Dan Gohman /// 203518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isLabel() const { 204518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::DBG_LABEL || 205518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::EH_LABEL || 206518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner getOpcode() == TargetOpcode::GC_LABEL; 207518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 208518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner 209518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isDebugLabel() const { return getOpcode() == TargetOpcode::DBG_LABEL; } 210518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; } 211518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; } 212518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } 213518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner 214518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isPHI() const { return getOpcode() == TargetOpcode::PHI; } 215518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isKill() const { return getOpcode() == TargetOpcode::KILL; } 216518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } 217518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; } 218518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isExtractSubreg() const { 219518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::EXTRACT_SUBREG; 220518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 221518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInsertSubreg() const { 222518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::INSERT_SUBREG; 223518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 224518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isSubregToReg() const { 225518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::SUBREG_TO_REG; 226518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 2273d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng bool isRegSequence() const { 2283d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng return getOpcode() == TargetOpcode::REG_SEQUENCE; 2293d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng } 230518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner 2316130f66eaae89f8878590796977678afa8448926Evan Cheng /// readsRegister - Return true if the MachineInstr reads the specified 2326130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there 2336130f66eaae89f8878590796977678afa8448926Evan Cheng /// is a read of a super-register. 2347ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// This does not count partial redefines of virtual registers as reads: 2357ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// %reg1024:6 = OP. 2366130f66eaae89f8878590796977678afa8448926Evan Cheng bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 2376130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 2386130f66eaae89f8878590796977678afa8448926Evan Cheng } 2396130f66eaae89f8878590796977678afa8448926Evan Cheng 2407ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// readsVirtualRegister - Return true if the MachineInstr reads the specified 2417ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// virtual register. Take into account that a partial define is a 2427ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// read-modify-write operation. 24318b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen bool readsVirtualRegister(unsigned Reg) const { 24418b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen return readsWritesVirtualRegister(Reg).first; 24518b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen } 24618b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen 24718b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// readsWritesVirtualRegister - Return a pair of bools (reads, writes) 24818b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// indicating if this instruction reads or writes Reg. This also considers 24918b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// partial defines. 25018b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// If Ops is not null, all operand indices for Reg are added. 25118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen std::pair<bool,bool> readsWritesVirtualRegister(unsigned Reg, 25218b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen SmallVectorImpl<unsigned> *Ops = 0) const; 2537ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen 2546130f66eaae89f8878590796977678afa8448926Evan Cheng /// killsRegister - Return true if the MachineInstr kills the specified 2556130f66eaae89f8878590796977678afa8448926Evan Cheng /// register. If TargetRegisterInfo is passed, then it also checks if there is 2566130f66eaae89f8878590796977678afa8448926Evan Cheng /// a kill of a super-register. 2576130f66eaae89f8878590796977678afa8448926Evan Cheng bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 2586130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 2596130f66eaae89f8878590796977678afa8448926Evan Cheng } 2606130f66eaae89f8878590796977678afa8448926Evan Cheng 2611015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// definesRegister - Return true if the MachineInstr fully defines the 2626130f66eaae89f8878590796977678afa8448926Evan Cheng /// specified register. If TargetRegisterInfo is passed, then it also checks 2636130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a def of a super-register. 2641015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 2651015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const { 2661015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 2671015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng } 2681015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng 2691015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// modifiesRegister - Return true if the MachineInstr modifies (fully define 2701015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// or partially define) the specified register. 2711015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 2721015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 2731015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 2746130f66eaae89f8878590796977678afa8448926Evan Cheng } 2756130f66eaae89f8878590796977678afa8448926Evan Cheng 2766130f66eaae89f8878590796977678afa8448926Evan Cheng /// registerDefIsDead - Returns true if the register is dead in this machine 2776130f66eaae89f8878590796977678afa8448926Evan Cheng /// instruction. If TargetRegisterInfo is passed, then it also checks 2786130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a dead def of a super-register. 2796130f66eaae89f8878590796977678afa8448926Evan Cheng bool registerDefIsDead(unsigned Reg, 2806130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const { 2811015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 2826130f66eaae89f8878590796977678afa8448926Evan Cheng } 2836130f66eaae89f8878590796977678afa8448926Evan Cheng 284faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng /// findRegisterUseOperandIdx() - Returns the operand index that is a use of 28510f9101c4c0df0837414976ad0ef0e86d6771059Jim Grosbach /// the specific register or -1 if it is not found. It further tightens 28676d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng /// the search criteria to a use that kills the register if isKill is true. 2876130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, 2886130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 2896130f66eaae89f8878590796977678afa8448926Evan Cheng 2906130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns 2916130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 2929180c8e3cfd12abd21242768db05072a209ca6e7Evan Cheng MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false, 2936130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 2946130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); 2956130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 2966130f66eaae89f8878590796977678afa8448926Evan Cheng } 297576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 2986130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperandIdx() - Returns the operand index that is a def of 299703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman /// the specified register or -1 if it is not found. If isDead is true, defs 3001015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// that are not dead are skipped. If Overlap is true, then it also looks for 3011015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// defs that merely overlap the specified register. If TargetRegisterInfo is 3021015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// non-null, then it also checks if there is a def of a super-register. 3031015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int findRegisterDefOperandIdx(unsigned Reg, 3041015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool isDead = false, bool Overlap = false, 3056130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) const; 3066130f66eaae89f8878590796977678afa8448926Evan Cheng 3076130f66eaae89f8878590796977678afa8448926Evan Cheng /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns 3086130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 309631bd3cdf39eb099d5d5d279b17b08f119956538Evan Cheng MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 3106130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI = NULL) { 3111015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); 3126130f66eaae89f8878590796977678afa8448926Evan Cheng return (Idx == -1) ? NULL : &getOperand(Idx); 3136130f66eaae89f8878590796977678afa8448926Evan Cheng } 31419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 315f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// findFirstPredOperandIdx() - Find the index of the first operand in the 316f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// operand list that is used to represent the predicate. It returns -1 if 317f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// none is found. 318f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng int findFirstPredOperandIdx() const; 319b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 320d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// isRegTiedToUseOperand - Given the index of a register def operand, 321d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// check if the register def is tied to a source operand, due to either 322d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// two-address elimination or inline assembly constraints. Returns the 323d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// first tied use operand index by reference is UseOpIdx is not null. 324ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const; 32532dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 326a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// isRegTiedToDefOperand - Return true if the use operand of the specified 327a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// index is tied to an def operand. It also returns the def operand index by 328a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng /// reference if DefOpIdx is not null. 329ce9be2cf5dc84865f6b819bd3f9be16944426268Jakob Stoklund Olesen bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const; 330a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng 331e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// clearKillInfo - Clears kill flags on all operands. 332e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman /// 333e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman void clearKillInfo(); 334e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman 3359a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// copyKillDeadInfo - Copies kill / dead operand properties from MI. 3369a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng /// 337576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng void copyKillDeadInfo(const MachineInstr *MI); 3389a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 33919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng /// copyPredicates - Copies predicate operand(s) from MI. 34019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng void copyPredicates(const MachineInstr *MI); 34119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 3429edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// substituteRegister - Replace all occurrences of FromReg with ToReg:SubIdx, 3439edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// properly composing subreg indices where necessary. 3449edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, 3459edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &RegInfo); 3469edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen 347b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterKilled - We have determined MI kills a register. Look for the 348b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, 349b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// add a implicit operand if it's not found. Returns true if the operand 350b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// exists / is added. 3516f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterKilled(unsigned IncomingReg, 3526f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 353b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 3548efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 355b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// addRegisterDead - We have determined MI defined a register without a use. 356b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// Look for the operand that defines it and mark it as IsDead. If 357b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// AddIfNotFound is true, add a implicit operand if it's not found. Returns 358b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// true if the operand exists / is added. 3596f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, 360b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 361b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 3628efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// addRegisterDefined - We have determined MI defines a register. Make sure 3638efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen /// there is an operand defining Reg. 3648efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen void addRegisterDefined(unsigned IncomingReg, 36563e6a488cb6c29983415221719d05fbf99e00193Jakob Stoklund Olesen const TargetRegisterInfo *RegInfo = 0); 3668efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 3679f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// isSafeToMove - Return true if it is safe to move this instruction. If 3689f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// SawStore is set to true, it means that there is a store (or call) between 3699f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// the instruction's location and its intended destination. 370ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToMove(const TargetInstrInfo *TII, AliasAnalysis *AA, 371ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool &SawStore) const; 372b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 3733e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// isSafeToReMat - Return true if it's safe to rematerialize the specified 3743e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// instruction which defined the specified register instead of copying it. 375ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng bool isSafeToReMat(const TargetInstrInfo *TII, AliasAnalysis *AA, 376ac1abde05b7e6956c01deb6557539bee8fea30f4Evan Cheng unsigned DstReg) const; 377df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng 3783e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// hasVolatileMemoryRef - Return true if this instruction may have a 3793e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// volatile memory reference, or if the information describing the 3803e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// memory reference is not available. Return false if it is known to 3813e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman /// have no volatile memory references. 3823e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman bool hasVolatileMemoryRef() const; 3833e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 384e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// isInvariantLoad - Return true if this instruction is loading from a 385e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// location whose value is invariant across the function. For example, 386f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// loading a value from the constant pool or from the argument area of 387e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// a function if it does not change. This should only return true of *all* 388e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// loads the instruction does are invariant (if it does multiple loads). 389a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman bool isInvariantLoad(AliasAnalysis *AA) const; 390e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman 391229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// isConstantValuePHI - If the specified instruction is a PHI that always 392229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// merges together the same virtual register, return the register, otherwise 393229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng /// return 0. 394229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng unsigned isConstantValuePHI() const; 395229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng 396a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// allDefsAreDead - Return true if all the defs of this instruction are dead. 397a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng /// 398a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng bool allDefsAreDead() const; 399a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng 400a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // 401a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // Debugging support 402fa78fbf446b505767e838f9c188707183c57fc9cChris Lattner // 403cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson void print(raw_ostream &OS, const TargetMachine *TM = 0) const; 404572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner void dump() const; 4052f898d207466bf233b55607e404baca302bc7b5eChris Lattner 406413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner //===--------------------------------------------------------------------===// 40762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Accessors used to build up machine instructions. 4087ad6be7b01a902f532eebb607306f7b3f4627718Chris Lattner 40962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// addOperand - Add the specified operand to the instruction. If it is an 41062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// implicit operand, it is added to the end of the operand list. If it is 41162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// an explicit operand it is added at the end of the explicit operand list 41262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// (before the first implicit operand). 41362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void addOperand(const MachineOperand &Op); 41462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 4155080f4d9919d39b367891dc51e739c571a66036cChris Lattner /// setDesc - Replace the instruction descriptor (thus opcode) of 41667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// the current instruction with a new one. 4173c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 4185080f4d9919d39b367891dc51e739c571a66036cChris Lattner void setDesc(const TargetInstrDesc &tid) { TID = &tid; } 4193c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner 42006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// setDebugLoc - Replace current source information with new such. 421ab160cf371d6148d49b5401a903dd4ce381b2f8cDale Johannesen /// Avoid using this, the constructor argument is preferable. 42206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen /// 42306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen void setDebugLoc(const DebugLoc dl) { debugLoc = dl; } 42406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 4253c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// RemoveOperand - Erase an operand from an instruction, leaving it with one 4263c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// fewer operand than it started with. 4273c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// 42862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveOperand(unsigned i); 42962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 430c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// addMemOperand - Add a MachineMemOperand to the machine instruction. 431c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// This function should be used only occasionally. The setMemRefs function 432c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// is the primary method for setting up a MachineInstr's MemRefs list. 433c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void addMemOperand(MachineFunction &MF, MachineMemOperand *MO); 4348e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 435c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// setMemRefs - Assign this MachineInstr's memory reference descriptor 436c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// list. This does not transfer ownership. 437c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) { 438c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefs = NewMemRefs; 439c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefsEnd = NewMemRefsEnd; 440c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman } 44169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 442943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattnerprivate: 44362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// getRegInfo - If this instruction is embedded into a MachineFunction, 44462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return the MachineRegisterInfo object for the current function, otherwise 44562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// return null. 44662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *getRegInfo(); 447d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 448d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// addImplicitDefUseOperands - Add all implicit def and use operands to 449d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng /// this instruction. 45067f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng void addImplicitDefUseOperands(); 45162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 45362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 45462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands already be on their use lists. 45562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveRegOperandsFromUseLists(); 45662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// AddRegOperandsToUseLists - Add all of the register operands in 45862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// this instruction from their respective use lists. This requires that the 45962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner /// operands not be on their use lists yet. 46062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo); 461a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve}; 46223ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 46305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstrExpressionTrait - Special DenseMapInfo traits to compare 46405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// MachineInstr* by *value* of the instruction rather than by pointer value. 46505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// The hashing and equality testing functions ignore definitions so this is 46605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// useful for CSE, etc. 46705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Chengstruct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> { 46805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getEmptyKey() { 46905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return 0; 47005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 47105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 47205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getTombstoneKey() { 47305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return reinterpret_cast<MachineInstr*>(-1); 47405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 47505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 47667eaa08f2b71aa8aec8cdf4c7d970db4cad58adaEvan Cheng static unsigned getHashValue(const MachineInstr* const &MI); 47705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 47805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static bool isEqual(const MachineInstr* const &LHS, 47905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng const MachineInstr* const &RHS) { 48005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng if (RHS == getEmptyKey() || RHS == getTombstoneKey() || 48105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng LHS == getEmptyKey() || LHS == getTombstoneKey()) 48205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS == RHS; 48305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS->isIdenticalTo(RHS, MachineInstr::IgnoreVRegDefs); 48405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 48505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng}; 48605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 487b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 488593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve// Debugging Support 489593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve 490cb3718832375a581c5ea23f15918f3ea447a446cOwen Andersoninline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) { 491cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson MI.print(OS); 492cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson return OS; 493cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson} 494cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson 495d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 496d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 49723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#endif 498