MachineInstr.h revision cddc3e03e4ec99c0268c03a126195173e519ed58
148486893f46d2e12e926682a3ecb908716bc66c4Chris Lattner//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 7ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 10a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// This file contains the declaration of the MachineInstr class, which is the 11ef6a6a69ff1e1b709d0acb315b9f6c926c67a778Misha Brukman// basic representation for all target dependent machine instructions used by 12a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// the back end. 13a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner// 14a730c864227b287cdfad5f5f3d5d0808c9f422bbChris Lattner//===----------------------------------------------------------------------===// 1523ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 1623ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#ifndef LLVM_CODEGEN_MACHINEINSTR_H 1723ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#define LLVM_CODEGEN_MACHINEINSTR_H 1823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 19a37818dbb119bda75273f16b8484732e742cdbb7Jakob Stoklund Olesen#include "llvm/ADT/ArrayRef.h" 20255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/ADT/DenseMapInfo.h" 2184e679beea11ac55ed7871eec4deaccdf393de3eChris Lattner#include "llvm/ADT/STLExtras.h" 22d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen#include "llvm/ADT/StringRef.h" 23255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/ADT/ilist.h" 24255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/ADT/ilist_node.h" 2536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/ADT/iterator_range.h" 26cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar#include "llvm/Analysis/AliasAnalysis.h" 27255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/CodeGen/MachineOperand.h" 28dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/IR/DebugInfo.h" 2936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/IR/DebugLoc.h" 300b8c9a80f20772c3793201ab5b251d3520b9cea3Chandler Carruth#include "llvm/IR/InlineAsm.h" 31255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/MC/MCInstrDesc.h" 32f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen#include "llvm/Support/ArrayRecycler.h" 33255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/Target/TargetOpcodes.h" 34be583b914d8156b99d3da264d5adca37fee8dbc9John Criswell 35d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 36d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 3718b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesentemplate <typename T> class SmallVectorImpl; 38b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengclass TargetInstrInfo; 39f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesenclass TargetRegisterClass; 406f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohmanclass TargetRegisterInfo; 418e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanclass MachineFunction; 42c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanclass MachineMemOperand; 43c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 44b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 456948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar/// Representation of each machine instruction. 468b915b4ed2c6e43413937ac71c0cbcf476ad1a98Chris Lattner/// 4784be3d5a73313eb19f2f9e0512153cd2e6f46c54Jakob Stoklund Olesen/// This class isn't a POD type, but it must have a trivial destructor. When a 4884be3d5a73313eb19f2f9e0512153cd2e6f46c54Jakob Stoklund Olesen/// MachineFunction is deleted, all the contained MachineInstrs are deallocated 4984be3d5a73313eb19f2f9e0512153cd2e6f46c54Jakob Stoklund Olesen/// without having their destructor called. 5084be3d5a73313eb19f2f9e0512153cd2e6f46c54Jakob Stoklund Olesen/// 51cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainarclass MachineInstr 52cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar : public ilist_node_with_parent<MachineInstr, MachineBasicBlock> { 53c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanpublic: 54c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman typedef MachineMemOperand **mmo_iterator; 55c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman 5645282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// Flags to specify different kinds of comments to output in 5745282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// assembly code. These flags carry semantic information not 5845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// otherwise easily derivable from the IR text. 5945282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner /// 6045282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner enum CommentFlag { 6145282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner ReloadReuse = 0x1 6245282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner }; 636dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 646dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov enum MIFlag { 657c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng NoFlags = 0, 667c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng FrameSetup = 1 << 0, // Instruction is used as a part of 676dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // function frame setup code. 68cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar FrameDestroy = 1 << 1, // Instruction is used as a part of 69cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar // function frame destruction code. 70cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar BundledPred = 1 << 2, // Instruction has bundled predecessors. 71cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar BundledSucc = 1 << 3 // Instruction has bundled successors. 726dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov }; 73c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohmanprivate: 74e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc *MCID; // Instruction descriptor. 75f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen MachineBasicBlock *Parent; // Pointer to the owning basic block. 76f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen 77f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen // Operands are allocated by an ArrayRecycler. 78f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen MachineOperand *Operands; // Pointer to the first operand. 79f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen unsigned NumOperands; // Number of operands on instruction. 80f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen typedef ArrayRecycler<MachineOperand>::Capacity OperandCapacity; 81f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen OperandCapacity CapOperands; // Capacity of the Operands array. 829a00279988612d0f960fb8d43e4ccfcab89e0e14Evan Cheng 836dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t Flags; // Various bits of additional 846dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // information about machine 856dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov // instruction. 866dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 876647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t AsmPrinterFlags; // Various bits of information used by 881251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // the AsmPrinter to emit helpful 891251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // comments. This is *not* semantic 901251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information. Do not use this for 911251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // anything other than to convey comment 921251443929a256c833717e1030c368d3b6e4cb7cDavid Greene // information to AsmPrinter. 931251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 94b2c79f2f630ed3e7da31ff8adb3014fb0ab47412Jakob Stoklund Olesen uint8_t NumMemRefs; // Information on memory references. 95861ea230a7841fe4ccc8a1cd5460354e59aeed3cBenjamin Kramer mmo_iterator MemRefs; 96861ea230a7841fe4ccc8a1cd5460354e59aeed3cBenjamin Kramer 9706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen DebugLoc debugLoc; // Source line information. 98c54839573cd9ffa6af33dc5190cc40d498534585Brian Gaeke 99ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines MachineInstr(const MachineInstr&) = delete; 100ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines void operator=(const MachineInstr&) = delete; 10184be3d5a73313eb19f2f9e0512153cd2e6f46c54Jakob Stoklund Olesen // Use MachineFunction::DeleteMachineInstr() instead. 102ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines ~MachineInstr() = delete; 103c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos 104c0b9dc5be79f009d260edb5cd5e1d8346587aaa2Alkis Evlogimenos // Intrusive list support 105fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineInstr>; 106fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman friend struct ilist_traits<MachineBasicBlock>; 107f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner void setParent(MachineBasicBlock *P) { Parent = P; } 1088e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1096948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// This constructor creates a copy of the given 1108e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman /// MachineInstr in the given MachineFunction. 1118e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr(MachineFunction &, const MachineInstr &); 1128e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1136948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// This constructor create a MachineInstr and add the implicit operands. 1146948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// It reserves space for number of operands specified by 115e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// MCInstrDesc. An explicit DebugLoc is supplied. 116ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines MachineInstr(MachineFunction &, const MCInstrDesc &MCID, DebugLoc dl, 117ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines bool NoImp = false); 11806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 1198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // MachineInstrs are pool-allocated and owned by MachineFunction. 1208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman friend class MachineFunction; 1218e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 1228e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanpublic: 123f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner const MachineBasicBlock* getParent() const { return Parent; } 124f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner MachineBasicBlock* getParent() { return Parent; } 12506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 1266948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return the asm printer flags bitvector. 1276647b59c9263eb1decd7f7ff353c0c99ec09ae6cAnton Korobeynikov uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; } 1281251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1296948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Clear the AsmPrinter bitvector. 130cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner void clearAsmPrinterFlags() { AsmPrinterFlags = 0; } 131108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 1326948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return whether an AsmPrinter flag is set. 13345282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner bool getAsmPrinterFlag(CommentFlag Flag) const { 1341251443929a256c833717e1030c368d3b6e4cb7cDavid Greene return AsmPrinterFlags & Flag; 1351251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 1361251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 1376948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Set a flag for the AsmPrinter. 13845282aedb9c5a33d20565502c6c8fc871fa84cbeChris Lattner void setAsmPrinterFlag(CommentFlag Flag) { 1396dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov AsmPrinterFlags |= (uint8_t)Flag; 1406dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1416dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1426948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Clear specific AsmPrinter flags. 1437c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng void clearAsmPrinterFlag(CommentFlag Flag) { 1447c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng AsmPrinterFlags &= ~Flag; 1457c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng } 1467c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 1476948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return the MI flags bitvector. 1486dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov uint8_t getFlags() const { 1496dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags; 1506dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1516dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1526948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return whether an MI flag is set. 1536dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov bool getFlag(MIFlag Flag) const { 1546dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov return Flags & Flag; 1556dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1566dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1576948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Set a MI flag. 1586dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlag(MIFlag Flag) { 1596dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov Flags |= (uint8_t)Flag; 1606dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov } 1616dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 1626dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov void setFlags(unsigned flags) { 163bd7b36e780f99b808f8e334e26f3dae1bc7e8175Jakob Stoklund Olesen // Filter out the automatically maintained flags. 164bd7b36e780f99b808f8e334e26f3dae1bc7e8175Jakob Stoklund Olesen unsigned Mask = BundledPred | BundledSucc; 165bd7b36e780f99b808f8e334e26f3dae1bc7e8175Jakob Stoklund Olesen Flags = (Flags & Mask) | (flags & ~Mask); 1661251443929a256c833717e1030c368d3b6e4cb7cDavid Greene } 167108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 168ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng /// clearFlag - Clear a MI flag. 169ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng void clearFlag(MIFlag Flag) { 170ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng Flags &= ~((uint8_t)Flag); 171ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng } 172ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng 1736948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if MI is in a bundle (but not the first MI in a bundle). 174cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner /// 1757c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// A bundle looks like this before it's finalized: 1767c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1777c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI | 1787c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1797c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1807c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 181b3aacdd358052ddd8d9fc9ac77f5e17a4048941aAndrew Trick /// | MI * | 1827c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1837c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1847c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 185b3aacdd358052ddd8d9fc9ac77f5e17a4048941aAndrew Trick /// | MI * | 1867c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1877c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// In this case, the first MI starts a bundle but is not inside a bundle, the 1887c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// next 2 MIs are considered "inside" the bundle. 1897c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// 1907c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// After a bundle is finalized, it looks like this: 1917c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1927c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | Bundle | 1937c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1947c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1957c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1967c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | MI * | 1977c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 1987c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 1997c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 200b3aacdd358052ddd8d9fc9ac77f5e17a4048941aAndrew Trick /// | MI * | 2017c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2027c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// | 2037c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 204b3aacdd358052ddd8d9fc9ac77f5e17a4048941aAndrew Trick /// | MI * | 2057c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// ---------------- 2067c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// The first instruction has the special opcode "BUNDLE". It's not "inside" 2077c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng /// a bundle, but the next three MIs are. 2087c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng bool isInsideBundle() const { 209fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen return getFlag(BundledPred); 210cbd323ad5259dc2bd3428a4ac26718b10adcd3cfChris Lattner } 2111251443929a256c833717e1030c368d3b6e4cb7cDavid Greene 2126948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction part of a bundle. This is true 21399a7a13f4aa5bf8f272c95f7b09ba997d2b30a35Andrew Trick /// if either itself or its following instruction is marked "InsideBundle". 2142e4b639790a166e55a0bf14fac54ca6ce583e459Jakob Stoklund Olesen bool isBundled() const { 2152e4b639790a166e55a0bf14fac54ca6ce583e459Jakob Stoklund Olesen return isBundledWithPred() || isBundledWithSucc(); 2162e4b639790a166e55a0bf14fac54ca6ce583e459Jakob Stoklund Olesen } 21799a7a13f4aa5bf8f272c95f7b09ba997d2b30a35Andrew Trick 218fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Return true if this instruction is part of a bundle, and it is not the 219fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// first instruction in the bundle. 220fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen bool isBundledWithPred() const { return getFlag(BundledPred); } 221fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 222fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Return true if this instruction is part of a bundle, and it is not the 223fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// last instruction in the bundle. 224fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen bool isBundledWithSucc() const { return getFlag(BundledSucc); } 225fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 226fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Bundle this instruction with its predecessor. This can be an unbundled 227fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// instruction, or it can be the first instruction in a bundle. 228fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen void bundleWithPred(); 229fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 230fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Bundle this instruction with its successor. This can be an unbundled 231fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// instruction, or it can be the last instruction in a bundle. 232fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen void bundleWithSucc(); 233fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 234fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Break bundle above this instruction. 235fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen void unbundleFromPred(); 236fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 237fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen /// Break bundle below this instruction. 238fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen void unbundleFromSucc(); 239fad649a5b173f8cfdbbbbde8649ed66afd1129c1Jakob Stoklund Olesen 2406948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the debug location id of this MachineInstr. 241ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines const DebugLoc &getDebugLoc() const { return debugLoc; } 2426dd97471c43805b3febf598d50498a09a02e93f4Anton Korobeynikov 2436948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return the debug variable referenced by 244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// this DBG_VALUE instruction. 2456948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar const DILocalVariable *getDebugVariable() const { 246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(isDebugValue() && "not a DBG_VALUE"); 2476948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar return cast<DILocalVariable>(getOperand(2).getMetadata()); 24837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 24937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 2506948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return the complex address expression referenced by 25137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// this DBG_VALUE instruction. 2526948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar const DIExpression *getDebugExpression() const { 25337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines assert(isDebugValue() && "not a DBG_VALUE"); 2546948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar return cast<DIExpression>(getOperand(3).getMetadata()); 255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2576948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Emit an error referring to the source location of this instruction. 2586948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// This should only be used for inline assembly that is somehow 259d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// impossible to compile. Other errors should have been handled much 260d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// earlier. 261d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// 262d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// If this method returns, the caller should try to recover from the error. 263d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen /// 264d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen void emitError(StringRef Msg) const; 265d519de082766bb71e13f6a516b305ff841c6b48cJakob Stoklund Olesen 2666948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the target instruction descriptor of this MachineInstr. 267e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &getDesc() const { return *MCID; } 268ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenos 2696948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the opcode of this MachineInstr. 2706948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar unsigned getOpcode() const { return MCID->Opcode; } 2719f495b54fa94dba4e0be59ba9736c7cf18d996d9Vikram S. Adve 272cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// Access to explicit operands of the instruction. 273cd0b3a90aa34bd42d75d8d86f74ca4972145781dBrian Gaeke /// 274f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen unsigned getNumOperands() const { return NumOperands; } 275ea61c358720aa6c7a159d51658b34276316aa841Misha Brukman 276572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner const MachineOperand& getOperand(unsigned i) const { 277a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 278943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 279572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 280572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner MachineOperand& getOperand(unsigned i) { 281a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve assert(i < getNumOperands() && "getOperand() out of range!"); 282943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner return Operands[i]; 283572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner } 2846d6c3f86186333037f2fd3fb001e8b2998c080d9Chris Lattner 2856948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the number of non-implicit operands. 28619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng unsigned getNumExplicitOperands() const; 287ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 288ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner /// iterator/begin/end - Iterate over all operands of a machine instruction. 289f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen typedef MachineOperand *mop_iterator; 290f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen typedef const MachineOperand *const_mop_iterator; 291ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 292f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen mop_iterator operands_begin() { return Operands; } 293f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen mop_iterator operands_end() { return Operands + NumOperands; } 294ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 295f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen const_mop_iterator operands_begin() const { return Operands; } 296f1d015f3429f611c423f943c75f86e6823810dc3Jakob Stoklund Olesen const_mop_iterator operands_end() const { return Operands + NumOperands; } 297ccb5c677c66aea0a86878de69d5346ef802a6505Chris Lattner 298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mop_iterator> operands() { 299cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), operands_end()); 30036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<const_mop_iterator> operands() const { 302cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), operands_end()); 30336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mop_iterator> explicit_operands() { 305cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), 306cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_begin() + getNumExplicitOperands()); 307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<const_mop_iterator> explicit_operands() const { 309cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), 310cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_begin() + getNumExplicitOperands()); 311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mop_iterator> implicit_operands() { 313cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(explicit_operands().end(), operands_end()); 314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<const_mop_iterator> implicit_operands() const { 316cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(explicit_operands().end(), operands_end()); 317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 318cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Returns a range over all explicit operands that are register definitions. 319cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Implicit definition are not included! 320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mop_iterator> defs() { 321cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), 322cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_begin() + getDesc().getNumDefs()); 323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 324cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// \copydoc defs() 325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<const_mop_iterator> defs() const { 326cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin(), 327cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_begin() + getDesc().getNumDefs()); 328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 329cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Returns a range that includes all operands that are register uses. 330cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// This may include unrelated operands which are not register uses. 331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mop_iterator> uses() { 332cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin() + getDesc().getNumDefs(), 333cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_end()); 334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 335cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// \copydoc uses() 336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<const_mop_iterator> uses() const { 337cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(operands_begin() + getDesc().getNumDefs(), 338cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar operands_end()); 339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 34036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3416948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the number of the operand iterator \p I points to. 3426948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar unsigned getOperandNo(const_mop_iterator I) const { 3436948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar return I - operands_begin(); 3446948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar } 3456948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 34669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman /// Access to memory operands of the instruction 347c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman mmo_iterator memoperands_begin() const { return MemRefs; } 348861ea230a7841fe4ccc8a1cd5460354e59aeed3cBenjamin Kramer mmo_iterator memoperands_end() const { return MemRefs + NumMemRefs; } 349861ea230a7841fe4ccc8a1cd5460354e59aeed3cBenjamin Kramer bool memoperands_empty() const { return NumMemRefs == 0; } 35069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mmo_iterator> memoperands() { 352cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(memoperands_begin(), memoperands_end()); 35336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines iterator_range<mmo_iterator> memoperands() const { 355cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return make_range(memoperands_begin(), memoperands_end()); 35636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 35736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3586948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction has exactly one MachineMemOperand. 359cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman bool hasOneMemOperand() const { 360861ea230a7841fe4ccc8a1cd5460354e59aeed3cBenjamin Kramer return NumMemRefs == 1; 361cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman } 362cddc11e7570893233af8e84dfb8e7f0f9ab0090dDan Gohman 3635a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// API for querying MachineInstr properties. They are the same as MCInstrDesc 3645a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// queries but they are bundle aware. 3655a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 36643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng enum QueryType { 36743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng IgnoreBundle, // Ignore bundles 36843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng AnyInBundle, // Return true if any instruction in bundle has property 36943d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng AllInBundle // Return true if all instructions in bundle have property 37043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng }; 37143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng 3726948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the instruction (or in the case of a bundle, 3735a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the instructions inside the bundle) has the specified property. 3745a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// The first argument is the property being queried. 3755a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// The second argument indicates whether the query should look inside 3765a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction bundles. 37785f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer bool hasProperty(unsigned MCFlag, QueryType Type = AnyInBundle) const { 3784aebce83212d7271454c8767085645fe11054b44Jakob Stoklund Olesen // Inline the fast path for unbundled or bundle-internal instructions. 3794aebce83212d7271454c8767085645fe11054b44Jakob Stoklund Olesen if (Type == IgnoreBundle || !isBundled() || isBundledWithPred()) 38085f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer return getDesc().getFlags() & (1 << MCFlag); 38185f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer 3824aebce83212d7271454c8767085645fe11054b44Jakob Stoklund Olesen // If this is the first instruction in a bundle, take the slow path. 38385f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer return hasPropertyInBundle(1 << MCFlag, Type); 38485f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer } 3855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3866948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction can have a variable number of operands. 3876948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// In this case, the variable operands will be after the normal 3885a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operands but before the implicit definitions and uses (if any are 3895a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// present). 39043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isVariadic(QueryType Type = IgnoreBundle) const { 39143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Variadic, Type); 3925a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 3946948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Set if this instruction has an optional definition, e.g. 3955a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// ARM instructions which can set condition code if 's' bit is set. 39643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasOptionalDef(QueryType Type = IgnoreBundle) const { 39743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::HasOptionalDef, Type); 3985a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 3995a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4006948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is a pseudo instruction that doesn't 4015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// correspond to a real machine instruction. 40243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isPseudo(QueryType Type = IgnoreBundle) const { 40343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Pseudo, Type); 4045a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4055a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 40643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isReturn(QueryType Type = AnyInBundle) const { 40743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Return, Type); 4085a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4095a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 41043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCall(QueryType Type = AnyInBundle) const { 41143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Call, Type); 4125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4146948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if the specified instruction stops control flow 4155a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// from executing the instruction immediately following it. Examples include 4165a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// unconditional branches and return instructions. 41743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBarrier(QueryType Type = AnyInBundle) const { 41843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Barrier, Type); 4195a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4207c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 4216948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this instruction part of the terminator for a basic block. 4226948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Typically this is things like return and branch instructions. 4235a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 4245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Various passes use this to insert code into the bottom of a basic block, 4255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// but before control flow occurs. 42643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isTerminator(QueryType Type = AnyInBundle) const { 42743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Terminator, Type); 4287c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng } 4297c2a4a30e0e16762c75adacebd05ec9fcbccf16bEvan Cheng 4306948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this is a conditional, unconditional, or indirect branch. 4316948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Predicates below can be used to discriminate between 4325a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// these cases, and the TargetInstrInfo::AnalyzeBranch method can be used to 4335a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// get more information. 43443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBranch(QueryType Type = AnyInBundle) const { 43543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Branch, Type); 4365a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4375a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4386948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is an indirect branch, such as a 4395a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// branch through a register. 44043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isIndirectBranch(QueryType Type = AnyInBundle) const { 44143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::IndirectBranch, Type); 4425a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4435a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4446948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is a branch which may fall 4455a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// through to the next instruction or may transfer control flow to some other 4465a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// block. The TargetInstrInfo::AnalyzeBranch method can be used to get more 4475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// information about this branch. 44843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isConditionalBranch(QueryType Type = AnyInBundle) const { 44943d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type); 4505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4515a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4526948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is a branch which always 4535a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// transfers control flow to some other block. The 4545a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::AnalyzeBranch method can be used to get more information 4555a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// about this branch. 45643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isUnconditionalBranch(QueryType Type = AnyInBundle) const { 45743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type); 4585a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4595a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 460a370bdb42eaefdb103f971ad2e84c75573d77c68Joey Gouly /// Return true if this instruction has a predicate operand that 461a370bdb42eaefdb103f971ad2e84c75573d77c68Joey Gouly /// controls execution. It may be set to 'always', or may be set to other 4625a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// values. There are various methods in TargetInstrInfo that can be used to 4635a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// control and modify the predicate in this instruction. 46443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isPredicable(QueryType Type = AllInBundle) const { 4655a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // If it's a bundle than all bundled instructions must be predicable for this 4665a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // to return true. 46743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Predicable, Type); 4685a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4695a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4706948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is a comparison. 47143d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCompare(QueryType Type = IgnoreBundle) const { 47243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Compare, Type); 4735a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4745a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4756948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is a move immediate 4765a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// (including conditional moves) instruction. 47743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isMoveImmediate(QueryType Type = IgnoreBundle) const { 47843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::MoveImm, Type); 4795a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4805a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4816948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is a bitcast instruction. 48243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isBitcast(QueryType Type = IgnoreBundle) const { 48343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Bitcast, Type); 4845a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4866948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is a select instruction. 487f2c64ef519b38a4328809b27b4a3a8e0c26e9709Jakob Stoklund Olesen bool isSelect(QueryType Type = IgnoreBundle) const { 488f2c64ef519b38a4328809b27b4a3a8e0c26e9709Jakob Stoklund Olesen return hasProperty(MCID::Select, Type); 489f2c64ef519b38a4328809b27b4a3a8e0c26e9709Jakob Stoklund Olesen } 490f2c64ef519b38a4328809b27b4a3a8e0c26e9709Jakob Stoklund Olesen 4916948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction cannot be safely duplicated. 4926948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// For example, if the instruction has a unique labels attached 4935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// to it, duplicating it would cause multiple definition errors. 49443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isNotDuplicable(QueryType Type = AnyInBundle) const { 49543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::NotDuplicable, Type); 4965a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 4975a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 4986948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is convergent. 499cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Convergent instructions can not be made control-dependent on any 500cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// additional values. 5016948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar bool isConvergent(QueryType Type = AnyInBundle) const { 5026948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar return hasProperty(MCID::Convergent, Type); 5036948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar } 5046948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 5056948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if the specified instruction has a delay slot 5065a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// which must be filled by the code generator. 50743d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasDelaySlot(QueryType Type = AnyInBundle) const { 50843d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::DelaySlot, Type); 5095a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5105a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5116948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true for instructions that can be folded as 5125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// memory operands in other instructions. The most common use for this 5135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is instructions that are simple loads from memory that don't modify 5145a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the loaded value in any way, but it can also be used for instructions 5155a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// that can be expressed as constant-pool loads, such as V_SETALLONES 5165a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// on x86, to allow them to be folded when it is beneficial. 5175a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// This should only be set on instructions that return a value in their 5185a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// only virtual register definition. 51943d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool canFoldAsLoad(QueryType Type = IgnoreBundle) const { 52043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::FoldableAsLoad, Type); 5215a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5225a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 52337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// \brief Return true if this instruction behaves 52437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// the same way as the generic REG_SEQUENCE instructions. 52537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// E.g., on ARM, 52637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// dX VMOVDRR rY, rZ 52737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// is equivalent to 52837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1. 52937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// 53037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// Note that for the optimizers to be able to take advantage of 53137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// this property, TargetInstrInfo::getRegSequenceLikeInputs has to be 53237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// override accordingly. 53337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines bool isRegSequenceLike(QueryType Type = IgnoreBundle) const { 53437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines return hasProperty(MCID::RegSequence, Type); 53537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 53637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 53737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// \brief Return true if this instruction behaves 53837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// the same way as the generic EXTRACT_SUBREG instructions. 53937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// E.g., on ARM, 54037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// rX, rY VMOVRRD dZ 54137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// is equivalent to two EXTRACT_SUBREG: 54237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// rX = EXTRACT_SUBREG dZ, ssub_0 54337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// rY = EXTRACT_SUBREG dZ, ssub_1 54437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// 54537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// Note that for the optimizers to be able to take advantage of 54637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// this property, TargetInstrInfo::getExtractSubregLikeInputs has to be 54737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// override accordingly. 54837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines bool isExtractSubregLike(QueryType Type = IgnoreBundle) const { 54937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines return hasProperty(MCID::ExtractSubreg, Type); 55037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 55137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 55237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// \brief Return true if this instruction behaves 55337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// the same way as the generic INSERT_SUBREG instructions. 55437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// E.g., on ARM, 55537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// dX = VSETLNi32 dY, rZ, Imm 55637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// is equivalent to a INSERT_SUBREG: 55737ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm) 55837ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// 55937ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// Note that for the optimizers to be able to take advantage of 56037ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// this property, TargetInstrInfo::getInsertSubregLikeInputs has to be 56137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// override accordingly. 56237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines bool isInsertSubregLike(QueryType Type = IgnoreBundle) const { 56337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines return hasProperty(MCID::InsertSubreg, Type); 56437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines } 56537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 5665a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 5675a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Side Effect Analysis 5685a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 5695a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5706948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction could possibly read memory. 5715a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Instructions with this flag set are not necessarily simple load 5725a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instructions, they may load a value and modify it, for example. 57343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool mayLoad(QueryType Type = AnyInBundle) const { 574daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier if (isInlineAsm()) { 575daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); 576daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier if (ExtraInfo & InlineAsm::Extra_MayLoad) 577daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier return true; 578daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier } 579daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier return hasProperty(MCID::MayLoad, Type); 5805a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5815a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5826948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction could possibly modify memory. 5835a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Instructions with this flag set are not necessarily simple store 5845a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instructions, they may store a modified value based on their operands, or 5855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// may not actually modify anything, for example. 58643d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool mayStore(QueryType Type = AnyInBundle) const { 587daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier if (isInlineAsm()) { 588daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); 589daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier if (ExtraInfo & InlineAsm::Extra_MayStore) 590daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier return true; 591daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier } 592daeec8fad3a3038247df1e5081b74454e7ee9315Chad Rosier return hasProperty(MCID::MayStore, Type); 5935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 5945a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 5956948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction could possibly read or modify memory. 5966948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar bool mayLoadOrStore(QueryType Type = AnyInBundle) const { 5976948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar return mayLoad(Type) || mayStore(Type); 5986948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar } 5996948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 6005a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 6015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Flags that indicate whether an instruction can be modified by a method. 6025a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng //===--------------------------------------------------------------------===// 6035a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6046948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this may be a 2- or 3-address 6055a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction (of the form "X = op Y, Z, ..."), which produces the same 6065a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// result if Y and Z are exchanged. If this flag is set, then the 6075a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::commuteInstruction method may be used to hack on the 6085a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction. 6095a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 6105a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Note that this flag may be set on instructions that are only commutable 6115a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// sometimes. In these cases, the call to commuteInstruction will fail. 6125a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Also note that some instructions require non-trivial modification to 6135a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// commute them. 61443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isCommutable(QueryType Type = IgnoreBundle) const { 61543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Commutable, Type); 6165a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6175a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6186948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is a 2-address instruction 6195a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// which can be changed into a 3-address instruction if needed. Doing this 6205a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// transformation can be profitable in the register allocator, because it 6215a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// means that the instruction can use a 2-address form if possible, but 6225a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// degrade into a less efficient form if the source and dest register cannot 6235a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// be assigned to the same register. For example, this allows the x86 6245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// backend to turn a "shl reg, 3" instruction into an LEA instruction, which 6255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is the same speed as the shift but has bigger code size. 6265a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 6275a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// If this returns true, then the target must implement the 6285a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// TargetInstrInfo::convertToThreeAddress method for this instruction, which 6295a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is allowed to fail if the transformation isn't valid for this specific 6305a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// instruction (e.g. shl reg, 4 on x86). 6315a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 63243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isConvertibleTo3Addr(QueryType Type = IgnoreBundle) const { 63343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ConvertibleTo3Addr, Type); 6345a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6355a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6366948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction requires 6375a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// custom insertion support when the DAG scheduler is inserting it into a 6385a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// machine basic block. If this is true for the instruction, it basically 6395a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// means that it is a pseudo instruction used at SelectionDAG time that is 6405a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// expanded out into magic code by the target when MachineInstrs are formed. 6415a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// 6425a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method 6435a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// is used to insert this into the MachineBasicBlock. 64443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool usesCustomInsertionHook(QueryType Type = IgnoreBundle) const { 64543d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::UsesCustomInserter, Type); 6465a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6486948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction requires *adjustment* 6495a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// after instruction selection by calling a target hook. For example, this 6505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// can be used to fill in ARM 's' optional operand depending on whether 6515a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// the conditional flag register is used. 65243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasPostISelHook(QueryType Type = IgnoreBundle) const { 65343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::HasPostISelHook, Type); 6545a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6555a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6566948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this instruction is a candidate for remat. 6576948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// This flag is deprecated, please don't use it anymore. If this 6585a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// flag is set, the isReallyTriviallyReMaterializable() method is called to 6595a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// verify the instruction is really rematable. 66043d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isRematerializable(QueryType Type = AllInBundle) const { 6615a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // It's only possible to re-mat a bundle if all bundled instructions are 6625a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // re-materializable. 66343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::Rematerializable, Type); 6645a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6655a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6666948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this instruction has the same cost (or less) than a move 6676948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// instruction. This is useful during certain types of optimizations 6686948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// (e.g., remat during two-address conversion or machine licm) 6695a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// where we would like to remat or hoist the instruction, but not if it costs 6705a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// more than moving the instruction into the appropriate register. Note, we 6715a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// are not marking copies from and to the same register class with this flag. 67243d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool isAsCheapAsAMove(QueryType Type = AllInBundle) const { 6735a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng // Only returns true for a bundle if all bundled instructions are cheap. 67443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::CheapAsAMove, Type); 6755a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6765a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6776948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this instruction source operands 6785a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// have special register allocation requirements that are not captured by the 6795a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operand register classes. e.g. ARM::STRD's two source registers must be an 6805a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// even / odd pair, ARM::STM registers have to be in ascending order. 6815a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Post-register allocation passes should not attempt to change allocations 6825a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// for sources of instructions with this flag. 68343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasExtraSrcRegAllocReq(QueryType Type = AnyInBundle) const { 68443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ExtraSrcRegAllocReq, Type); 6855a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6865a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6876948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if this instruction def operands 6885a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// have special register allocation requirements that are not captured by the 6895a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// operand register classes. e.g. ARM::LDRD's two def registers must be an 6905a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// even / odd pair, ARM::LDM registers have to be in ascending order. 6915a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// Post-register allocation passes should not attempt to change allocations 6925a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng /// for definitions of instructions with this flag. 69343d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng bool hasExtraDefRegAllocReq(QueryType Type = AnyInBundle) const { 69443d5d4ca1c93529c43e78cc5aa03c4ee10a6b0d8Evan Cheng return hasProperty(MCID::ExtraDefRegAllocReq, Type); 6955a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng } 6965a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 6975a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 698506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng enum MICheckType { 699506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng CheckDefs, // Check all operands for equality 700cbc988be22bc9411d95215c8b7251b5f85710674Evan Cheng CheckKillDead, // Check all operands including kill / dead markers 701506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreDefs, // Ignore all definitions 702506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng IgnoreVRegDefs // Ignore virtual register definitions 703506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng }; 704506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng 7056948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is identical to (same 706fcfcb6cb502fd4562b57425a5802dc52f358c451Chris Lattner /// opcode and same operands as) the specified instruction. 707506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng bool isIdenticalTo(const MachineInstr *Other, 708506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng MICheckType Check = CheckDefs) const; 709a2bae305fb5a870c4ef753ed290a7ddea73ec82bVikram S. Adve 7109f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// Unlink 'this' from the containing basic block, and return it without 7119f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// deleting it. 7129f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// 7139f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// This function can not be used on bundled instructions, use 7149f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// removeFromBundle() to remove individual instructions from a bundle. 7156b560918426182d2b46b899d609911d49f6739f7Chris Lattner MachineInstr *removeFromParent(); 716108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 7179f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// Unlink this instruction from its basic block and return it without 7189f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// deleting it. 7199f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// 7209f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// If the instruction is part of a bundle, the other instructions in the 7219f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// bundle remain bundled. 7229f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen MachineInstr *removeFromBundle(); 7239f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen 7249f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// Unlink 'this' from the containing basic block and delete it. 7259f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// 7269f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// If this instruction is the header of a bundle, the whole bundle is erased. 7279f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// This function can not be used for instructions inside a bundle, use 7289f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// eraseFromBundle() to erase individual bundled instructions. 7298e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman void eraseFromParent(); 730466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 73137ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// Unlink 'this' from the containing basic block and delete it. 73237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// 73337ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// For all definitions mark their uses in DBG_VALUE nodes 73437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines /// as undefined. Otherwise like eraseFromParent(). 73537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines void eraseFromParentAndMarkDBGValuesForRemoval(); 73637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines 7379f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// Unlink 'this' form its basic block and delete it. 7389f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// 7399f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// If the instruction is part of a bundle, the other instructions in the 7409f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen /// bundle remain bundled. 7419f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen void eraseFromBundle(); 7429f4692d2953b47e9037ccfe5709a6e75de3911d4Jakob Stoklund Olesen 74336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; } 74436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; } 74536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 7466948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if the MachineInstr represents a label. 74736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isLabel() const { return isEHLabel() || isGCLabel(); } 74836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isCFIInstruction() const { 74936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return getOpcode() == TargetOpcode::CFI_INSTRUCTION; 750518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 751108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 75236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // True if the instruction represents a position in the function. 75336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isPosition() const { return isLabel() || isCFIInstruction(); } 75436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 755518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } 756818833f27929d650b4323774cd3660860588f687Adrian Prantl /// A DBG_VALUE is indirect iff the first operand is a register and 757818833f27929d650b4323774cd3660860588f687Adrian Prantl /// the second operand is an immediate. 758818833f27929d650b4323774cd3660860588f687Adrian Prantl bool isIndirectDebugValue() const { 759ad577a5c1dc325456c495f50e024711273bdf434Adrian Prantl return isDebugValue() 760818833f27929d650b4323774cd3660860588f687Adrian Prantl && getOperand(0).isReg() 761818833f27929d650b4323774cd3660860588f687Adrian Prantl && getOperand(1).isImm(); 762818833f27929d650b4323774cd3660860588f687Adrian Prantl } 763108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 764518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isPHI() const { return getOpcode() == TargetOpcode::PHI; } 765518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isKill() const { return getOpcode() == TargetOpcode::KILL; } 766518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } 767518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; } 768b56606274d43c7a3e01b18a08d1115fbf2889996Chad Rosier bool isMSInlineAsm() const { 769b56606274d43c7a3e01b18a08d1115fbf2889996Chad Rosier return getOpcode() == TargetOpcode::INLINEASM && getInlineAsmDialect(); 770b56606274d43c7a3e01b18a08d1115fbf2889996Chad Rosier } 771c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool isStackAligningInlineAsm() const; 772576cd11ab8035d4240f7e6ea8d7c6c2e45154f86Chad Rosier InlineAsm::AsmDialect getInlineAsmDialect() const; 773518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isInsertSubreg() const { 774518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::INSERT_SUBREG; 775518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 776518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner bool isSubregToReg() const { 777518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner return getOpcode() == TargetOpcode::SUBREG_TO_REG; 778518bb53485df640d7b7e3f6b0544099020c42aa7Chris Lattner } 7793d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng bool isRegSequence() const { 7803d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng return getOpcode() == TargetOpcode::REG_SEQUENCE; 7813d720fbc6ad40bc9287a420f824d244965d24631Evan Cheng } 782ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng bool isBundle() const { 783ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng return getOpcode() == TargetOpcode::BUNDLE; 784ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng } 785a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen bool isCopy() const { 786a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen return getOpcode() == TargetOpcode::COPY; 787a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen } 788cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola bool isFullCopy() const { 789cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg(); 790cfe5254cd34d9414d9f6b8aa02dc1239d71a703fRafael Espindola } 791c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines bool isExtractSubreg() const { 792c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines return getOpcode() == TargetOpcode::EXTRACT_SUBREG; 793c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines } 794a4e1ba53ddedd08669886b2849926bb33facc198Jakob Stoklund Olesen 7956948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the instruction behaves like a copy. 796273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen /// This does not include native copy instructions. 797273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen bool isCopyLike() const { 7980bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() || isSubregToReg(); 7990bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen } 8000bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen 8016948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true is the instruction is an identity copy. 8020bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen bool isIdentityCopy() const { 8030bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() && 8040bc25f40402f48ba42fc45403f635b20d90fabb3Jakob Stoklund Olesen getOperand(0).getSubReg() == getOperand(1).getSubReg(); 805273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen } 806273f7e42994a5bce0614d04d96dbfdf05fd652e5Jakob Stoklund Olesen 8076948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this is a transient instruction that is 8083f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen /// either very likely to be eliminated during register allocation (such as 8093f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen /// copy-like instructions), or if this instruction doesn't have an 8103f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen /// execution-time cost. 8113f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen bool isTransient() const { 8123f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen switch(getOpcode()) { 8133f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen default: return false; 8143f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen // Copy-like instructions are usually eliminated during register allocation. 8153f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::PHI: 8163f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::COPY: 8173f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::INSERT_SUBREG: 8183f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::SUBREG_TO_REG: 8193f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::REG_SEQUENCE: 8203f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen // Pseudo-instructions that don't produce any real output. 8213f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::IMPLICIT_DEF: 8223f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::KILL: 82336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines case TargetOpcode::CFI_INSTRUCTION: 8243f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::EH_LABEL: 8253f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::GC_LABEL: 8263f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen case TargetOpcode::DBG_VALUE: 8273f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen return true; 8283f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen } 8293f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen } 8303f63a589788995a724bc4587d022fe15ea8576baJakob Stoklund Olesen 83125377c8c6dafd094f17833f2c37daff0b77a16fcJakob Stoklund Olesen /// Return the number of instructions inside the MI bundle, excluding the 83225377c8c6dafd094f17833f2c37daff0b77a16fcJakob Stoklund Olesen /// bundle header. 83325377c8c6dafd094f17833f2c37daff0b77a16fcJakob Stoklund Olesen /// 83425377c8c6dafd094f17833f2c37daff0b77a16fcJakob Stoklund Olesen /// This is the number of instructions that MachineBasicBlock::iterator 83525377c8c6dafd094f17833f2c37daff0b77a16fcJakob Stoklund Olesen /// skips, 0 for unbundled instructions. 836ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng unsigned getBundleSize() const; 837ddfd1377d2e4154d44dc3ad217735adc15af2e3fEvan Cheng 8386948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the MachineInstr reads the specified register. 8396948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If TargetRegisterInfo is passed, then it also checks if there 8406130f66eaae89f8878590796977678afa8448926Evan Cheng /// is a read of a super-register. 8417ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// This does not count partial redefines of virtual registers as reads: 8427ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// %reg1024:6 = OP. 843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool readsRegister(unsigned Reg, 844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const { 8456130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, false, TRI) != -1; 8466130f66eaae89f8878590796977678afa8448926Evan Cheng } 8476130f66eaae89f8878590796977678afa8448926Evan Cheng 8486948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the MachineInstr reads the specified virtual register. 8496948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Take into account that a partial define is a 8507ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen /// read-modify-write operation. 85118b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen bool readsVirtualRegister(unsigned Reg) const { 85218b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen return readsWritesVirtualRegister(Reg).first; 85318b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen } 85418b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen 8556948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return a pair of bools (reads, writes) indicating if this instruction 8566948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// reads or writes Reg. This also considers partial defines. 85718b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen /// If Ops is not null, all operand indices for Reg are added. 85818b2c9d3bf5a6633535eaad8388f0353b14cbfb8Jakob Stoklund Olesen std::pair<bool,bool> readsWritesVirtualRegister(unsigned Reg, 859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<unsigned> *Ops = nullptr) const; 8607ebc4d63db05ac214d36bc01b4d60adadaf923e5Jakob Stoklund Olesen 8616948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the MachineInstr kills the specified register. 8626948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If TargetRegisterInfo is passed, then it also checks if there is 8636130f66eaae89f8878590796977678afa8448926Evan Cheng /// a kill of a super-register. 864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool killsRegister(unsigned Reg, 865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const { 8666130f66eaae89f8878590796977678afa8448926Evan Cheng return findRegisterUseOperandIdx(Reg, true, TRI) != -1; 8676130f66eaae89f8878590796977678afa8448926Evan Cheng } 8686130f66eaae89f8878590796977678afa8448926Evan Cheng 8696948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the MachineInstr fully defines the specified register. 8706948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If TargetRegisterInfo is passed, then it also checks 8716130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a def of a super-register. 8721015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool definesRegister(unsigned Reg, 874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const { 8751015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 8761015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng } 8771015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng 8786948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the MachineInstr modifies (fully define or partially 8796948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// define) the specified register. 8801015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng /// NOTE: It's ignoring subreg indices on virtual registers. 8811015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 8821015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 8836130f66eaae89f8878590796977678afa8448926Evan Cheng } 8846130f66eaae89f8878590796977678afa8448926Evan Cheng 8856948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns true if the register is dead in this machine instruction. 8866948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If TargetRegisterInfo is passed, then it also checks 8876130f66eaae89f8878590796977678afa8448926Evan Cheng /// if there is a dead def of a super-register. 8886130f66eaae89f8878590796977678afa8448926Evan Cheng bool registerDefIsDead(unsigned Reg, 889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const { 8901015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 8916130f66eaae89f8878590796977678afa8448926Evan Cheng } 8926130f66eaae89f8878590796977678afa8448926Evan Cheng 8936948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the operand index that is a use of the specific register or -1 8946948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// if it is not found. It further tightens the search criteria to a use 8956948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// that kills the register if isKill is true. 8966130f66eaae89f8878590796977678afa8448926Evan Cheng int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, 897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const; 8986130f66eaae89f8878590796977678afa8448926Evan Cheng 8996948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Wrapper for findRegisterUseOperandIdx, it returns 9006130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 9019180c8e3cfd12abd21242768db05072a209ca6e7Evan Cheng MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false, 902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) { 9036130f66eaae89f8878590796977678afa8448926Evan Cheng int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); 904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (Idx == -1) ? nullptr : &getOperand(Idx); 9056130f66eaae89f8878590796977678afa8448926Evan Cheng } 906108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 907cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar const MachineOperand *findRegisterUseOperand( 908cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar unsigned Reg, bool isKill = false, 909cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar const TargetRegisterInfo *TRI = nullptr) const { 910cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar return const_cast<MachineInstr *>(this)-> 911cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar findRegisterUseOperand(Reg, isKill, TRI); 912cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar } 913cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar 9146948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the operand index that is a def of the specified register or 9156948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// -1 if it is not found. If isDead is true, defs that are not dead are 9166948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// skipped. If Overlap is true, then it also looks for defs that merely 9176948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// overlap the specified register. If TargetRegisterInfo is non-null, 9186948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// then it also checks if there is a def of a super-register. 9191cf8b0f2a5435d8444b6cc7d4a27eef424398273Jakob Stoklund Olesen /// This may also return a register mask operand when Overlap is true. 9201015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int findRegisterDefOperandIdx(unsigned Reg, 9211015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng bool isDead = false, bool Overlap = false, 922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) const; 9236130f66eaae89f8878590796977678afa8448926Evan Cheng 9246948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Wrapper for findRegisterDefOperandIdx, it returns 9256130f66eaae89f8878590796977678afa8448926Evan Cheng /// a pointer to the MachineOperand rather than an index. 926631bd3cdf39eb099d5d5d279b17b08f119956538Evan Cheng MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = nullptr) { 9281015ba7018c87f48cc7bb45a564eb4a27241e76aEvan Cheng int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); 929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (Idx == -1) ? nullptr : &getOperand(Idx); 9306130f66eaae89f8878590796977678afa8448926Evan Cheng } 93119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 9326948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Find the index of the first operand in the 933f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// operand list that is used to represent the predicate. It returns -1 if 934f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng /// none is found. 935f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng int findFirstPredOperandIdx() const; 936108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 9376948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Find the index of the flag word operand that 9389dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// corresponds to operand OpIdx on an inline asm instruction. Returns -1 if 9399dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// getOperand(OpIdx) does not belong to an inline asm operand group. 9409dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 9419dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// If GroupNo is not NULL, it will receive the number of the operand group 9429dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// containing OpIdx. 9439dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 9449dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// The flag operand is an immediate that can be decoded with methods like 9459dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// InlineAsm::hasRegClassConstraint(). 9469dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen /// 947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = nullptr) const; 9489dfaacb696d1ad850f9f5f49a94fdb81cf8ae018Jakob Stoklund Olesen 9496948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Compute the static register class constraint for operand OpIdx. 9506948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// For normal instructions, this is derived from the MCInstrDesc. 9516948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// For inline assembly it is derived from the flag words. 952f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// 9536948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns NULL if the static register class constraint cannot be 954f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// determined. 955f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen /// 956f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetRegisterClass* 957f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen getRegClassConstraint(unsigned OpIdx, 958f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetInstrInfo *TII, 959f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen const TargetRegisterInfo *TRI) const; 960f5916976e9057177100badee7b7388bd7ba76ac3Jakob Stoklund Olesen 96136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \brief Applies the constraints (def/use) implied by this MI on \p Reg to 96236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// the given \p CurRC. 96336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// If \p ExploreBundle is set and MI is part of a bundle, all the 96436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// instructions inside the bundle will be taken into account. In other words, 9656948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// this method accumulates all the constraints of the operand of this MI and 96636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// the related bundle if MI is a bundle or inside a bundle. 96736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// 9686948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the register class that satisfies both \p CurRC and the 96936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// constraints set by MI. Returns NULL if such a register class does not 97036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// exist. 97136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// 97236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \pre CurRC must not be NULL. 97336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetRegisterClass *getRegClassConstraintEffectForVReg( 97436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned Reg, const TargetRegisterClass *CurRC, 97536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, 97636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool ExploreBundle = false) const; 97736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 97836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \brief Applies the constraints (def/use) implied by the \p OpIdx operand 97936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// to the given \p CurRC. 98036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// 9816948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Returns the register class that satisfies both \p CurRC and the 98236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// constraints set by \p OpIdx MI. Returns NULL if such a register class 98336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// does not exist. 98436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// 98536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \pre CurRC must not be NULL. 98636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \pre The operand at \p OpIdx must be a register. 98736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetRegisterClass * 98836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, 98936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetInstrInfo *TII, 99036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetRegisterInfo *TRI) const; 99136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 9926948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Add a tie between the register operands at DefIdx and UseIdx. 9936948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// The tie will cause the register allocator to ensure that the two 99494083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen /// operands are assigned the same physical register. 99594083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen /// 99694083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen /// Tied operands are managed automatically for explicit operands in the 99794083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen /// MCInstrDesc. This method is for exceptional cases like inline asm. 99894083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen void tieOperands(unsigned DefIdx, unsigned UseIdx); 99994083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen 10006948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Given the index of a tied register operand, find the 1001699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen /// operand it is tied to. Defs are tied to uses and vice versa. Returns the 1002699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen /// index of the tied operand which must exist. 1003699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen unsigned findTiedOperandIdx(unsigned OpIdx) const; 1004699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen 10056948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Given the index of a register def operand, 1006d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// check if the register def is tied to a source operand, due to either 1007d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson /// two-address elimination or inline assembly constraints. Returns the 1008a21bb20f5943f5f4c66d4727784c26007db2470cJim Grosbach /// first tied use operand index by reference if UseOpIdx is not null. 1009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isRegTiedToUseOperand(unsigned DefOpIdx, 1010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned *UseOpIdx = nullptr) const { 101199c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen const MachineOperand &MO = getOperand(DefOpIdx); 101299c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen if (!MO.isReg() || !MO.isDef() || !MO.isTied()) 101399c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen return false; 101499c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen if (UseOpIdx) 101599c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen *UseOpIdx = findTiedOperandIdx(DefOpIdx); 101699c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen return true; 101799c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen } 101832dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 10196948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if the use operand of the specified index is tied to a def 10206948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// operand. It also returns the def operand index by reference if DefOpIdx 10216948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// is not null. 1022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isRegTiedToDefOperand(unsigned UseOpIdx, 1023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned *DefOpIdx = nullptr) const { 102499c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen const MachineOperand &MO = getOperand(UseOpIdx); 102599c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen if (!MO.isReg() || !MO.isUse() || !MO.isTied()) 102699c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen return false; 102799c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen if (DefOpIdx) 102899c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen *DefOpIdx = findTiedOperandIdx(UseOpIdx); 102999c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen return true; 103099c416c9f7e8a9d7d1038d03cafebec730280398Jakob Stoklund Olesen } 1031a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng 10326948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Clears kill flags on all operands. 1033e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman void clearKillInfo(); 1034e6cd757e6800b9b94a6459ec148c0624c4f2e3c1Dan Gohman 10356948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Replace all occurrences of FromReg with ToReg:SubIdx, 10369edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen /// properly composing subreg indices where necessary. 10379edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, 10389edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &RegInfo); 10399edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen 10406948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// We have determined MI kills a register. Look for the 1041b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, 1042b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// add a implicit operand if it's not found. Returns true if the operand 1043b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// exists / is added. 10446f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman bool addRegisterKilled(unsigned IncomingReg, 10456f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 1046b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 10478efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 10486948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Clear all kill flags affecting Reg. If RegInfo is 10491a96c914315b0286d84c507d696484e2c95875a4Jakob Stoklund Olesen /// provided, this includes super-register kills. 10501a96c914315b0286d84c507d696484e2c95875a4Jakob Stoklund Olesen void clearRegisterKills(unsigned Reg, const TargetRegisterInfo *RegInfo); 10511a96c914315b0286d84c507d696484e2c95875a4Jakob Stoklund Olesen 10526948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// We have determined MI defined a register without a use. 1053b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// Look for the operand that defines it and mark it as IsDead. If 1054b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// AddIfNotFound is true, add a implicit operand if it's not found. Returns 1055b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson /// true if the operand exists / is added. 10564afb5f560d2c3171eda8be6ae64998080dddec0cMatthias Braun bool addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, 1057b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound = false); 1058b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 1059ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines /// Clear all dead flags on operands defining register @p Reg. 1060ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines void clearRegisterDeads(unsigned Reg); 1061ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 1062ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines /// Mark all subregister defs of register @p Reg with the undef flag. 1063ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines /// This function is used when we determined to have a subregister def in an 1064ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines /// otherwise undefined super register. 1065cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar void setRegisterDefReadUndef(unsigned Reg, bool IsUndef = true); 1066ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines 10676948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// We have determined MI defines a register. Make sure there is an operand 10686948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// defining Reg. 1069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void addRegisterDefined(unsigned Reg, 1070dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *RegInfo = nullptr); 10718efadf94b568c08de3ff8ce35fd904a935387406Jakob Stoklund Olesen 10726948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Mark every physreg used by this instruction as 10732a09f878ef64f216268df3dbe2f51b949f18c145Jim Grosbach /// dead except those in the UsedRegs list. 107477180e0b402fff318cffd89a2251e46b3dce4064Jakob Stoklund Olesen /// 107577180e0b402fff318cffd89a2251e46b3dce4064Jakob Stoklund Olesen /// On instructions with register mask operands, also add implicit-def 107677180e0b402fff318cffd89a2251e46b3dce4064Jakob Stoklund Olesen /// operands for all registers in UsedRegs. 1077a37818dbb119bda75273f16b8484732e742cdbb7Jakob Stoklund Olesen void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs, 1078db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman const TargetRegisterInfo &TRI); 1079db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman 10806948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if it is safe to move this instruction. If 10819f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// SawStore is set to true, it means that there is a store (or call) between 10829f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng /// the instruction's location and its intended destination. 10836948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar bool isSafeToMove(AliasAnalysis *AA, bool &SawStore) const; 1084b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 10856948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction may have an ordered 1086f036f7a1e79910bf5b5b6f37d2e512b4f01155a0Jakob Stoklund Olesen /// or volatile memory reference, or if the information describing the memory 1087f036f7a1e79910bf5b5b6f37d2e512b4f01155a0Jakob Stoklund Olesen /// reference is not available. Return false if it is known to have no 1088f036f7a1e79910bf5b5b6f37d2e512b4f01155a0Jakob Stoklund Olesen /// ordered or volatile memory references. 1089f036f7a1e79910bf5b5b6f37d2e512b4f01155a0Jakob Stoklund Olesen bool hasOrderedMemoryRef() const; 10903e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 10916948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction is loading from a 1092e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// location whose value is invariant across the function. For example, 1093f451cb870efcf9e0302d25ed05f4cac6bb494e42Dan Gohman /// loading a value from the constant pool or from the argument area of 1094e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// a function if it does not change. This should only return true of *all* 1095e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman /// loads the instruction does are invariant (if it does multiple loads). 1096a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman bool isInvariantLoad(AliasAnalysis *AA) const; 1097e33f44cfc547359bc28526e4c5e1852b600b4448Dan Gohman 10986948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If the specified instruction is a PHI that always merges together the 10996948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// same virtual register, return the register, otherwise return 0. 1100229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng unsigned isConstantValuePHI() const; 1101229694f0ee630ceabe96a8bd48952f6740f928b2Evan Cheng 11026948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if this instruction has side effects that are not modeled 11036948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// by mayLoad / mayStore, etc. 1104e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// For all instructions, the property is encoded in MCInstrDesc::Flags 1105e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng /// (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is 1106c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// INLINEASM instruction, in which case the side effect property is encoded 1107c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// in one of its operands (see InlineAsm::Extra_HasSideEffect). 1108c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng /// 1109c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng bool hasUnmodeledSideEffects() const; 1110c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng 1111cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Returns true if it is illegal to fold a load across this instruction. 1112cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar bool isLoadFoldBarrier() const; 1113cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar 11146948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Return true if all the defs of this instruction are dead. 1115a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng bool allDefsAreDead() const; 1116a57fabe815ccf016eead526eb3ef475f116ab155Evan Cheng 11176948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Copy implicit register operands from specified 1118b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng /// instruction to this instruction. 1119be06aacaa9a270384599bbfa850b967e9996b9fbJakob Stoklund Olesen void copyImplicitOps(MachineFunction &MF, const MachineInstr *MI); 1120b179b46cc558c720d23a066c768bad71f975eb93Evan Cheng 1121a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // 1122a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve // Debugging support 1123fa78fbf446b505767e838f9c188707183c57fc9cChris Lattner // 11244c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar void print(raw_ostream &OS, bool SkipOpers = false) const; 1125cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar void print(raw_ostream &OS, ModuleSlotTracker &MST, 1126cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar bool SkipOpers = false) const; 1127572f5c8c0cf66cd6f53dda255cd8c4d8f27d8505Chris Lattner void dump() const; 11282f898d207466bf233b55607e404baca302bc7b5eChris Lattner 1129413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner //===--------------------------------------------------------------------===// 113062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Accessors used to build up machine instructions. 11317ad6be7b01a902f532eebb607306f7b3f4627718Chris Lattner 113256706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// Add the specified operand to the instruction. If it is an implicit 113356706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// operand, it is added to the end of the operand list. If it is an 113456706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// explicit operand it is added at the end of the explicit operand list 1135108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach /// (before the first implicit operand). 113656706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// 113756706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// MF must be the machine function that was used to allocate this 113856706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// instruction. 113956706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// 114056706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// MachineInstrBuilder provides a more convenient interface for creating 114156706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// instructions and adding operands. 114256706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen void addOperand(MachineFunction &MF, const MachineOperand &Op); 1143108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 114456706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// Add an operand without providing an MF reference. This only works for 114556706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// instructions that are inserted in a basic block. 114656706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// 114756706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// MachineInstrBuilder and the two-argument addOperand(MF, MO) should be 114856706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen /// preferred. 114956706db45bbc7be0c087451ca9f1d258324df4b2Jakob Stoklund Olesen void addOperand(const MachineOperand &Op); 1150433cb080bac56b4fac56f7625e07e17b4824ce8aJakob Stoklund Olesen 11516948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Replace the instruction descriptor (thus opcode) of 115267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng /// the current instruction with a new one. 1153e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng void setDesc(const MCInstrDesc &tid) { MCID = &tid; } 11543c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner 11556948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Replace current source information with new such. 1156ab160cf371d6148d49b5401a903dd4ce381b2f8cDale Johannesen /// Avoid using this, the constructor argument is preferable. 1157ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines void setDebugLoc(DebugLoc dl) { 1158ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines debugLoc = std::move(dl); 1159ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor"); 1160ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines } 116106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 11626948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Erase an operand from an instruction, leaving it with one 11633c8cbe6567c94fdd24ec9b2b8b5c5cc1b01a8c58Chris Lattner /// fewer operand than it started with. 116462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner void RemoveOperand(unsigned i); 116562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 11666948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Add a MachineMemOperand to the machine instruction. 1167c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// This function should be used only occasionally. The setMemRefs function 1168c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman /// is the primary method for setting up a MachineInstr's MemRefs list. 1169c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void addMemOperand(MachineFunction &MF, MachineMemOperand *MO); 11708e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 11716948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Assign this MachineInstr's memory reference descriptor list. 11726948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// This does not transfer ownership. 1173c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) { 1174c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman MemRefs = NewMemRefs; 1175b2c79f2f630ed3e7da31ff8adb3014fb0ab47412Jakob Stoklund Olesen NumMemRefs = uint8_t(NewMemRefsEnd - NewMemRefs); 1176b2c79f2f630ed3e7da31ff8adb3014fb0ab47412Jakob Stoklund Olesen assert(NumMemRefs == NewMemRefsEnd - NewMemRefs && "Too many memrefs"); 1177c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman } 117869de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 11796948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Clear this MachineInstr's memory reference descriptor list. 11804c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar void clearMemRefs() { 11814c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar MemRefs = nullptr; 11824c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar NumMemRefs = 0; 11834c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar } 11844c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar 11856948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Break any tie involving OpIdx. 1186699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen void untieRegOperand(unsigned OpIdx) { 118794083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen MachineOperand &MO = getOperand(OpIdx); 118894083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen if (MO.isReg() && MO.isTied()) { 1189c8ecb401caefc5fb97b20041544d8da5d8e2f830Jakob Stoklund Olesen getOperand(findTiedOperandIdx(OpIdx)).TiedTo = 0; 1190c8ecb401caefc5fb97b20041544d8da5d8e2f830Jakob Stoklund Olesen MO.TiedTo = 0; 119194083149fd6891c8a72472cf1814fa6600a75979Jakob Stoklund Olesen } 1192699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen } 1193699ac049517285d978ed607b2735976c5ae97ac0Jakob Stoklund Olesen 1194cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar /// Add all implicit def and use operands to this instruction. 1195cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar void addImplicitDefUseOperands(MachineFunction &MF); 11966948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 11976948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainarprivate: 11986948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// If this instruction is embedded into a MachineFunction, return the 11996948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// MachineRegisterInfo object for the current function, otherwise 12006948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// return null. 12016948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar MachineRegisterInfo *getRegInfo(); 12026948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar 12036948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Unlink all of the register operands in this instruction from their 12046948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// respective use lists. This requires that the operands already be on their 12056948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// use lists. 1206ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen void RemoveRegOperandsFromUseLists(MachineRegisterInfo&); 1207108e4dbecb690056e678da2f15c56ef7220f9ec9Jim Grosbach 12086948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Add all of the register operands in this instruction from their 12096948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// respective use lists. This requires that the operands not be on their 12106948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// use lists yet. 1211ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen void AddRegOperandsToUseLists(MachineRegisterInfo&); 121285f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer 12136948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar /// Slow path for hasProperty when we're dealing with a bundle. 121485f9cef27e6b2605e67e94afc949f5b5f5b90668Benjamin Kramer bool hasPropertyInBundle(unsigned Mask, QueryType Type) const; 121536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 121636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \brief Implements the logic of getRegClassConstraintEffectForVReg for the 121736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// this MI and the given operand index \p OpIdx. 121836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// If the related operand does not constrained Reg, this returns CurRC. 121936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetRegisterClass *getRegClassConstraintEffectForVRegImpl( 122036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, 122136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const; 1222a995e6086deca9cbd9aab9d6e1e94b36964b66daVikram S. Adve}; 122323ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve 12246948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar/// Special DenseMapInfo traits to compare MachineInstr* by *value* of the 12256948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar/// instruction rather than by pointer value. 122605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// The hashing and equality testing functions ignore definitions so this is 122705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng/// useful for CSE, etc. 122805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Chengstruct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> { 122905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getEmptyKey() { 1230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return nullptr; 123105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 123205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 123305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static inline MachineInstr *getTombstoneKey() { 123405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return reinterpret_cast<MachineInstr*>(-1); 123505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 123605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 123767eaa08f2b71aa8aec8cdf4c7d970db4cad58adaEvan Cheng static unsigned getHashValue(const MachineInstr* const &MI); 123805bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 123905bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng static bool isEqual(const MachineInstr* const &LHS, 124005bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng const MachineInstr* const &RHS) { 124105bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng if (RHS == getEmptyKey() || RHS == getTombstoneKey() || 124205bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng LHS == getEmptyKey() || LHS == getTombstoneKey()) 124305bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS == RHS; 124405bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng return LHS->isIdenticalTo(RHS, MachineInstr::IgnoreVRegDefs); 124505bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng } 124605bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng}; 124705bdcbb1ae48d1d1209173d137d11c35f46abff3Evan Cheng 1248b05497e0ca1ba2e7f57b792cc160e5d1c8579582Chris Lattner//===----------------------------------------------------------------------===// 1249593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve// Debugging Support 1250593da4acc56d4c591ad688e6605b04d0825c867eVikram S. Adve 1251cb3718832375a581c5ea23f15918f3ea447a446cOwen Andersoninline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) { 1252cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson MI.print(OS); 1253cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson return OS; 1254cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson} 1255cb3718832375a581c5ea23f15918f3ea447a446cOwen Anderson 1256d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 1257d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 125823ee550765232e22d0daf6407141ecef4c55c06fVikram S. Adve#endif 1259