1@/*
2@ ** Copyright 2003-2010, VisualOn, Inc.
3@ **
4@ ** Licensed under the Apache License, Version 2.0 (the "License");
5@ ** you may not use this file except in compliance with the License.
6@ ** You may obtain a copy of the License at
7@ **
8@ **     http://www.apache.org/licenses/LICENSE-2.0
9@ **
10@ ** Unless required by applicable law or agreed to in writing, software
11@ ** distributed under the License is distributed on an "AS IS" BASIS,
12@ ** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13@ ** See the License for the specific language governing permissions and
14@ ** limitations under the License.
15@ */
16@
17@void Residu (
18@    Word16 a[], /* (i)     : prediction coefficients                      */
19@    Word16 x[], /* (i)     : speech signal                                */
20@    Word16 y[], /* (o)     : residual signal                              */
21@    Word16 lg   /* (i)     : size of filtering                            */
22@)
23@a[]        RN     r0
24@x[]        RN     r1
25@y[]        RN     r2
26@lg         RN     r3
27
28	.section   .text
29        .global    Residu_opt
30
31Residu_opt:
32
33        STMFD          r13!, {r4 - r12, r14}
34        SUB            r7, r3, #4                       @i = lg - 4
35
36        VLD1.S16       {D0, D1, D2, D3}, [r0]!              @get all a[]
37	VLD1.S16       {D4}, [r0]!
38        VMOV.S32       Q8,  #0x8000
39
40LOOP1:
41        ADD            r9, r1, r7, LSL #1               @copy the address
42        ADD            r10, r2, r7, LSL #1
43        MOV            r8, r9
44        VLD1.S16       D5, [r8]!                       @get x[i], x[i+1], x[i+2], x[i+3]
45        VQDMULL.S16    Q10, D5, D0[0]                  @finish the first L_mult
46
47        SUB            r8, r9, #2                       @get the x[i-1] address
48        VLD1.S16       D5, [r8]!
49        VQDMLAL.S16    Q10, D5, D0[1]
50
51        SUB            r8, r9, #4                       @load the x[i-2] address
52        VLD1.S16       D5, [r8]!
53        VQDMLAL.S16    Q10, D5, D0[2]
54
55        SUB            r8, r9, #6                       @load the x[i-3] address
56        VLD1.S16       D5, [r8]!
57        VQDMLAL.S16    Q10, D5, D0[3]
58
59        SUB            r8, r9, #8                       @load the x[i-4] address
60        VLD1.S16       D5, [r8]!
61        VQDMLAL.S16    Q10, D5, D1[0]
62
63        SUB            r8, r9, #10                      @load the x[i-5] address
64        VLD1.S16       D5, [r8]!
65        VQDMLAL.S16    Q10, D5, D1[1]
66
67        SUB            r8, r9, #12                      @load the x[i-6] address
68        VLD1.S16       D5, [r8]!
69        VQDMLAL.S16    Q10, D5, D1[2]
70
71        SUB            r8, r9, #14                      @load the x[i-7] address
72        VLD1.S16       D5, [r8]!
73        VQDMLAL.S16    Q10, D5, D1[3]
74
75        SUB            r8, r9, #16                      @load the x[i-8] address
76        VLD1.S16       D5, [r8]!
77        VQDMLAL.S16    Q10, D5, D2[0]
78
79        SUB            r8, r9, #18                      @load the x[i-9] address
80        VLD1.S16       D5, [r8]!
81        VQDMLAL.S16    Q10, D5, D2[1]
82
83        SUB            r8, r9, #20                      @load the x[i-10] address
84        VLD1.S16       D5, [r8]!
85        VQDMLAL.S16    Q10, D5, D2[2]
86
87	SUB            r8, r9, #22                      @load the x[i-11] address
88	VLD1.S16       D5, [r8]!
89	VQDMLAL.S16    Q10, D5, D2[3]
90
91	SUB            r8, r9, #24                      @load the x[i-12] address
92	VLD1.S16       D5, [r8]!
93	VQDMLAL.S16    Q10, D5, D3[0]
94
95	SUB            r8, r9, #26                      @load the x[i-13] address
96	VLD1.S16       D5, [r8]!
97	VQDMLAL.S16    Q10, D5, D3[1]
98
99	SUB            r8, r9, #28                      @load the x[i-14] address
100	VLD1.S16       D5, [r8]!
101	VQDMLAL.S16    Q10, D5, D3[2]
102
103	SUB            r8, r9, #30                      @load the x[i-15] address
104	VLD1.S16       D5, [r8]!
105	VQDMLAL.S16    Q10, D5, D3[3]
106
107	SUB            r8, r9, #32                      @load the x[i-16] address
108	VLD1.S16       D5, [r8]!
109	VQDMLAL.S16    Q10, D5, D4[0]
110
111        SUB            r7, r7, #4                       @i-=4
112        VQSHL.S32      Q10, Q10, #4
113        VQADD.S32      Q10, Q10, Q8
114        VSHRN.S32      D5, Q10, #16
115        VST1.S16       D5, [r10]!
116        CMP            r7,  #0
117
118        BGE            LOOP1
119
120Residu_asm_end:
121
122        LDMFD      r13!, {r4 - r12, r15}
123
124        @ENDFUNC
125        .end
126
127
128