1/*
2 *
3 *  Copyright (c) 2013, The Linux Foundation. All rights reserved.
4 *  Not a Contribution.
5 *
6 *  Copyright 2012 The Android Open Source Project
7 *
8 *  Licensed under the Apache License, Version 2.0 (the "License"); you
9 *  may not use this file except in compliance with the License. You may
10 *  obtain a copy of the License at
11 *
12 *  http://www.apache.org/licenses/LICENSE-2.0
13 *
14 *  Unless required by applicable law or agreed to in writing, software
15 *  distributed under the License is distributed on an "AS IS" BASIS,
16 *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
17 *  implied. See the License for the specific language governing
18 *  permissions and limitations under the License.
19 *
20 */
21
22/******************************************************************************
23 *
24 *  Filename:      hw_ar3k.c
25 *
26 *  Description:   Contains controller-specific functions, like
27 *                      firmware patch download
28 *                      low power mode operations
29 *
30 ******************************************************************************/
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#define LOG_TAG "bt_vendor"
36
37#include <sys/socket.h>
38#include <utils/Log.h>
39#include <sys/types.h>
40#include <sys/stat.h>
41#include <signal.h>
42#include <time.h>
43#include <errno.h>
44#include <fcntl.h>
45#include <dirent.h>
46#include <ctype.h>
47#include <cutils/properties.h>
48#include <stdlib.h>
49#include <string.h>
50#include <termios.h>
51
52#include "bt_hci_bdroid.h"
53#include "hci_uart.h"
54#include "hw_ar3k.h"
55
56/******************************************************************************
57**  Variables
58******************************************************************************/
59int cbstat = 0;
60#define PATCH_LOC_STRING_LEN   8
61char ARbyte[3];
62char ARptr[MAX_PATCH_CMD + 1];
63int byte_cnt;
64int patch_count = 0;
65char patch_loc[PATCH_LOC_STRING_LEN + 1];
66int PSCounter=0;
67
68uint32_t dev_type = 0;
69uint32_t rom_version = 0;
70uint32_t build_version = 0;
71
72char patch_file[PATH_MAX];
73char ps_file[PATH_MAX];
74FILE *stream;
75int tag_count=0;
76
77/* for friendly debugging outpout string */
78static char *lpm_mode[] = {
79    "UNKNOWN",
80    "disabled",
81    "enabled"
82};
83
84static char *lpm_state[] = {
85    "UNKNOWN",
86    "de-asserted",
87    "asserted"
88};
89
90static uint8_t upio_state[UPIO_MAX_COUNT];
91struct ps_cfg_entry ps_list[MAX_TAGS];
92
93#define PS_EVENT_LEN 100
94
95#ifdef __cplusplus
96}
97#endif
98
99/*****************************************************************************
100**   Functions
101*****************************************************************************/
102
103int is_bt_soc_ath() {
104    int ret = 0;
105    char bt_soc_type[PROPERTY_VALUE_MAX];
106    ret = property_get("qcom.bluetooth.soc", bt_soc_type, NULL);
107    if (ret != 0) {
108        ALOGI("qcom.bluetooth.soc set to %s\n", bt_soc_type);
109        if (!strncasecmp(bt_soc_type, "ath3k", sizeof("ath3k")))
110            return 1;
111    } else {
112        ALOGI("qcom.bluetooth.soc not set, so using default.\n");
113    }
114
115    return 0;
116}
117
118/*
119 * Send HCI command and wait for command complete event.
120 * The event buffer has to be freed by the caller.
121 */
122
123static int send_hci_cmd_sync(int dev, uint8_t *cmd, int len, uint8_t **event)
124{
125    int err;
126    uint8_t *hci_event;
127    uint8_t pkt_type = HCI_COMMAND_PKT;
128
129    if (len == 0)
130    return len;
131
132    if (write(dev, &pkt_type, 1) != 1)
133        return -EILSEQ;
134    if (write(dev, (unsigned char *)cmd, len) != len)
135        return -EILSEQ;
136
137    hci_event = (uint8_t *)malloc(PS_EVENT_LEN);
138    if (!hci_event)
139        return -ENOMEM;
140
141    err = read_hci_event(dev, (unsigned char *)hci_event, PS_EVENT_LEN);
142    if (err > 0) {
143        *event = hci_event;
144    } else {
145        free(hci_event);
146        return -EILSEQ;
147    }
148
149    return len;
150}
151
152static void convert_bdaddr(char *str_bdaddr, char *bdaddr)
153{
154    char bdbyte[3];
155    char *str_byte = str_bdaddr;
156    int i, j;
157    int colon_present = 0;
158
159    if (strstr(str_bdaddr, ":"))
160        colon_present = 1;
161
162    bdbyte[2] = '\0';
163
164    /* Reverse the BDADDR to LSB first */
165    for (i = 0, j = 5; i < 6; i++, j--) {
166        bdbyte[0] = str_byte[0];
167        bdbyte[1] = str_byte[1];
168        bdaddr[j] = strtol(bdbyte, NULL, 16);
169
170        if (colon_present == 1)
171            str_byte += 3;
172        else
173            str_byte += 2;
174    }
175}
176
177static int uart_speed(int s)
178{
179    switch (s) {
180        case 9600:
181            return B9600;
182        case 19200:
183            return B19200;
184        case 38400:
185            return B38400;
186        case 57600:
187            return B57600;
188        case 115200:
189            return B115200;
190        case 230400:
191            return B230400;
192        case 460800:
193            return B460800;
194        case 500000:
195            return B500000;
196        case 576000:
197            return B576000;
198        case 921600:
199            return B921600;
200        case 1000000:
201            return B1000000;
202        case 1152000:
203            return B1152000;
204        case 1500000:
205            return B1500000;
206        case 2000000:
207            return B2000000;
208#ifdef B2500000
209        case 2500000:
210            return B2500000;
211#endif
212#ifdef B3000000
213        case 3000000:
214            return B3000000;
215#endif
216#ifdef B3500000
217        case 3500000:
218            return B3500000;
219#endif
220#ifdef B4000000
221        case 4000000:
222            return B4000000;
223#endif
224        default:
225            return B57600;
226    }
227}
228
229int set_speed(int fd, struct termios *ti, int speed)
230{
231    if (cfsetospeed(ti, uart_speed(speed)) < 0)
232        return -errno;
233
234    if (cfsetispeed(ti, uart_speed(speed)) < 0)
235        return -errno;
236
237    if (tcsetattr(fd, TCSANOW, ti) < 0)
238        return -errno;
239
240    return 0;
241}
242
243static void load_hci_ps_hdr(uint8_t *cmd, uint8_t ps_op, int len, int index)
244{
245    hci_command_hdr *ch = (void *)cmd;
246
247    ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
248        HCI_PS_CMD_OCF));
249    ch->plen = len + PS_HDR_LEN;
250    cmd += HCI_COMMAND_HDR_SIZE;
251
252    cmd[0] = ps_op;
253    cmd[1] = index;
254    cmd[2] = index >> 8;
255    cmd[3] = len;
256}
257
258
259static int read_ps_event(uint8_t *event, uint16_t ocf)
260{
261    hci_event_hdr *eh;
262    uint16_t opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, ocf));
263
264    event++;
265
266    eh = (void *)event;
267    event += HCI_EVENT_HDR_SIZE;
268
269    if (eh->evt == EVT_CMD_COMPLETE) {
270        evt_cmd_complete *cc = (void *)event;
271
272        event += EVT_CMD_COMPLETE_SIZE;
273
274        if (cc->opcode == opcode && event[0] == HCI_EV_SUCCESS)
275            return 0;
276        else
277            return -EILSEQ;
278    }
279
280    return -EILSEQ;
281}
282
283#define PS_WRITE           1
284#define PS_RESET           2
285#define WRITE_PATCH        8
286#define ENABLE_PATCH       11
287
288#define HCI_PS_CMD_HDR_LEN 7
289
290static int write_cmd(int fd, uint8_t *buffer, int len)
291{
292    uint8_t *event;
293    int err;
294
295    err = send_hci_cmd_sync(fd, buffer, len, &event);
296    if (err < 0)
297        return err;
298
299    err = read_ps_event(event, HCI_PS_CMD_OCF);
300
301    free(event);
302
303    return err;
304}
305
306#define PS_RESET_PARAM_LEN 6
307#define PS_RESET_CMD_LEN   (HCI_PS_CMD_HDR_LEN + PS_RESET_PARAM_LEN)
308
309#define PS_ID_MASK         0xFF
310
311/* Sends PS commands using vendor specficic HCI commands */
312static int write_ps_cmd(int fd, uint8_t opcode, uint32_t ps_param)
313{
314    uint8_t cmd[HCI_MAX_CMD_SIZE];
315    uint32_t i;
316
317    switch (opcode) {
318        case ENABLE_PATCH:
319            load_hci_ps_hdr(cmd, opcode, 0, 0x00);
320
321            if (write_cmd(fd, cmd, HCI_PS_CMD_HDR_LEN) < 0)
322                return -EILSEQ;
323            break;
324
325        case PS_RESET:
326            load_hci_ps_hdr(cmd, opcode, PS_RESET_PARAM_LEN, 0x00);
327
328            cmd[7] = 0x00;
329            cmd[PS_RESET_CMD_LEN - 2] = ps_param & PS_ID_MASK;
330            cmd[PS_RESET_CMD_LEN - 1] = (ps_param >> 8) & PS_ID_MASK;
331
332            if (write_cmd(fd, cmd, PS_RESET_CMD_LEN) < 0)
333                return -EILSEQ;
334            break;
335
336        case PS_WRITE:
337            for (i = 0; i < ps_param; i++) {
338                load_hci_ps_hdr(cmd, opcode, ps_list[i].len,
339                ps_list[i].id);
340
341                memcpy(&cmd[HCI_PS_CMD_HDR_LEN], ps_list[i].data,
342                ps_list[i].len);
343
344                if (write_cmd(fd, cmd, ps_list[i].len +
345                    HCI_PS_CMD_HDR_LEN) < 0)
346                    return -EILSEQ;
347            }
348            break;
349    }
350
351    return 0;
352}
353
354#define PS_ASIC_FILE    "PS_ASIC.pst"
355#define PS_FPGA_FILE    "PS_FPGA.pst"
356#define MAXPATHLEN  4096
357static void get_ps_file_name(uint32_t devtype, uint32_t rom_version,char *path)
358{
359    char *filename;
360
361    if (devtype == 0xdeadc0de)
362        filename = PS_ASIC_FILE;
363    else
364        filename = PS_FPGA_FILE;
365
366    snprintf(path, MAXPATHLEN, "%s%x/%s", FW_PATH, rom_version, filename);
367}
368
369#define PATCH_FILE        "RamPatch.txt"
370#define FPGA_ROM_VERSION  0x99999999
371#define ROM_DEV_TYPE      0xdeadc0de
372
373static void get_patch_file_name(uint32_t dev_type, uint32_t rom_version,
374    uint32_t build_version, char *path)
375{
376    if (rom_version == FPGA_ROM_VERSION && dev_type != ROM_DEV_TYPE
377            &&dev_type != 0 && build_version == 1)
378        path[0] = '\0';
379    else
380        snprintf(path, MAXPATHLEN, "%s%x/%s", FW_PATH, rom_version, PATCH_FILE);
381}
382
383static int set_cntrlr_baud(int fd, int speed)
384{
385    int baud;
386    struct timespec tm = { 0, 500000};
387    unsigned char cmd[MAX_CMD_LEN], rsp[HCI_MAX_EVENT_SIZE];
388    unsigned char *ptr = cmd + 1;
389    hci_command_hdr *ch = (void *)ptr;
390
391    cmd[0] = HCI_COMMAND_PKT;
392
393    /* set controller baud rate to user specified value */
394    ptr = cmd + 1;
395    ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
396    HCI_CHG_BAUD_CMD_OCF));
397    ch->plen = 2;
398    ptr += HCI_COMMAND_HDR_SIZE;
399
400    baud = speed/100;
401    ptr[0] = (char)baud;
402    ptr[1] = (char)(baud >> 8);
403
404    if (write(fd, cmd, WRITE_BAUD_CMD_LEN) != WRITE_BAUD_CMD_LEN) {
405        ALOGI("Failed to write change baud rate command");
406        return -ETIMEDOUT;
407    }
408
409    nanosleep(&tm, NULL);
410
411    if (read_hci_event(fd, rsp, sizeof(rsp)) < 0)
412        return -ETIMEDOUT;
413
414    return 0;
415}
416
417#define PS_UNDEF   0
418#define PS_ID      1
419#define PS_LEN     2
420#define PS_DATA    3
421
422#define PS_MAX_LEN         500
423#define LINE_SIZE_MAX      (PS_MAX_LEN * 2)
424#define ENTRY_PER_LINE     16
425
426#define __check_comment(buf) (((buf)[0] == '/') && ((buf)[1] == '/'))
427#define __skip_space(str)      while (*(str) == ' ') ((str)++)
428
429
430#define __is_delim(ch) ((ch) == ':')
431#define MAX_PREAMBLE_LEN 4
432
433/* Parse PS entry preamble of format [X:X] for main type and subtype */
434static int get_ps_type(char *ptr, int index, char *type, char *sub_type)
435{
436    int i;
437    int delim = FALSE;
438
439    if (index > MAX_PREAMBLE_LEN)
440        return -EILSEQ;
441
442    for (i = 1; i < index; i++) {
443        if (__is_delim(ptr[i])) {
444            delim = TRUE;
445            continue;
446        }
447
448        if (isalpha(ptr[i])) {
449            if (delim == FALSE)
450                (*type) = toupper(ptr[i]);
451            else
452                (*sub_type)	= toupper(ptr[i]);
453        }
454    }
455
456    return 0;
457}
458
459#define ARRAY   'A'
460#define STRING  'S'
461#define DECIMAL 'D'
462#define BINARY  'B'
463
464#define PS_HEX           0
465#define PS_DEC           1
466
467static int get_input_format(char *buf, struct ps_entry_type *format)
468{
469    char *ptr = NULL;
470    char type = '\0';
471    char sub_type = '\0';
472
473    format->type = PS_HEX;
474    format->array = TRUE;
475
476    if (strstr(buf, "[") != buf)
477        return 0;
478
479    ptr = strstr(buf, "]");
480    if (!ptr)
481        return -EILSEQ;
482
483    if (get_ps_type(buf, ptr - buf, &type, &sub_type) < 0)
484        return -EILSEQ;
485
486    /* Check is data type is of array */
487    if (type == ARRAY || sub_type == ARRAY)
488        format->array = TRUE;
489
490    if (type == STRING || sub_type == STRING)
491        format->array = FALSE;
492
493    if (type == DECIMAL || type == BINARY)
494        format->type = PS_DEC;
495    else
496        format->type = PS_HEX;
497
498    return 0;
499}
500
501
502
503#define UNDEFINED 0xFFFF
504
505static unsigned int read_data_in_section(char *buf, struct ps_entry_type type)
506{
507    char *ptr = buf;
508
509    if (!buf)
510        return UNDEFINED;
511
512    if (buf == strstr(buf, "[")) {
513        ptr = strstr(buf, "]");
514        if (!ptr)
515            return UNDEFINED;
516
517        ptr++;
518    }
519
520    if (type.type == PS_HEX && type.array != TRUE)
521        return strtol(ptr, NULL, 16);
522
523    return UNDEFINED;
524}
525
526
527/* Read PS entries as string, convert and add to Hex array */
528static void update_tag_data(struct ps_cfg_entry *tag,
529    struct tag_info *info, const char *ptr)
530{
531    char buf[3];
532
533    buf[2] = '\0';
534
535    strlcpy(buf, &ptr[info->char_cnt],sizeof(buf));
536    tag->data[info->byte_count] = strtol(buf, NULL, 16);
537    info->char_cnt += 3;
538    info->byte_count++;
539
540    strlcpy(buf, &ptr[info->char_cnt], sizeof(buf));
541    tag->data[info->byte_count] = strtol(buf, NULL, 16);
542    info->char_cnt += 3;
543    info->byte_count++;
544}
545
546static inline int update_char_count(const char *buf)
547{
548    char *end_ptr;
549
550    if (strstr(buf, "[") == buf) {
551        end_ptr = strstr(buf, "]");
552        if (!end_ptr)
553            return 0;
554        else
555            return(end_ptr - buf) +	1;
556    }
557
558    return 0;
559}
560
561#define PS_HEX           0
562#define PS_DEC           1
563
564static int ath_parse_ps(FILE *stream)
565{
566    char buf[LINE_SIZE_MAX + 1];
567    char *ptr;
568    uint8_t tag_cnt = 0;
569    int16_t byte_count = 0;
570    struct ps_entry_type format;
571    struct tag_info status = { 0, 0, 0, 0};
572
573    do {
574        int read_count;
575        struct ps_cfg_entry *tag;
576
577        ptr = fgets(buf, LINE_SIZE_MAX, stream);
578        if (!ptr)
579            break;
580
581        __skip_space(ptr);
582        if (__check_comment(ptr))
583            continue;
584
585        /* Lines with a '#' will be followed by new PS entry */
586        if (ptr == strstr(ptr, "#")) {
587            if (status.section != PS_UNDEF) {
588                return -EILSEQ;
589            } else {
590                status.section = PS_ID;
591                continue;
592            }
593        }
594
595        tag = &ps_list[tag_cnt];
596
597        switch (status.section) {
598            case PS_ID:
599                if (get_input_format(ptr, &format) < 0)
600                    return -EILSEQ;
601
602                tag->id = read_data_in_section(ptr, format);
603                status.section = PS_LEN;
604                break;
605
606            case PS_LEN:
607                if (get_input_format(ptr, &format) < 0)
608                    return -EILSEQ;
609
610                byte_count = read_data_in_section(ptr, format);
611                if (byte_count > PS_MAX_LEN)
612                    return -EILSEQ;
613
614                tag->len = byte_count;
615                tag->data = (uint8_t *)malloc(byte_count);
616
617                status.section = PS_DATA;
618                status.line_count = 0;
619                break;
620
621            case PS_DATA:
622            if (status.line_count == 0)
623                if (get_input_format(ptr, &format) < 0)
624                    return -EILSEQ;
625
626            __skip_space(ptr);
627
628            status.char_cnt = update_char_count(ptr);
629
630            read_count = (byte_count > ENTRY_PER_LINE) ?
631            ENTRY_PER_LINE : byte_count;
632
633            if (format.type == PS_HEX && format.array == TRUE) {
634                while (read_count > 0) {
635                    update_tag_data(tag, &status, ptr);
636                    read_count -= 2;
637                }
638
639                if (byte_count > ENTRY_PER_LINE)
640                    byte_count -= ENTRY_PER_LINE;
641                else
642                    byte_count = 0;
643            }
644
645            status.line_count++;
646
647            if (byte_count == 0)
648                memset(&status, 0x00, sizeof(struct tag_info));
649
650            if (status.section == PS_UNDEF)
651                tag_cnt++;
652
653            if (tag_cnt == MAX_TAGS)
654                return -EILSEQ;
655            break;
656        }
657    } while (ptr);
658
659    return tag_cnt;
660}
661
662#define PS_RAM_SIZE 2048
663
664static int ps_config_download(int fd, int tag_count)
665{
666    if (write_ps_cmd(fd, PS_RESET, PS_RAM_SIZE) < 0)
667        return -1;
668
669    if (tag_count > 0)
670        if (write_ps_cmd(fd, PS_WRITE, tag_count) < 0)
671            return -1;
672    return 0;
673}
674
675static int write_bdaddr(int pConfig, char *bdaddr)
676{
677    uint8_t *event;
678    int err;
679    uint8_t cmd[13];
680    uint8_t *ptr = cmd;
681    hci_command_hdr *ch = (void *)cmd;
682
683    memset(cmd, 0, sizeof(cmd));
684
685    ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
686        HCI_PS_CMD_OCF));
687    ch->plen = 10;
688    ptr += HCI_COMMAND_HDR_SIZE;
689
690    ptr[0] = 0x01;
691    ptr[1] = 0x01;
692    ptr[2] = 0x00;
693    ptr[3] = 0x06;
694
695    convert_bdaddr(bdaddr, (char *)&ptr[4]);
696
697    err = send_hci_cmd_sync(pConfig, cmd, sizeof(cmd), &event);
698    if (err < 0)
699        return err;
700
701    err = read_ps_event(event, HCI_PS_CMD_OCF);
702
703    free(event);
704
705    return err;
706}
707
708static void write_bdaddr_from_file(int rom_version, int fd)
709{
710    FILE *stream;
711    char bdaddr[PATH_MAX];
712    char bdaddr_file[PATH_MAX];
713
714    snprintf(bdaddr_file, MAXPATHLEN, "%s%x/%s",
715    FW_PATH, rom_version, BDADDR_FILE);
716
717    stream = fopen(bdaddr_file, "r");
718    if (!stream)
719       return;
720
721    if (fgets(bdaddr, PATH_MAX - 1, stream))
722        write_bdaddr(fd, bdaddr);
723
724    fclose(stream);
725}
726
727#define HCI_EVT_CMD_CMPL_OPCODE                 3
728#define HCI_EVT_CMD_CMPL_STATUS_RET_BYTE        5
729
730void baswap(bdaddr_t *dst, const bdaddr_t *src)
731{
732    register unsigned char *d = (unsigned char *) dst;
733    register const unsigned char *s = (const unsigned char *) src;
734    register int i;
735    for (i = 0; i < 6; i++)
736        d[i] = s[5-i];
737}
738
739
740int str2ba(const char *str, bdaddr_t *ba)
741{
742    uint8_t b[6];
743    const char *ptr = str;
744    int i;
745
746    for (i = 0; i < 6; i++) {
747        b[i] = (uint8_t) strtol(ptr, NULL, 16);
748        ptr = strchr(ptr, ':');
749        if (i != 5 && !ptr)
750            ptr = ":00:00:00:00:00";
751        ptr++;
752    }
753    baswap(ba, (bdaddr_t *) b);
754    return 0;
755}
756
757#define DEV_REGISTER      0x4FFC
758#define GET_DEV_TYPE_OCF  0x05
759
760static int get_device_type(int dev, uint32_t *code)
761{
762    uint8_t cmd[8] = {0};
763    uint8_t *event;
764    uint32_t reg;
765    int err;
766    uint8_t *ptr = cmd;
767    hci_command_hdr *ch = (void *)cmd;
768
769    ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
770        GET_DEV_TYPE_OCF));
771    ch->plen = 5;
772    ptr += HCI_COMMAND_HDR_SIZE;
773
774    ptr[0] = (uint8_t)DEV_REGISTER;
775    ptr[1] = (uint8_t)DEV_REGISTER >> 8;
776    ptr[2] = (uint8_t)DEV_REGISTER >> 16;
777    ptr[3] = (uint8_t)DEV_REGISTER >> 24;
778    ptr[4] = 0x04;
779
780    err = send_hci_cmd_sync(dev, cmd, sizeof(cmd), &event);
781    if (err < 0)
782        return err;
783
784    err = read_ps_event(event, GET_DEV_TYPE_OCF);
785    if (err < 0)
786        goto cleanup;
787
788    reg = event[10];
789    reg = (reg << 8) | event[9];
790    reg = (reg << 8) | event[8];
791    reg = (reg << 8) | event[7];
792    *code = reg;
793
794cleanup:
795    free(event);
796
797    return err;
798}
799
800#define GET_VERSION_OCF 0x1E
801
802static int read_ath3k_version(int pConfig, uint32_t *rom_version,
803    uint32_t *build_version)
804{
805    uint8_t cmd[3] = {0};
806    uint8_t *event;
807    int err;
808    int status;
809    hci_command_hdr *ch = (void *)cmd;
810
811    ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
812    GET_VERSION_OCF));
813    ch->plen = 0;
814
815    err = send_hci_cmd_sync(pConfig, cmd, sizeof(cmd), &event);
816    if (err < 0)
817        return err;
818
819    err = read_ps_event(event, GET_VERSION_OCF);
820    if (err < 0)
821        goto cleanup;
822
823    status = event[10];
824    status = (status << 8) | event[9];
825    status = (status << 8) | event[8];
826    status = (status << 8) | event[7];
827    *rom_version = status;
828
829    status = event[14];
830    status = (status << 8) | event[13];
831    status = (status << 8) | event[12];
832    status = (status << 8) | event[11];
833    *build_version = status;
834
835cleanup:
836    free(event);
837
838    return err;
839}
840
841#define VERIFY_CRC   9
842#define PS_REGION    1
843#define PATCH_REGION 2
844
845static int get_ath3k_crc(int dev)
846{
847    uint8_t cmd[7] = {0};
848    uint8_t *event;
849    int err;
850
851    load_hci_ps_hdr(cmd, VERIFY_CRC, 0, PS_REGION | PATCH_REGION);
852
853    err = send_hci_cmd_sync(dev, cmd, sizeof(cmd), &event);
854    if (err < 0)
855        return err;
856    /* Send error code if CRC check patched */
857    if (read_ps_event(event, HCI_PS_CMD_OCF) >= 0)
858        err = -EILSEQ;
859
860    free(event);
861
862    return err;
863}
864
865#define SET_PATCH_RAM_ID        0x0D
866#define SET_PATCH_RAM_CMD_SIZE  11
867#define ADDRESS_LEN             4
868static int set_patch_ram(int dev, char *patch_loc, int len)
869{
870    int err;
871    uint8_t cmd[20] = {0};
872    int i, j;
873    char loc_byte[3];
874    uint8_t *event;
875    uint8_t *loc_ptr = &cmd[7];
876
877    if (!patch_loc)
878        return -1;
879
880    loc_byte[2] = '\0';
881
882    load_hci_ps_hdr(cmd, SET_PATCH_RAM_ID, ADDRESS_LEN, 0);
883
884    for (i = 0, j = 3; i < 4; i++, j--) {
885        loc_byte[0] = patch_loc[0];
886        loc_byte[1] = patch_loc[1];
887        loc_ptr[j] = strtol(loc_byte, NULL, 16);
888        patch_loc += 2;
889    }
890
891    err = send_hci_cmd_sync(dev, cmd, SET_PATCH_RAM_CMD_SIZE, &event);
892    if (err < 0)
893        return err;
894
895    err = read_ps_event(event, HCI_PS_CMD_OCF);
896
897    free(event);
898
899    return err;
900}
901
902#define PATCH_LOC_KEY    "DA:"
903#define PATCH_LOC_STRING_LEN    8
904static int ps_patch_download(int fd, FILE *stream)
905{
906    char byte[3];
907    char ptr[MAX_PATCH_CMD + 1];
908    int byte_cnt;
909    int patch_count = 0;
910    char patch_loc[PATCH_LOC_STRING_LEN + 1];
911
912    byte[2] = '\0';
913
914    while (fgets(ptr, MAX_PATCH_CMD, stream)) {
915        if (strlen(ptr) <= 1)
916            continue;
917        else if (strstr(ptr, PATCH_LOC_KEY) == ptr) {
918            strlcpy(patch_loc, &ptr[sizeof(PATCH_LOC_KEY) - 1],
919                PATCH_LOC_STRING_LEN);
920            if (set_patch_ram(fd, patch_loc, sizeof(patch_loc)) < 0)
921                return -1;
922        } else if (isxdigit(ptr[0]))
923            break;
924        else
925        return -1;
926    }
927
928    byte_cnt = strtol(ptr, NULL, 16);
929
930    while (byte_cnt > 0) {
931        int i;
932        uint8_t cmd[HCI_MAX_CMD_SIZE] = {0};
933        struct patch_entry patch;
934
935        if (byte_cnt > MAX_PATCH_CMD)
936            patch.len = MAX_PATCH_CMD;
937        else
938            patch.len = byte_cnt;
939
940        for (i = 0; i < patch.len; i++) {
941            if (!fgets(byte, 3, stream))
942                return -1;
943
944            patch.data[i] = strtoul(byte, NULL, 16);
945        }
946
947        load_hci_ps_hdr(cmd, WRITE_PATCH, patch.len, patch_count);
948        memcpy(&cmd[HCI_PS_CMD_HDR_LEN], patch.data, patch.len);
949
950        if (write_cmd(fd, cmd, patch.len + HCI_PS_CMD_HDR_LEN) < 0)
951            return -1;
952
953        patch_count++;
954        byte_cnt = byte_cnt - MAX_PATCH_CMD;
955    }
956
957    if (write_ps_cmd(fd, ENABLE_PATCH, 0) < 0)
958        return -1;
959
960    return patch_count;
961}
962
963static int ath_ps_download(int fd)
964{
965    int err = 0;
966    int tag_count;
967    int patch_count = 0;
968    uint32_t rom_version = 0;
969    uint32_t build_version = 0;
970    uint32_t dev_type = 0;
971    char patch_file[PATH_MAX];
972    char ps_file[PATH_MAX];
973    FILE *stream;
974
975    /*
976    * Verfiy firmware version. depending on it select the PS
977    * config file to download.
978    */
979    if (get_device_type(fd, &dev_type) < 0) {
980        err = -EILSEQ;
981        goto download_cmplete;
982    }
983
984    if (read_ath3k_version(fd, &rom_version, &build_version) < 0) {
985        err = -EILSEQ;
986        goto download_cmplete;
987    }
988
989    /* Do not download configuration if CRC passes */
990    if (get_ath3k_crc(fd) < 0) {
991        err = 0;
992        goto download_cmplete;
993    }
994
995    get_ps_file_name(dev_type, rom_version, ps_file);
996    get_patch_file_name(dev_type, rom_version, build_version, patch_file);
997
998    stream = fopen(ps_file, "r");
999    if (!stream) {
1000        ALOGI("firmware file open error:%s, ver:%x\n",ps_file, rom_version);
1001        if (rom_version == 0x1020201)
1002            err = 0;
1003        else
1004            err	= -EILSEQ;
1005        goto download_cmplete;
1006    }
1007    tag_count = ath_parse_ps(stream);
1008
1009    fclose(stream);
1010
1011    if (tag_count < 0) {
1012        err = -EILSEQ;
1013        goto download_cmplete;
1014    }
1015
1016    /*
1017    * It is not necessary that Patch file be available,
1018    * continue with PS Operations if patch file is not available.
1019    */
1020    if (patch_file[0] == '\0')
1021        err = 0;
1022
1023    stream = fopen(patch_file, "r");
1024    if (!stream)
1025        err = 0;
1026    else {
1027        patch_count = ps_patch_download(fd, stream);
1028        fclose(stream);
1029
1030        if (patch_count < 0) {
1031            err = -EILSEQ;
1032            goto download_cmplete;
1033        }
1034    }
1035
1036    err = ps_config_download(fd, tag_count);
1037
1038download_cmplete:
1039    if (!err)
1040        write_bdaddr_from_file(rom_version, fd);
1041
1042    return err;
1043}
1044
1045int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, struct termios *ti)
1046{
1047    ALOGI(" %s ", __FUNCTION__);
1048
1049    int r;
1050    int err = 0;
1051    struct timespec tm = { 0, 500000};
1052    unsigned char cmd[MAX_CMD_LEN] = {0};
1053    unsigned char rsp[HCI_MAX_EVENT_SIZE];
1054    unsigned char *ptr = cmd + 1;
1055    hci_command_hdr *ch = (void *)ptr;
1056    int flags = 0;
1057
1058    if (ioctl(fd, TIOCMGET, &flags) < 0) {
1059        ALOGI("TIOCMGET failed in init\n");
1060        return -1;
1061    }
1062    flags |= TIOCM_RTS;
1063    if (ioctl(fd, TIOCMSET, &flags) < 0) {
1064        ALOGI("TIOCMSET failed in init: HW Flow-on error\n");
1065        return -1;
1066    }
1067
1068    /* set both controller and host baud rate to maximum possible value */
1069    err = set_cntrlr_baud(fd, speed);
1070    ALOGI("set_cntrlr_baud : ret:%d \n", err);
1071    if (err < 0)
1072        return err;
1073
1074    err = set_speed(fd, ti, speed);
1075    if (err < 0) {
1076        ALOGI("Can't set required baud rate");
1077        return err;
1078    }
1079
1080    /* Download PS and patch */
1081    r = ath_ps_download(fd);
1082    if (r < 0) {
1083        ALOGI("Failed to Download configuration");
1084        err = -ETIMEDOUT;
1085        goto failed;
1086    }
1087
1088    ALOGI("ath_ps_download is done\n");
1089
1090    cmd[0] = HCI_COMMAND_PKT;
1091    /* Write BDADDR */
1092    if (bdaddr) {
1093        ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF,
1094        HCI_PS_CMD_OCF));
1095        ch->plen = 10;
1096        ptr += HCI_COMMAND_HDR_SIZE;
1097
1098        ptr[0] = 0x01;
1099        ptr[1] = 0x01;
1100        ptr[2] = 0x00;
1101        ptr[3] = 0x06;
1102        str2ba(bdaddr, (bdaddr_t *)(ptr + 4));
1103
1104        if (write(fd, cmd, WRITE_BDADDR_CMD_LEN) !=
1105                WRITE_BDADDR_CMD_LEN) {
1106            ALOGI("Failed to write BD_ADDR command\n");
1107            err = -ETIMEDOUT;
1108            goto failed;
1109        }
1110
1111        if (read_hci_event(fd, rsp, sizeof(rsp)) < 0) {
1112            ALOGI("Failed to set BD_ADDR\n");
1113            err = -ETIMEDOUT;
1114            goto failed;
1115        }
1116    }
1117
1118    /* Send HCI Reset */
1119    cmd[1] = 0x03;
1120    cmd[2] = 0x0C;
1121    cmd[3] = 0x00;
1122
1123    r = write(fd, cmd, 4);
1124    if (r != 4) {
1125        err = -ETIMEDOUT;
1126        goto failed;
1127    }
1128
1129    nanosleep(&tm, NULL);
1130    if (read_hci_event(fd, rsp, sizeof(rsp)) < 0) {
1131        err = -ETIMEDOUT;
1132        goto failed;
1133    }
1134
1135    ALOGI("HCI Reset is done\n");
1136    err = set_cntrlr_baud(fd, speed);
1137    if (err < 0)
1138        ALOGI("set_cntrlr_baud0:%d,%d\n", speed, err);
1139
1140failed:
1141    if (err < 0) {
1142        set_cntrlr_baud(fd, init_speed);
1143        set_speed(fd, ti, init_speed);
1144    }
1145
1146    return err;
1147
1148}
1149#define BTPROTO_HCI 1
1150
1151/* Open HCI device.
1152 * Returns device descriptor (dd). */
1153int hci_open_dev(int dev_id)
1154{
1155    struct sockaddr_hci a;
1156    int dd, err;
1157
1158    /* Create HCI socket */
1159    dd = socket(AF_BLUETOOTH, SOCK_RAW, BTPROTO_HCI);
1160    if (dd < 0)
1161        return dd;
1162
1163    /* Bind socket to the HCI device */
1164    memset(&a, 0, sizeof(a));
1165    a.hci_family = AF_BLUETOOTH;
1166    a.hci_dev = dev_id;
1167    if (bind(dd, (struct sockaddr *) &a, sizeof(a)) < 0)
1168        goto failed;
1169
1170    return dd;
1171
1172failed:
1173    err = errno;
1174    close(dd);
1175    errno = err;
1176
1177    return -1;
1178}
1179
1180int hci_close_dev(int dd)
1181{
1182    return close(dd);
1183}
1184
1185/* HCI functions that require open device
1186 * dd - Device descriptor returned by hci_open_dev. */
1187
1188int hci_send_cmd(int dd, uint16_t ogf, uint16_t ocf, uint8_t plen, void *param)
1189{
1190    uint8_t type = HCI_COMMAND_PKT;
1191    hci_command_hdr hc;
1192    struct iovec iv[3];
1193    int ivn;
1194
1195    hc.opcode = htobs(cmd_opcode_pack(ogf, ocf));
1196    hc.plen= plen;
1197
1198    iv[0].iov_base = &type;
1199    iv[0].iov_len  = 1;
1200    iv[1].iov_base = &hc;
1201    iv[1].iov_len  = HCI_COMMAND_HDR_SIZE;
1202    ivn = 2;
1203
1204    if (plen) {
1205        iv[2].iov_base = param;
1206        iv[2].iov_len  = plen;
1207        ivn = 3;
1208    }
1209
1210    while (writev(dd, iv, ivn) < 0) {
1211        if (errno == EAGAIN || errno == EINTR)
1212            continue;
1213        return -1;
1214    }
1215    return 0;
1216}
1217
1218#define HCI_SLEEP_CMD_OCF     0x04
1219#define TIOCSETD 0x5423
1220#define HCIUARTSETFLAGS _IOW('U', 204, int)
1221#define HCIUARTSETPROTO _IOW('U', 200, int)
1222#define HCIUARTGETDEVICE _IOW('U', 202, int)
1223/*
1224 * Atheros AR300x specific initialization post callback
1225 */
1226int ath3k_post(int fd, int pm)
1227{
1228    int dev_id, dd;
1229    struct timespec tm = { 0, 50000};
1230
1231    sleep(1);
1232
1233    dev_id = ioctl(fd, HCIUARTGETDEVICE, 0);
1234    if (dev_id < 0) {
1235        perror("cannot get device id");
1236        return dev_id;
1237    }
1238
1239    dd = hci_open_dev(dev_id);
1240    if (dd < 0) {
1241        perror("HCI device open failed");
1242        return dd;
1243    }
1244
1245    if (ioctl(dd, HCIDEVUP, dev_id) < 0 && errno != EALREADY) {
1246        perror("hci down:Power management Disabled");
1247        hci_close_dev(dd);
1248        return -1;
1249    }
1250
1251    /* send vendor specific command with Sleep feature Enabled */
1252    if (hci_send_cmd(dd, OGF_VENDOR_CMD, HCI_SLEEP_CMD_OCF, 1, &pm) < 0)
1253        perror("PM command failed, power management Disabled");
1254
1255    nanosleep(&tm, NULL);
1256    hci_close_dev(dd);
1257
1258    return 0;
1259}
1260
1261
1262
1263#define FLOW_CTL    0x0001
1264#define ENABLE_PM   1
1265#define DISABLE_PM  0
1266
1267/* Initialize UART driver */
1268static int init_uart(char *dev, struct uart_t *u, int send_break, int raw)
1269{
1270    ALOGI(" %s ", __FUNCTION__);
1271
1272    struct termios ti;
1273
1274    int i, fd;
1275    unsigned long flags = 0;
1276
1277    if (raw)
1278        flags |= 1 << HCI_UART_RAW_DEVICE;
1279
1280
1281    fd = open(dev, O_RDWR | O_NOCTTY);
1282
1283    if (fd < 0) {
1284        ALOGI("Can't open serial port");
1285        return -1;
1286    }
1287
1288
1289    tcflush(fd, TCIOFLUSH);
1290
1291    if (tcgetattr(fd, &ti) < 0) {
1292        ALOGI("Can't get port settings: %d\n", errno);
1293        return -1;
1294    }
1295
1296    cfmakeraw(&ti);
1297
1298    ti.c_cflag |= CLOCAL;
1299    if (u->flags & FLOW_CTL)
1300        ti.c_cflag |= CRTSCTS;
1301    else
1302        ti.c_cflag &= ~CRTSCTS;
1303
1304    if (tcsetattr(fd, TCSANOW, &ti) < 0) {
1305        ALOGI("Can't set port settings");
1306        return -1;
1307    }
1308
1309    if (set_speed(fd, &ti, u->init_speed) < 0) {
1310        ALOGI("Can't set initial baud rate");
1311        return -1;
1312    }
1313
1314    tcflush(fd, TCIOFLUSH);
1315
1316    if (send_break) {
1317        tcsendbreak(fd, 0);
1318        usleep(500000);
1319    }
1320
1321    ath3k_init(fd,u->speed,u->init_speed,u->bdaddr, &ti);
1322
1323    ALOGI("Device setup complete\n");
1324
1325
1326    tcflush(fd, TCIOFLUSH);
1327
1328    // Set actual baudrate
1329    /*
1330    if (set_speed(fd, &ti, u->speed) < 0) {
1331        perror("Can't set baud rate");
1332        return -1;
1333    }
1334
1335    i = N_HCI;
1336    if (ioctl(fd, TIOCSETD, &i) < 0) {
1337        perror("Can't set line discipline");
1338        return -1;
1339    }
1340
1341    if (flags && ioctl(fd, HCIUARTSETFLAGS, flags) < 0) {
1342        perror("Can't set UART flags");
1343        return -1;
1344    }
1345
1346    if (ioctl(fd, HCIUARTSETPROTO, u->proto) < 0) {
1347        perror("Can't set device");
1348        return -1;
1349    }
1350
1351#if !defined(SW_BOARD_HAVE_BLUETOOTH_RTK)
1352    ath3k_post(fd, u->pm);
1353#endif
1354    */
1355
1356    return fd;
1357}
1358
1359
1360int hw_config_ath3k(char *port_name)
1361{
1362    ALOGI(" %s ", __FUNCTION__);
1363    PSCounter=0;
1364    struct sigaction sa;
1365    struct uart_t u ;
1366    int n=0,send_break=0,raw=0;
1367
1368    memset(&u, 0, sizeof(u));
1369    u.speed =3000000;
1370    u.init_speed =115200;
1371    u.flags |= FLOW_CTL;
1372    u.pm = DISABLE_PM;
1373
1374    n = init_uart(port_name, &u, send_break, raw);
1375    if (n < 0) {
1376        ALOGI("Can't initialize device");
1377    }
1378
1379    return n;
1380}
1381
1382void lpm_set_ar3k(uint8_t pio, uint8_t action, uint8_t polarity)
1383{
1384    int rc;
1385    int fd = -1;
1386    char buffer;
1387
1388    ALOGI("lpm mode: %d  action: %d", pio, action);
1389
1390    switch (pio)
1391    {
1392        case UPIO_LPM_MODE:
1393            if (upio_state[UPIO_LPM_MODE] == action)
1394            {
1395                ALOGI("LPM is %s already", lpm_mode[action]);
1396                return;
1397            }
1398
1399            fd = open(VENDOR_LPM_PROC_NODE, O_WRONLY);
1400
1401            if (fd < 0)
1402            {
1403                ALOGE("upio_set : open(%s) for write failed: %s (%d)",
1404                VENDOR_LPM_PROC_NODE, strerror(errno), errno);
1405                return;
1406            }
1407
1408            if (action == UPIO_ASSERT)
1409            {
1410                buffer = '1';
1411            }
1412            else
1413            {
1414                buffer = '0';
1415            }
1416
1417            if (write(fd, &buffer, 1) < 0)
1418            {
1419                ALOGE("upio_set : write(%s) failed: %s (%d)",
1420                VENDOR_LPM_PROC_NODE, strerror(errno),errno);
1421            }
1422            else
1423            {
1424                upio_state[UPIO_LPM_MODE] = action;
1425                ALOGI("LPM is set to %s", lpm_mode[action]);
1426            }
1427
1428            if (fd >= 0)
1429                close(fd);
1430
1431            break;
1432
1433        case UPIO_BT_WAKE:
1434            /* UPIO_DEASSERT should be allowed because in Rx case assert occur
1435            * from the remote side where as deassert  will be initiated from Host
1436            */
1437            if ((action == UPIO_ASSERT) && (upio_state[UPIO_BT_WAKE] == action))
1438            {
1439                ALOGI("BT_WAKE is %s already", lpm_state[action]);
1440
1441                return;
1442            }
1443
1444            if (action == UPIO_DEASSERT)
1445                buffer = '0';
1446            else
1447                buffer = '1';
1448
1449            fd = open(VENDOR_BTWRITE_PROC_NODE, O_WRONLY);
1450
1451            if (fd < 0)
1452            {
1453                ALOGE("upio_set : open(%s) for write failed: %s (%d)",
1454                VENDOR_BTWRITE_PROC_NODE, strerror(errno), errno);
1455                return;
1456            }
1457
1458            if (write(fd, &buffer, 1) < 0)
1459            {
1460                ALOGE("upio_set : write(%s) failed: %s (%d)",
1461                VENDOR_BTWRITE_PROC_NODE, strerror(errno),errno);
1462            }
1463            else
1464            {
1465                upio_state[UPIO_BT_WAKE] = action;
1466                ALOGI("BT_WAKE is set to %s", lpm_state[action]);
1467            }
1468
1469            ALOGI("proc btwrite assertion");
1470
1471            if (fd >= 0)
1472                close(fd);
1473
1474            break;
1475
1476        case UPIO_HOST_WAKE:
1477            ALOGI("upio_set: UPIO_HOST_WAKE");
1478            break;
1479    }
1480
1481}
1482