1/* 2 * Copyright (C) 2008 The Android Open Source Project 3 * Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. 4 * 5 * Not a Contribution, Apache license notifications and license are retained 6 * for attribution purposes only. 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 */ 20#include <cutils/log.h> 21#include <sys/resource.h> 22#include <sys/prctl.h> 23 24#include <stdint.h> 25#include <string.h> 26#include <unistd.h> 27#include <errno.h> 28#include <fcntl.h> 29 30#include <sys/ioctl.h> 31#include <sys/types.h> 32#include <sys/mman.h> 33 34#include <linux/msm_kgsl.h> 35 36#include <EGL/eglplatform.h> 37#include <cutils/native_handle.h> 38 39#include <copybit.h> 40#include <alloc_controller.h> 41#include <memalloc.h> 42 43#include "c2d2.h" 44#include "software_converter.h" 45 46#include <dlfcn.h> 47 48using gralloc::IMemAlloc; 49using gralloc::IonController; 50using gralloc::alloc_data; 51 52C2D_STATUS (*LINK_c2dCreateSurface)( uint32 *surface_id, 53 uint32 surface_bits, 54 C2D_SURFACE_TYPE surface_type, 55 void *surface_definition ); 56 57C2D_STATUS (*LINK_c2dUpdateSurface)( uint32 surface_id, 58 uint32 surface_bits, 59 C2D_SURFACE_TYPE surface_type, 60 void *surface_definition ); 61 62C2D_STATUS (*LINK_c2dReadSurface)( uint32 surface_id, 63 C2D_SURFACE_TYPE surface_type, 64 void *surface_definition, 65 int32 x, int32 y ); 66 67C2D_STATUS (*LINK_c2dDraw)( uint32 target_id, 68 uint32 target_config, C2D_RECT *target_scissor, 69 uint32 target_mask_id, uint32 target_color_key, 70 C2D_OBJECT *objects_list, uint32 num_objects ); 71 72C2D_STATUS (*LINK_c2dFinish)( uint32 target_id); 73 74C2D_STATUS (*LINK_c2dFlush)( uint32 target_id, c2d_ts_handle *timestamp); 75 76C2D_STATUS (*LINK_c2dWaitTimestamp)( c2d_ts_handle timestamp ); 77 78C2D_STATUS (*LINK_c2dDestroySurface)( uint32 surface_id ); 79 80C2D_STATUS (*LINK_c2dMapAddr) ( int mem_fd, void * hostptr, size_t len, 81 size_t offset, uint32 flags, void ** gpuaddr); 82 83C2D_STATUS (*LINK_c2dUnMapAddr) ( void * gpuaddr); 84 85C2D_STATUS (*LINK_c2dGetDriverCapabilities) ( C2D_DRIVER_INFO * driver_info); 86 87/* create a fence fd for the timestamp */ 88C2D_STATUS (*LINK_c2dCreateFenceFD) ( uint32 target_id, c2d_ts_handle timestamp, 89 int32 *fd); 90 91C2D_STATUS (*LINK_c2dFillSurface) ( uint32 surface_id, uint32 fill_color, 92 C2D_RECT * fill_rect); 93 94/******************************************************************************/ 95 96#if defined(COPYBIT_Z180) 97#define MAX_SCALE_FACTOR (4096) 98#define MAX_DIMENSION (4096) 99#else 100#error "Unsupported HW version" 101#endif 102 103// The following defines can be changed as required i.e. as we encounter 104// complex use cases. 105#define MAX_RGB_SURFACES 32 // Max. RGB layers currently supported per draw 106#define MAX_YUV_2_PLANE_SURFACES 4// Max. 2-plane YUV layers currently supported per draw 107#define MAX_YUV_3_PLANE_SURFACES 1// Max. 3-plane YUV layers currently supported per draw 108// +1 for the destination surface. We cannot have multiple destination surfaces. 109#define MAX_SURFACES (MAX_RGB_SURFACES + MAX_YUV_2_PLANE_SURFACES + MAX_YUV_3_PLANE_SURFACES + 1) 110#define NUM_SURFACE_TYPES 3 // RGB_SURFACE + YUV_SURFACE_2_PLANES + YUV_SURFACE_3_PLANES 111#define MAX_BLIT_OBJECT_COUNT 50 // Max. blit objects that can be passed per draw 112 113enum { 114 RGB_SURFACE, 115 YUV_SURFACE_2_PLANES, 116 YUV_SURFACE_3_PLANES 117}; 118 119enum eConversionType { 120 CONVERT_TO_ANDROID_FORMAT, 121 CONVERT_TO_C2D_FORMAT 122}; 123 124enum eC2DFlags { 125 FLAGS_PREMULTIPLIED_ALPHA = 1<<0, 126 FLAGS_YUV_DESTINATION = 1<<1, 127 FLAGS_TEMP_SRC_DST = 1<<2 128}; 129 130static gralloc::IAllocController* sAlloc = 0; 131/******************************************************************************/ 132 133/** State information for each device instance */ 134struct copybit_context_t { 135 struct copybit_device_t device; 136 // Templates for the various source surfaces. These templates are created 137 // to avoid the expensive create/destroy C2D Surfaces 138 C2D_OBJECT_STR blit_rgb_object[MAX_RGB_SURFACES]; 139 C2D_OBJECT_STR blit_yuv_2_plane_object[MAX_YUV_2_PLANE_SURFACES]; 140 C2D_OBJECT_STR blit_yuv_3_plane_object[MAX_YUV_3_PLANE_SURFACES]; 141 C2D_OBJECT_STR blit_list[MAX_BLIT_OBJECT_COUNT]; // Z-ordered list of blit objects 142 C2D_DRIVER_INFO c2d_driver_info; 143 void *libc2d2; 144 alloc_data temp_src_buffer; 145 alloc_data temp_dst_buffer; 146 unsigned int dst[NUM_SURFACE_TYPES]; // dst surfaces 147 uintptr_t mapped_gpu_addr[MAX_SURFACES]; // GPU addresses mapped inside copybit 148 int blit_rgb_count; // Total RGB surfaces being blit 149 int blit_yuv_2_plane_count; // Total 2 plane YUV surfaces being 150 int blit_yuv_3_plane_count; // Total 3 plane YUV surfaces being blit 151 int blit_count; // Total blit objects. 152 unsigned int trg_transform; /* target transform */ 153 int fb_width; 154 int fb_height; 155 int src_global_alpha; 156 int config_mask; 157 int dst_surface_type; 158 bool is_premultiplied_alpha; 159 void* time_stamp; 160 bool dst_surface_mapped; // Set when dst surface is mapped to GPU addr 161 void* dst_surface_base; // Stores the dst surface addr 162 163 // used for signaling the wait thread 164 bool wait_timestamp; 165 pthread_t wait_thread_id; 166 bool stop_thread; 167 pthread_mutex_t wait_cleanup_lock; 168 pthread_cond_t wait_cleanup_cond; 169 170}; 171 172struct bufferInfo { 173 int width; 174 int height; 175 int format; 176}; 177 178struct yuvPlaneInfo { 179 int yStride; //luma stride 180 int plane1_stride; 181 int plane2_stride; 182 size_t plane1_offset; 183 size_t plane2_offset; 184}; 185 186/** 187 * Common hardware methods 188 */ 189 190static int open_copybit(const struct hw_module_t* module, const char* name, 191 struct hw_device_t** device); 192 193static struct hw_module_methods_t copybit_module_methods = { 194open: open_copybit 195}; 196 197/* 198 * The COPYBIT Module 199 */ 200struct copybit_module_t HAL_MODULE_INFO_SYM = { 201common: { 202tag: HARDWARE_MODULE_TAG, 203 version_major: 1, 204 version_minor: 0, 205 id: COPYBIT_HARDWARE_MODULE_ID, 206 name: "QCT COPYBIT C2D 2.0 Module", 207 author: "Qualcomm", 208 methods: ©bit_module_methods 209 } 210}; 211 212 213/* thread function which waits on the timeStamp and cleans up the surfaces */ 214static void* c2d_wait_loop(void* ptr) { 215 copybit_context_t* ctx = (copybit_context_t*)(ptr); 216 char thread_name[64] = "copybitWaitThr"; 217 prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); 218 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); 219 220 while(ctx->stop_thread == false) { 221 pthread_mutex_lock(&ctx->wait_cleanup_lock); 222 while(ctx->wait_timestamp == false && !ctx->stop_thread) { 223 pthread_cond_wait(&(ctx->wait_cleanup_cond), 224 &(ctx->wait_cleanup_lock)); 225 } 226 if(ctx->wait_timestamp) { 227 if(LINK_c2dWaitTimestamp(ctx->time_stamp)) { 228 ALOGE("%s: LINK_c2dWaitTimeStamp ERROR!!", __FUNCTION__); 229 } 230 ctx->wait_timestamp = false; 231 // Unmap any mapped addresses. 232 for (int i = 0; i < MAX_SURFACES; i++) { 233 if (ctx->mapped_gpu_addr[i]) { 234 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 235 ctx->mapped_gpu_addr[i] = 0; 236 } 237 } 238 // Reset the counts after the draw. 239 ctx->blit_rgb_count = 0; 240 ctx->blit_yuv_2_plane_count = 0; 241 ctx->blit_yuv_3_plane_count = 0; 242 ctx->blit_count = 0; 243 ctx->dst_surface_mapped = false; 244 ctx->dst_surface_base = 0; 245 } 246 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 247 if(ctx->stop_thread) 248 break; 249 } 250 pthread_exit(NULL); 251 return NULL; 252} 253 254 255/* convert COPYBIT_FORMAT to C2D format */ 256static int get_format(int format) { 257 switch (format) { 258 case HAL_PIXEL_FORMAT_RGB_565: return C2D_COLOR_FORMAT_565_RGB; 259 case HAL_PIXEL_FORMAT_RGB_888: return C2D_COLOR_FORMAT_888_RGB | 260 C2D_FORMAT_SWAP_RB; 261 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 262 C2D_FORMAT_SWAP_RB | 263 C2D_FORMAT_DISABLE_ALPHA; 264 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB | 265 C2D_FORMAT_SWAP_RB; 266 case HAL_PIXEL_FORMAT_BGRA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 267 case HAL_PIXEL_FORMAT_RGBA_5551: return C2D_COLOR_FORMAT_5551_RGBA; 268 case HAL_PIXEL_FORMAT_RGBA_4444: return C2D_COLOR_FORMAT_4444_RGBA; 269 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV12; 270 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV12; 271 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV21; 272 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: return C2D_COLOR_FORMAT_420_NV12 | 273 C2D_FORMAT_MACROTILED; 274 default: ALOGE("%s: invalid format (0x%x", 275 __FUNCTION__, format); 276 return -EINVAL; 277 } 278 return -EINVAL; 279} 280 281/* Get the C2D formats needed for conversion to YUV */ 282static int get_c2d_format_for_yuv_destination(int halFormat) { 283 switch (halFormat) { 284 // We do not swap the RB when the target is YUV 285 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 286 C2D_FORMAT_DISABLE_ALPHA; 287 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 288 // The U and V need to be interchanged when the target is YUV 289 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV21; 290 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV21; 291 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV12; 292 default: return get_format(halFormat); 293 } 294 return -EINVAL; 295} 296 297/* ------------------------------------------------------------------- *//*! 298 * \internal 299 * \brief Get the bpp for a particular color format 300 * \param color format 301 * \return bits per pixel 302 *//* ------------------------------------------------------------------- */ 303int c2diGetBpp(int32 colorformat) 304{ 305 306 int c2dBpp = 0; 307 308 switch(colorformat&0xFF) 309 { 310 case C2D_COLOR_FORMAT_4444_RGBA: 311 case C2D_COLOR_FORMAT_4444_ARGB: 312 case C2D_COLOR_FORMAT_1555_ARGB: 313 case C2D_COLOR_FORMAT_565_RGB: 314 case C2D_COLOR_FORMAT_5551_RGBA: 315 c2dBpp = 16; 316 break; 317 case C2D_COLOR_FORMAT_8888_RGBA: 318 case C2D_COLOR_FORMAT_8888_ARGB: 319 c2dBpp = 32; 320 break; 321 case C2D_COLOR_FORMAT_888_RGB: 322 c2dBpp = 24; 323 break; 324 case C2D_COLOR_FORMAT_8_L: 325 case C2D_COLOR_FORMAT_8_A: 326 c2dBpp = 8; 327 break; 328 case C2D_COLOR_FORMAT_4_A: 329 c2dBpp = 4; 330 break; 331 case C2D_COLOR_FORMAT_1: 332 c2dBpp = 1; 333 break; 334 default: 335 ALOGE("%s ERROR", __func__); 336 break; 337 } 338 return c2dBpp; 339} 340 341static size_t c2d_get_gpuaddr(copybit_context_t* ctx, 342 struct private_handle_t *handle, int &mapped_idx) 343{ 344 uint32 memtype; 345 size_t *gpuaddr = 0; 346 C2D_STATUS rc; 347 int freeindex = 0; 348 bool mapaddr = false; 349 350 if(!handle) 351 return 0; 352 353 if (handle->flags & (private_handle_t::PRIV_FLAGS_USES_PMEM | 354 private_handle_t::PRIV_FLAGS_USES_PMEM_ADSP)) 355 memtype = KGSL_USER_MEM_TYPE_PMEM; 356 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ASHMEM) 357 memtype = KGSL_USER_MEM_TYPE_ASHMEM; 358 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ION) 359 memtype = KGSL_USER_MEM_TYPE_ION; 360 else { 361 ALOGE("Invalid handle flags: 0x%x", handle->flags); 362 return 0; 363 } 364 365 // Check for a freeindex in the mapped_gpu_addr list 366 for (freeindex = 0; freeindex < MAX_SURFACES; freeindex++) { 367 if (ctx->mapped_gpu_addr[freeindex] == 0) { 368 // free index is available 369 // map GPU addr and use this as mapped_idx 370 mapaddr = true; 371 break; 372 } 373 } 374 375 if(mapaddr) { 376 rc = LINK_c2dMapAddr(handle->fd, (void*)handle->base, handle->size, 377 handle->offset, memtype, (void**)&gpuaddr); 378 379 if (rc == C2D_STATUS_OK) { 380 // We have mapped the GPU address inside copybit. We need to unmap 381 // this address after the blit. Store this address 382 ctx->mapped_gpu_addr[freeindex] = (size_t)gpuaddr; 383 mapped_idx = freeindex; 384 } 385 } 386 return (size_t)gpuaddr; 387} 388 389static void unmap_gpuaddr(copybit_context_t* ctx, int mapped_idx) 390{ 391 if (!ctx || (mapped_idx == -1)) 392 return; 393 394 if (ctx->mapped_gpu_addr[mapped_idx]) { 395 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[mapped_idx]); 396 ctx->mapped_gpu_addr[mapped_idx] = 0; 397 } 398} 399 400static int is_supported_rgb_format(int format) 401{ 402 switch(format) { 403 case HAL_PIXEL_FORMAT_RGBA_8888: 404 case HAL_PIXEL_FORMAT_RGBX_8888: 405 case HAL_PIXEL_FORMAT_RGB_888: 406 case HAL_PIXEL_FORMAT_RGB_565: 407 case HAL_PIXEL_FORMAT_BGRA_8888: 408 case HAL_PIXEL_FORMAT_RGBA_5551: 409 case HAL_PIXEL_FORMAT_RGBA_4444: { 410 return COPYBIT_SUCCESS; 411 } 412 default: 413 return COPYBIT_FAILURE; 414 } 415} 416 417static int get_num_planes(int format) 418{ 419 switch(format) { 420 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 421 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 422 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 423 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 424 return 2; 425 } 426 case HAL_PIXEL_FORMAT_YV12: { 427 return 3; 428 } 429 default: 430 return COPYBIT_FAILURE; 431 } 432} 433 434static int is_supported_yuv_format(int format) 435{ 436 switch(format) { 437 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 438 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 439 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 440 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 441 return COPYBIT_SUCCESS; 442 } 443 default: 444 return COPYBIT_FAILURE; 445 } 446} 447 448static int is_valid_destination_format(int format) 449{ 450 if (format == HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED) { 451 // C2D does not support NV12Tile as a destination format. 452 return COPYBIT_FAILURE; 453 } 454 return COPYBIT_SUCCESS; 455} 456 457static int calculate_yuv_offset_and_stride(const bufferInfo& info, 458 yuvPlaneInfo& yuvInfo) 459{ 460 int width = info.width; 461 int height = info.height; 462 int format = info.format; 463 464 int aligned_height = 0; 465 int aligned_width = 0, size = 0; 466 467 switch (format) { 468 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 469 /* NV12 Tile buffers have their luma height aligned to 32bytes and width 470 * aligned to 128 bytes. The chroma offset starts at an 8K boundary 471 */ 472 aligned_height = ALIGN(height, 32); 473 aligned_width = ALIGN(width, 128); 474 size = aligned_width * aligned_height; 475 yuvInfo.plane1_offset = ALIGN(size,8192); 476 yuvInfo.yStride = aligned_width; 477 yuvInfo.plane1_stride = aligned_width; 478 break; 479 } 480 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 481 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 482 case HAL_PIXEL_FORMAT_YCrCb_420_SP: { 483 aligned_width = ALIGN(width, 32); 484 yuvInfo.yStride = aligned_width; 485 yuvInfo.plane1_stride = aligned_width; 486 if (HAL_PIXEL_FORMAT_NV12_ENCODEABLE == format) { 487 // The encoder requires a 2K aligned chroma offset 488 yuvInfo.plane1_offset = ALIGN(aligned_width * height, 2048); 489 } else 490 yuvInfo.plane1_offset = aligned_width * height; 491 492 break; 493 } 494 default: { 495 return COPYBIT_FAILURE; 496 } 497 } 498 return COPYBIT_SUCCESS; 499} 500 501/** create C2D surface from copybit image */ 502static int set_image(copybit_context_t* ctx, uint32 surfaceId, 503 const struct copybit_image_t *rhs, 504 const eC2DFlags flags, int &mapped_idx) 505{ 506 struct private_handle_t* handle = (struct private_handle_t*)rhs->handle; 507 C2D_SURFACE_TYPE surfaceType; 508 int status = COPYBIT_SUCCESS; 509 uint64_t gpuaddr = 0; 510 int c2d_format; 511 mapped_idx = -1; 512 513 if (flags & FLAGS_YUV_DESTINATION) { 514 c2d_format = get_c2d_format_for_yuv_destination(rhs->format); 515 } else { 516 c2d_format = get_format(rhs->format); 517 } 518 519 if(c2d_format == -EINVAL) { 520 ALOGE("%s: invalid format", __FUNCTION__); 521 return -EINVAL; 522 } 523 524 if(handle == NULL) { 525 ALOGE("%s: invalid handle", __func__); 526 return -EINVAL; 527 } 528 529 if (handle->gpuaddr == 0) { 530 gpuaddr = c2d_get_gpuaddr(ctx, handle, mapped_idx); 531 if(!gpuaddr) { 532 ALOGE("%s: c2d_get_gpuaddr failed", __FUNCTION__); 533 return COPYBIT_FAILURE; 534 } 535 } else { 536 gpuaddr = handle->gpuaddr; 537 } 538 539 /* create C2D surface */ 540 if(is_supported_rgb_format(rhs->format) == COPYBIT_SUCCESS) { 541 /* RGB */ 542 C2D_RGB_SURFACE_DEF surfaceDef; 543 544 surfaceType = (C2D_SURFACE_TYPE) (C2D_SURFACE_RGB_HOST | C2D_SURFACE_WITH_PHYS); 545 546 surfaceDef.phys = (void*) gpuaddr; 547 surfaceDef.buffer = (void*) (handle->base); 548 549 surfaceDef.format = c2d_format | 550 ((flags & FLAGS_PREMULTIPLIED_ALPHA) ? C2D_FORMAT_PREMULTIPLIED : 0); 551 surfaceDef.width = rhs->w; 552 surfaceDef.height = rhs->h; 553 int aligned_width = ALIGN((int)surfaceDef.width,32); 554 surfaceDef.stride = (aligned_width * c2diGetBpp(surfaceDef.format))>>3; 555 556 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 557 &surfaceDef)) { 558 ALOGE("%s: RGB Surface c2dUpdateSurface ERROR", __FUNCTION__); 559 unmap_gpuaddr(ctx, mapped_idx); 560 status = COPYBIT_FAILURE; 561 } 562 } else if (is_supported_yuv_format(rhs->format) == COPYBIT_SUCCESS) { 563 C2D_YUV_SURFACE_DEF surfaceDef; 564 memset(&surfaceDef, 0, sizeof(surfaceDef)); 565 surfaceType = (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | C2D_SURFACE_WITH_PHYS); 566 surfaceDef.format = c2d_format; 567 568 bufferInfo info; 569 info.width = rhs->w; 570 info.height = rhs->h; 571 info.format = rhs->format; 572 573 yuvPlaneInfo yuvInfo = {0}; 574 status = calculate_yuv_offset_and_stride(info, yuvInfo); 575 if(status != COPYBIT_SUCCESS) { 576 ALOGE("%s: calculate_yuv_offset_and_stride error", __FUNCTION__); 577 unmap_gpuaddr(ctx, mapped_idx); 578 } 579 580 surfaceDef.width = rhs->w; 581 surfaceDef.height = rhs->h; 582 surfaceDef.plane0 = (void*) (handle->base); 583 surfaceDef.phys0 = (void*) (gpuaddr); 584 surfaceDef.stride0 = yuvInfo.yStride; 585 586 surfaceDef.plane1 = (void*) (handle->base + yuvInfo.plane1_offset); 587 surfaceDef.phys1 = (void*) (gpuaddr + yuvInfo.plane1_offset); 588 surfaceDef.stride1 = yuvInfo.plane1_stride; 589 if (3 == get_num_planes(rhs->format)) { 590 surfaceDef.plane2 = (void*) (handle->base + yuvInfo.plane2_offset); 591 surfaceDef.phys2 = (void*) (gpuaddr + yuvInfo.plane2_offset); 592 surfaceDef.stride2 = yuvInfo.plane2_stride; 593 } 594 595 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 596 &surfaceDef)) { 597 ALOGE("%s: YUV Surface c2dUpdateSurface ERROR", __FUNCTION__); 598 unmap_gpuaddr(ctx, mapped_idx); 599 status = COPYBIT_FAILURE; 600 } 601 } else { 602 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 603 unmap_gpuaddr(ctx, mapped_idx); 604 status = COPYBIT_FAILURE; 605 } 606 607 return status; 608} 609 610/** copy the bits */ 611static int msm_copybit(struct copybit_context_t *ctx, unsigned int target) 612{ 613 if (ctx->blit_count == 0) { 614 return COPYBIT_SUCCESS; 615 } 616 617 for (int i = 0; i < ctx->blit_count; i++) 618 { 619 ctx->blit_list[i].next = &(ctx->blit_list[i+1]); 620 } 621 ctx->blit_list[ctx->blit_count-1].next = NULL; 622 uint32_t target_transform = ctx->trg_transform; 623 if (ctx->c2d_driver_info.capabilities_mask & 624 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 625 // For A3xx - set 0x0 as the transform is set in the config_mask 626 target_transform = 0x0; 627 } 628 if(LINK_c2dDraw(target, target_transform, 0x0, 0, 0, ctx->blit_list, 629 ctx->blit_count)) { 630 ALOGE("%s: LINK_c2dDraw ERROR", __FUNCTION__); 631 return COPYBIT_FAILURE; 632 } 633 return COPYBIT_SUCCESS; 634} 635 636 637 638static int flush_get_fence_copybit (struct copybit_device_t *dev, int* fd) 639{ 640 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 641 int status = COPYBIT_FAILURE; 642 if (!ctx) 643 return COPYBIT_FAILURE; 644 pthread_mutex_lock(&ctx->wait_cleanup_lock); 645 status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 646 647 if(LINK_c2dFlush(ctx->dst[ctx->dst_surface_type], &ctx->time_stamp)) { 648 ALOGE("%s: LINK_c2dFlush ERROR", __FUNCTION__); 649 // unlock the mutex and return failure 650 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 651 return COPYBIT_FAILURE; 652 } 653 if(LINK_c2dCreateFenceFD(ctx->dst[ctx->dst_surface_type], ctx->time_stamp, 654 fd)) { 655 ALOGE("%s: LINK_c2dCreateFenceFD ERROR", __FUNCTION__); 656 status = COPYBIT_FAILURE; 657 } 658 if(status == COPYBIT_SUCCESS) { 659 //signal the wait_thread 660 ctx->wait_timestamp = true; 661 pthread_cond_signal(&ctx->wait_cleanup_cond); 662 } 663 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 664 return status; 665} 666 667static int finish_copybit(struct copybit_device_t *dev) 668{ 669 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 670 if (!ctx) 671 return COPYBIT_FAILURE; 672 673 int status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 674 675 if(LINK_c2dFinish(ctx->dst[ctx->dst_surface_type])) { 676 ALOGE("%s: LINK_c2dFinish ERROR", __FUNCTION__); 677 return COPYBIT_FAILURE; 678 } 679 680 // Unmap any mapped addresses. 681 for (int i = 0; i < MAX_SURFACES; i++) { 682 if (ctx->mapped_gpu_addr[i]) { 683 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 684 ctx->mapped_gpu_addr[i] = 0; 685 } 686 } 687 688 // Reset the counts after the draw. 689 ctx->blit_rgb_count = 0; 690 ctx->blit_yuv_2_plane_count = 0; 691 ctx->blit_yuv_3_plane_count = 0; 692 ctx->blit_count = 0; 693 ctx->dst_surface_mapped = false; 694 ctx->dst_surface_base = 0; 695 696 return status; 697} 698 699static int clear_copybit(struct copybit_device_t *dev, 700 struct copybit_image_t const *buf, 701 struct copybit_rect_t *rect) 702{ 703 int ret = COPYBIT_SUCCESS; 704 int flags = FLAGS_PREMULTIPLIED_ALPHA; 705 int mapped_dst_idx = -1; 706 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 707 C2D_RECT c2drect = {rect->l, rect->t, rect->r - rect->l, rect->b - rect->t}; 708 pthread_mutex_lock(&ctx->wait_cleanup_lock); 709 if(!ctx->dst_surface_mapped) { 710 ret = set_image(ctx, ctx->dst[RGB_SURFACE], buf, 711 (eC2DFlags)flags, mapped_dst_idx); 712 if(ret) { 713 ALOGE("%s: set_image error", __FUNCTION__); 714 unmap_gpuaddr(ctx, mapped_dst_idx); 715 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 716 return COPYBIT_FAILURE; 717 } 718 //clear_copybit is the first call made by HWC for each composition 719 //with the dest surface, hence set dst_surface_mapped. 720 ctx->dst_surface_mapped = true; 721 ctx->dst_surface_base = buf->base; 722 ret = LINK_c2dFillSurface(ctx->dst[RGB_SURFACE], 0x0, &c2drect); 723 } 724 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 725 return ret; 726} 727 728 729/** setup rectangles */ 730static void set_rects(struct copybit_context_t *ctx, 731 C2D_OBJECT *c2dObject, 732 const struct copybit_rect_t *dst, 733 const struct copybit_rect_t *src, 734 const struct copybit_rect_t *scissor) 735{ 736 // Set the target rect. 737 if((ctx->trg_transform & C2D_TARGET_ROTATE_90) && 738 (ctx->trg_transform & C2D_TARGET_ROTATE_180)) { 739 /* target rotation is 270 */ 740 c2dObject->target_rect.x = (dst->t)<<16; 741 c2dObject->target_rect.y = ctx->fb_width? 742 (ALIGN(ctx->fb_width,32)- dst->r):dst->r; 743 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 744 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 745 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 746 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_90) { 747 c2dObject->target_rect.x = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 748 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 749 c2dObject->target_rect.y = (dst->l)<<16; 750 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 751 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 752 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_180) { 753 c2dObject->target_rect.y = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 754 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 755 c2dObject->target_rect.x = ctx->fb_width? 756 (ALIGN(ctx->fb_width,32) - dst->r):dst->r; 757 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 758 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 759 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 760 } else { 761 c2dObject->target_rect.x = (dst->l)<<16; 762 c2dObject->target_rect.y = (dst->t)<<16; 763 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 764 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 765 } 766 c2dObject->config_mask |= C2D_TARGET_RECT_BIT; 767 768 // Set the source rect 769 c2dObject->source_rect.x = (src->l)<<16; 770 c2dObject->source_rect.y = (src->t)<<16; 771 c2dObject->source_rect.height = ((src->b) - (src->t))<<16; 772 c2dObject->source_rect.width = ((src->r) - (src->l))<<16; 773 c2dObject->config_mask |= C2D_SOURCE_RECT_BIT; 774 775 // Set the scissor rect 776 c2dObject->scissor_rect.x = scissor->l; 777 c2dObject->scissor_rect.y = scissor->t; 778 c2dObject->scissor_rect.height = (scissor->b) - (scissor->t); 779 c2dObject->scissor_rect.width = (scissor->r) - (scissor->l); 780 c2dObject->config_mask |= C2D_SCISSOR_RECT_BIT; 781} 782 783/*****************************************************************************/ 784 785/** Set a parameter to value */ 786static int set_parameter_copybit( 787 struct copybit_device_t *dev, 788 int name, 789 int value) 790{ 791 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 792 int status = COPYBIT_SUCCESS; 793 if (!ctx) { 794 ALOGE("%s: null context", __FUNCTION__); 795 return -EINVAL; 796 } 797 798 pthread_mutex_lock(&ctx->wait_cleanup_lock); 799 switch(name) { 800 case COPYBIT_PLANE_ALPHA: 801 { 802 if (value < 0) value = 0; 803 if (value >= 256) value = 255; 804 805 ctx->src_global_alpha = value; 806 if (value < 255) 807 ctx->config_mask |= C2D_GLOBAL_ALPHA_BIT; 808 else 809 ctx->config_mask &= ~C2D_GLOBAL_ALPHA_BIT; 810 } 811 break; 812 case COPYBIT_BLEND_MODE: 813 { 814 if (value == COPYBIT_BLENDING_NONE) { 815 ctx->config_mask |= C2D_ALPHA_BLEND_NONE; 816 ctx->is_premultiplied_alpha = true; 817 } else if (value == COPYBIT_BLENDING_PREMULT) { 818 ctx->is_premultiplied_alpha = true; 819 } else { 820 ctx->config_mask &= ~C2D_ALPHA_BLEND_NONE; 821 } 822 } 823 break; 824 case COPYBIT_TRANSFORM: 825 { 826 unsigned int transform = 0; 827 uint32 config_mask = 0; 828 config_mask |= C2D_OVERRIDE_GLOBAL_TARGET_ROTATE_CONFIG; 829 if((value & 0x7) == COPYBIT_TRANSFORM_ROT_180) { 830 transform = C2D_TARGET_ROTATE_180; 831 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_180; 832 } else if((value & 0x7) == COPYBIT_TRANSFORM_ROT_270) { 833 transform = C2D_TARGET_ROTATE_90; 834 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_90; 835 } else if(value == COPYBIT_TRANSFORM_ROT_90) { 836 transform = C2D_TARGET_ROTATE_270; 837 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_270; 838 } else { 839 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_0; 840 if(value & COPYBIT_TRANSFORM_FLIP_H) { 841 config_mask |= C2D_MIRROR_H_BIT; 842 } else if(value & COPYBIT_TRANSFORM_FLIP_V) { 843 config_mask |= C2D_MIRROR_V_BIT; 844 } 845 } 846 847 if (ctx->c2d_driver_info.capabilities_mask & 848 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 849 ctx->config_mask |= config_mask; 850 } else { 851 // The transform for this surface does not match the current 852 // target transform. Draw all previous surfaces. This will be 853 // changed once we have a new mechanism to send different 854 // target rotations to c2d. 855 finish_copybit(dev); 856 } 857 ctx->trg_transform = transform; 858 } 859 break; 860 case COPYBIT_FRAMEBUFFER_WIDTH: 861 ctx->fb_width = value; 862 break; 863 case COPYBIT_FRAMEBUFFER_HEIGHT: 864 ctx->fb_height = value; 865 break; 866 case COPYBIT_ROTATION_DEG: 867 case COPYBIT_DITHER: 868 case COPYBIT_BLUR: 869 case COPYBIT_BLIT_TO_FRAMEBUFFER: 870 // Do nothing 871 break; 872 default: 873 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 874 status = -EINVAL; 875 break; 876 } 877 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 878 return status; 879} 880 881/** Get a static info value */ 882static int get(struct copybit_device_t *dev, int name) 883{ 884 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 885 int value; 886 887 if (!ctx) { 888 ALOGE("%s: null context error", __FUNCTION__); 889 return -EINVAL; 890 } 891 892 switch(name) { 893 case COPYBIT_MINIFICATION_LIMIT: 894 value = MAX_SCALE_FACTOR; 895 break; 896 case COPYBIT_MAGNIFICATION_LIMIT: 897 value = MAX_SCALE_FACTOR; 898 break; 899 case COPYBIT_SCALING_FRAC_BITS: 900 value = 32; 901 break; 902 case COPYBIT_ROTATION_STEP_DEG: 903 value = 1; 904 break; 905 default: 906 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 907 value = -EINVAL; 908 } 909 return value; 910} 911 912static int is_alpha(int cformat) 913{ 914 int alpha = 0; 915 switch (cformat & 0xFF) { 916 case C2D_COLOR_FORMAT_8888_ARGB: 917 case C2D_COLOR_FORMAT_8888_RGBA: 918 case C2D_COLOR_FORMAT_5551_RGBA: 919 case C2D_COLOR_FORMAT_4444_ARGB: 920 alpha = 1; 921 break; 922 default: 923 alpha = 0; 924 break; 925 } 926 927 if(alpha && (cformat&C2D_FORMAT_DISABLE_ALPHA)) 928 alpha = 0; 929 930 return alpha; 931} 932 933/* Function to check if we need a temporary buffer for the blit. 934 * This would happen if the requested destination stride and the 935 * C2D stride do not match. We ignore RGB buffers, since their 936 * stride is always aligned to 32. 937 */ 938static bool need_temp_buffer(struct copybit_image_t const *img) 939{ 940 if (COPYBIT_SUCCESS == is_supported_rgb_format(img->format)) 941 return false; 942 943 struct private_handle_t* handle = (struct private_handle_t*)img->handle; 944 945 // The width parameter in the handle contains the aligned_w. We check if we 946 // need to convert based on this param. YUV formats have bpp=1, so checking 947 // if the requested stride is aligned should suffice. 948 if (0 == (handle->width)%32) { 949 return false; 950 } 951 952 return true; 953} 954 955/* Function to extract the information from the copybit image and set the corresponding 956 * values in the bufferInfo struct. 957 */ 958static void populate_buffer_info(struct copybit_image_t const *img, bufferInfo& info) 959{ 960 info.width = img->w; 961 info.height = img->h; 962 info.format = img->format; 963} 964 965/* Function to get the required size for a particular format, inorder for C2D to perform 966 * the blit operation. 967 */ 968static int get_size(const bufferInfo& info) 969{ 970 int size = 0; 971 int w = info.width; 972 int h = info.height; 973 int aligned_w = ALIGN(w, 32); 974 switch(info.format) { 975 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 976 { 977 // Chroma for this format is aligned to 2K. 978 size = ALIGN((aligned_w*h), 2048) + 979 ALIGN(aligned_w/2, 32) * (h/2) *2; 980 size = ALIGN(size, 4096); 981 } break; 982 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 983 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 984 { 985 size = aligned_w * h + 986 ALIGN(aligned_w/2, 32) * (h/2) * 2; 987 size = ALIGN(size, 4096); 988 } break; 989 default: break; 990 } 991 return size; 992} 993 994/* Function to allocate memory for the temporary buffer. This memory is 995 * allocated from Ashmem. It is the caller's responsibility to free this 996 * memory. 997 */ 998static int get_temp_buffer(const bufferInfo& info, alloc_data& data) 999{ 1000 ALOGD("%s E", __FUNCTION__); 1001 // Alloc memory from system heap 1002 data.base = 0; 1003 data.fd = -1; 1004 data.offset = 0; 1005 data.size = get_size(info); 1006 data.align = getpagesize(); 1007 data.uncached = true; 1008 int allocFlags = GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP; 1009 1010 if (sAlloc == 0) { 1011 sAlloc = gralloc::IAllocController::getInstance(); 1012 } 1013 1014 if (sAlloc == 0) { 1015 ALOGE("%s: sAlloc is still NULL", __FUNCTION__); 1016 return COPYBIT_FAILURE; 1017 } 1018 1019 int err = sAlloc->allocate(data, allocFlags); 1020 if (0 != err) { 1021 ALOGE("%s: allocate failed", __FUNCTION__); 1022 return COPYBIT_FAILURE; 1023 } 1024 1025 ALOGD("%s X", __FUNCTION__); 1026 return err; 1027} 1028 1029/* Function to free the temporary allocated memory.*/ 1030static void free_temp_buffer(alloc_data &data) 1031{ 1032 if (-1 != data.fd) { 1033 IMemAlloc* memalloc = sAlloc->getAllocator(data.allocType); 1034 memalloc->free_buffer(data.base, data.size, 0, data.fd); 1035 } 1036} 1037 1038/* Function to perform the software color conversion. Convert the 1039 * C2D compatible format to the Android compatible format 1040 */ 1041static int copy_image(private_handle_t *src_handle, 1042 struct copybit_image_t const *rhs, 1043 eConversionType conversionType) 1044{ 1045 if (src_handle->fd == -1) { 1046 ALOGE("%s: src_handle fd is invalid", __FUNCTION__); 1047 return COPYBIT_FAILURE; 1048 } 1049 1050 // Copy the info. 1051 int ret = COPYBIT_SUCCESS; 1052 switch(rhs->format) { 1053 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 1054 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 1055 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 1056 { 1057 if (CONVERT_TO_ANDROID_FORMAT == conversionType) { 1058 return convert_yuv_c2d_to_yuv_android(src_handle, rhs); 1059 } else { 1060 return convert_yuv_android_to_yuv_c2d(src_handle, rhs); 1061 } 1062 1063 } break; 1064 default: { 1065 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 1066 ret = COPYBIT_FAILURE; 1067 } break; 1068 } 1069 return ret; 1070} 1071 1072static void delete_handle(private_handle_t *handle) 1073{ 1074 if (handle) { 1075 delete handle; 1076 handle = 0; 1077 } 1078} 1079 1080static bool need_to_execute_draw(eC2DFlags flags) 1081{ 1082 if (flags & FLAGS_TEMP_SRC_DST) { 1083 return true; 1084 } 1085 if (flags & FLAGS_YUV_DESTINATION) { 1086 return true; 1087 } 1088 return false; 1089} 1090 1091/** do a stretch blit type operation */ 1092static int stretch_copybit_internal( 1093 struct copybit_device_t *dev, 1094 struct copybit_image_t const *dst, 1095 struct copybit_image_t const *src, 1096 struct copybit_rect_t const *dst_rect, 1097 struct copybit_rect_t const *src_rect, 1098 struct copybit_region_t const *region, 1099 bool enableBlend) 1100{ 1101 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1102 int status = COPYBIT_SUCCESS; 1103 int flags = 0; 1104 int src_surface_type; 1105 int mapped_src_idx = -1, mapped_dst_idx = -1; 1106 C2D_OBJECT_STR src_surface; 1107 1108 if (!ctx) { 1109 ALOGE("%s: null context error", __FUNCTION__); 1110 return -EINVAL; 1111 } 1112 1113 if (src->w > MAX_DIMENSION || src->h > MAX_DIMENSION) { 1114 ALOGE("%s: src dimension error", __FUNCTION__); 1115 return -EINVAL; 1116 } 1117 1118 if (dst->w > MAX_DIMENSION || dst->h > MAX_DIMENSION) { 1119 ALOGE("%s : dst dimension error dst w %d h %d", __FUNCTION__, dst->w, 1120 dst->h); 1121 return -EINVAL; 1122 } 1123 1124 if (is_valid_destination_format(dst->format) == COPYBIT_FAILURE) { 1125 ALOGE("%s: Invalid destination format format = 0x%x", __FUNCTION__, 1126 dst->format); 1127 return COPYBIT_FAILURE; 1128 } 1129 1130 int dst_surface_type; 1131 if (is_supported_rgb_format(dst->format) == COPYBIT_SUCCESS) { 1132 dst_surface_type = RGB_SURFACE; 1133 flags |= FLAGS_PREMULTIPLIED_ALPHA; 1134 } else if (is_supported_yuv_format(dst->format) == COPYBIT_SUCCESS) { 1135 int num_planes = get_num_planes(dst->format); 1136 flags |= FLAGS_YUV_DESTINATION; 1137 if (num_planes == 2) { 1138 dst_surface_type = YUV_SURFACE_2_PLANES; 1139 } else if (num_planes == 3) { 1140 dst_surface_type = YUV_SURFACE_3_PLANES; 1141 } else { 1142 ALOGE("%s: dst number of YUV planes is invalid dst format = 0x%x", 1143 __FUNCTION__, dst->format); 1144 return COPYBIT_FAILURE; 1145 } 1146 } else { 1147 ALOGE("%s: Invalid dst surface format 0x%x", __FUNCTION__, 1148 dst->format); 1149 return COPYBIT_FAILURE; 1150 } 1151 1152 if (ctx->blit_rgb_count == MAX_RGB_SURFACES || 1153 ctx->blit_yuv_2_plane_count == MAX_YUV_2_PLANE_SURFACES || 1154 ctx->blit_yuv_3_plane_count == MAX_YUV_2_PLANE_SURFACES || 1155 ctx->blit_count == MAX_BLIT_OBJECT_COUNT || 1156 ctx->dst_surface_type != dst_surface_type) { 1157 // we have reached the max. limits of our internal structures or 1158 // changed the target. 1159 // Draw the remaining surfaces. We need to do the finish here since 1160 // we need to free up the surface templates. 1161 finish_copybit(dev); 1162 } 1163 1164 ctx->dst_surface_type = dst_surface_type; 1165 1166 // Update the destination 1167 copybit_image_t dst_image; 1168 dst_image.w = dst->w; 1169 dst_image.h = dst->h; 1170 dst_image.format = dst->format; 1171 dst_image.handle = dst->handle; 1172 // Check if we need a temp. copy for the destination. We'd need this the destination 1173 // width is not aligned to 32. This case occurs for YUV formats. RGB formats are 1174 // aligned to 32. 1175 bool need_temp_dst = need_temp_buffer(dst); 1176 bufferInfo dst_info; 1177 populate_buffer_info(dst, dst_info); 1178 private_handle_t* dst_hnd = new private_handle_t(-1, 0, 0, 0, dst_info.format, 1179 dst_info.width, dst_info.height); 1180 if (dst_hnd == NULL) { 1181 ALOGE("%s: dst_hnd is null", __FUNCTION__); 1182 return COPYBIT_FAILURE; 1183 } 1184 if (need_temp_dst) { 1185 if (get_size(dst_info) != (int) ctx->temp_dst_buffer.size) { 1186 free_temp_buffer(ctx->temp_dst_buffer); 1187 // Create a temp buffer and set that as the destination. 1188 if (COPYBIT_FAILURE == get_temp_buffer(dst_info, ctx->temp_dst_buffer)) { 1189 ALOGE("%s: get_temp_buffer(dst) failed", __FUNCTION__); 1190 delete_handle(dst_hnd); 1191 return COPYBIT_FAILURE; 1192 } 1193 } 1194 dst_hnd->fd = ctx->temp_dst_buffer.fd; 1195 dst_hnd->size = ctx->temp_dst_buffer.size; 1196 dst_hnd->flags = ctx->temp_dst_buffer.allocType; 1197 dst_hnd->base = (uintptr_t)(ctx->temp_dst_buffer.base); 1198 dst_hnd->offset = ctx->temp_dst_buffer.offset; 1199 dst_hnd->gpuaddr = 0; 1200 dst_image.handle = dst_hnd; 1201 } 1202 if(!ctx->dst_surface_mapped) { 1203 //map the destination surface to GPU address 1204 status = set_image(ctx, ctx->dst[ctx->dst_surface_type], &dst_image, 1205 (eC2DFlags)flags, mapped_dst_idx); 1206 if(status) { 1207 ALOGE("%s: dst: set_image error", __FUNCTION__); 1208 delete_handle(dst_hnd); 1209 unmap_gpuaddr(ctx, mapped_dst_idx); 1210 return COPYBIT_FAILURE; 1211 } 1212 ctx->dst_surface_mapped = true; 1213 ctx->dst_surface_base = dst->base; 1214 } else if(ctx->dst_surface_mapped && ctx->dst_surface_base != dst->base) { 1215 // Destination surface for the operation should be same for multiple 1216 // requests, this check is catch if there is any case when the 1217 // destination changes 1218 ALOGE("%s: a different destination surface!!", __FUNCTION__); 1219 } 1220 1221 // Update the source 1222 flags = 0; 1223 if(is_supported_rgb_format(src->format) == COPYBIT_SUCCESS) { 1224 src_surface_type = RGB_SURFACE; 1225 src_surface = ctx->blit_rgb_object[ctx->blit_rgb_count]; 1226 } else if (is_supported_yuv_format(src->format) == COPYBIT_SUCCESS) { 1227 int num_planes = get_num_planes(src->format); 1228 if (num_planes == 2) { 1229 src_surface_type = YUV_SURFACE_2_PLANES; 1230 src_surface = ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count]; 1231 } else if (num_planes == 3) { 1232 src_surface_type = YUV_SURFACE_3_PLANES; 1233 src_surface = ctx->blit_yuv_3_plane_object[ctx->blit_yuv_2_plane_count]; 1234 } else { 1235 ALOGE("%s: src number of YUV planes is invalid src format = 0x%x", 1236 __FUNCTION__, src->format); 1237 delete_handle(dst_hnd); 1238 unmap_gpuaddr(ctx, mapped_dst_idx); 1239 return -EINVAL; 1240 } 1241 } else { 1242 ALOGE("%s: Invalid source surface format 0x%x", __FUNCTION__, 1243 src->format); 1244 delete_handle(dst_hnd); 1245 unmap_gpuaddr(ctx, mapped_dst_idx); 1246 return -EINVAL; 1247 } 1248 1249 copybit_image_t src_image; 1250 src_image.w = src->w; 1251 src_image.h = src->h; 1252 src_image.format = src->format; 1253 src_image.handle = src->handle; 1254 1255 bool need_temp_src = need_temp_buffer(src); 1256 bufferInfo src_info; 1257 populate_buffer_info(src, src_info); 1258 private_handle_t* src_hnd = new private_handle_t(-1, 0, 0, 0, src_info.format, 1259 src_info.width, src_info.height); 1260 if (NULL == src_hnd) { 1261 ALOGE("%s: src_hnd is null", __FUNCTION__); 1262 delete_handle(dst_hnd); 1263 unmap_gpuaddr(ctx, mapped_dst_idx); 1264 return COPYBIT_FAILURE; 1265 } 1266 if (need_temp_src) { 1267 if (get_size(src_info) != (int) ctx->temp_src_buffer.size) { 1268 free_temp_buffer(ctx->temp_src_buffer); 1269 // Create a temp buffer and set that as the destination. 1270 if (COPYBIT_SUCCESS != get_temp_buffer(src_info, 1271 ctx->temp_src_buffer)) { 1272 ALOGE("%s: get_temp_buffer(src) failed", __FUNCTION__); 1273 delete_handle(dst_hnd); 1274 delete_handle(src_hnd); 1275 unmap_gpuaddr(ctx, mapped_dst_idx); 1276 return COPYBIT_FAILURE; 1277 } 1278 } 1279 src_hnd->fd = ctx->temp_src_buffer.fd; 1280 src_hnd->size = ctx->temp_src_buffer.size; 1281 src_hnd->flags = ctx->temp_src_buffer.allocType; 1282 src_hnd->base = (uintptr_t)(ctx->temp_src_buffer.base); 1283 src_hnd->offset = ctx->temp_src_buffer.offset; 1284 src_hnd->gpuaddr = 0; 1285 src_image.handle = src_hnd; 1286 1287 // Copy the source. 1288 status = copy_image((private_handle_t *)src->handle, &src_image, 1289 CONVERT_TO_C2D_FORMAT); 1290 if (status == COPYBIT_FAILURE) { 1291 ALOGE("%s:copy_image failed in temp source",__FUNCTION__); 1292 delete_handle(dst_hnd); 1293 delete_handle(src_hnd); 1294 unmap_gpuaddr(ctx, mapped_dst_idx); 1295 return status; 1296 } 1297 1298 // Clean the cache 1299 IMemAlloc* memalloc = sAlloc->getAllocator(src_hnd->flags); 1300 if (memalloc->clean_buffer((void *)(src_hnd->base), src_hnd->size, 1301 src_hnd->offset, src_hnd->fd, 1302 gralloc::CACHE_CLEAN)) { 1303 ALOGE("%s: clean_buffer failed", __FUNCTION__); 1304 delete_handle(dst_hnd); 1305 delete_handle(src_hnd); 1306 unmap_gpuaddr(ctx, mapped_dst_idx); 1307 return COPYBIT_FAILURE; 1308 } 1309 } 1310 1311 flags |= (ctx->is_premultiplied_alpha) ? FLAGS_PREMULTIPLIED_ALPHA : 0; 1312 flags |= (ctx->dst_surface_type != RGB_SURFACE) ? FLAGS_YUV_DESTINATION : 0; 1313 status = set_image(ctx, src_surface.surface_id, &src_image, 1314 (eC2DFlags)flags, mapped_src_idx); 1315 if(status) { 1316 ALOGE("%s: set_image (src) error", __FUNCTION__); 1317 delete_handle(dst_hnd); 1318 delete_handle(src_hnd); 1319 unmap_gpuaddr(ctx, mapped_dst_idx); 1320 unmap_gpuaddr(ctx, mapped_src_idx); 1321 return COPYBIT_FAILURE; 1322 } 1323 1324 src_surface.config_mask = C2D_NO_ANTIALIASING_BIT | ctx->config_mask; 1325 src_surface.global_alpha = ctx->src_global_alpha; 1326 if (enableBlend) { 1327 if(src_surface.config_mask & C2D_GLOBAL_ALPHA_BIT) { 1328 src_surface.config_mask &= ~C2D_ALPHA_BLEND_NONE; 1329 if(!(src_surface.global_alpha)) { 1330 // src alpha is zero 1331 delete_handle(dst_hnd); 1332 delete_handle(src_hnd); 1333 unmap_gpuaddr(ctx, mapped_dst_idx); 1334 unmap_gpuaddr(ctx, mapped_src_idx); 1335 return COPYBIT_FAILURE; 1336 } 1337 } 1338 } else { 1339 src_surface.config_mask |= C2D_ALPHA_BLEND_NONE; 1340 } 1341 1342 if (src_surface_type == RGB_SURFACE) { 1343 ctx->blit_rgb_object[ctx->blit_rgb_count] = src_surface; 1344 ctx->blit_rgb_count++; 1345 } else if (src_surface_type == YUV_SURFACE_2_PLANES) { 1346 ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count] = src_surface; 1347 ctx->blit_yuv_2_plane_count++; 1348 } else { 1349 ctx->blit_yuv_3_plane_object[ctx->blit_yuv_3_plane_count] = src_surface; 1350 ctx->blit_yuv_3_plane_count++; 1351 } 1352 1353 struct copybit_rect_t clip; 1354 while ((status == 0) && region->next(region, &clip)) { 1355 set_rects(ctx, &(src_surface), dst_rect, src_rect, &clip); 1356 if (ctx->blit_count == MAX_BLIT_OBJECT_COUNT) { 1357 ALOGW("Reached end of blit count"); 1358 finish_copybit(dev); 1359 } 1360 ctx->blit_list[ctx->blit_count] = src_surface; 1361 ctx->blit_count++; 1362 } 1363 1364 // Check if we need to perform an early draw-finish. 1365 flags |= (need_temp_dst || need_temp_src) ? FLAGS_TEMP_SRC_DST : 0; 1366 if (need_to_execute_draw((eC2DFlags)flags)) 1367 { 1368 finish_copybit(dev); 1369 } 1370 1371 if (need_temp_dst) { 1372 // copy the temp. destination without the alignment to the actual 1373 // destination. 1374 status = copy_image(dst_hnd, dst, CONVERT_TO_ANDROID_FORMAT); 1375 if (status == COPYBIT_FAILURE) { 1376 ALOGE("%s:copy_image failed in temp Dest",__FUNCTION__); 1377 delete_handle(dst_hnd); 1378 delete_handle(src_hnd); 1379 unmap_gpuaddr(ctx, mapped_dst_idx); 1380 unmap_gpuaddr(ctx, mapped_src_idx); 1381 return status; 1382 } 1383 // Clean the cache. 1384 IMemAlloc* memalloc = sAlloc->getAllocator(dst_hnd->flags); 1385 memalloc->clean_buffer((void *)(dst_hnd->base), dst_hnd->size, 1386 dst_hnd->offset, dst_hnd->fd, 1387 gralloc::CACHE_CLEAN); 1388 } 1389 delete_handle(dst_hnd); 1390 delete_handle(src_hnd); 1391 1392 ctx->is_premultiplied_alpha = false; 1393 ctx->fb_width = 0; 1394 ctx->fb_height = 0; 1395 ctx->config_mask = 0; 1396 return status; 1397} 1398 1399static int set_sync_copybit(struct copybit_device_t *dev, 1400 int /*acquireFenceFd*/) 1401{ 1402 if(!dev) 1403 return -EINVAL; 1404 1405 return 0; 1406} 1407 1408static int stretch_copybit( 1409 struct copybit_device_t *dev, 1410 struct copybit_image_t const *dst, 1411 struct copybit_image_t const *src, 1412 struct copybit_rect_t const *dst_rect, 1413 struct copybit_rect_t const *src_rect, 1414 struct copybit_region_t const *region) 1415{ 1416 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1417 int status = COPYBIT_SUCCESS; 1418 bool needsBlending = (ctx->src_global_alpha != 0); 1419 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1420 status = stretch_copybit_internal(dev, dst, src, dst_rect, src_rect, 1421 region, needsBlending); 1422 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1423 return status; 1424} 1425 1426/** Perform a blit type operation */ 1427static int blit_copybit( 1428 struct copybit_device_t *dev, 1429 struct copybit_image_t const *dst, 1430 struct copybit_image_t const *src, 1431 struct copybit_region_t const *region) 1432{ 1433 int status = COPYBIT_SUCCESS; 1434 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1435 struct copybit_rect_t dr = { 0, 0, (int)dst->w, (int)dst->h }; 1436 struct copybit_rect_t sr = { 0, 0, (int)src->w, (int)src->h }; 1437 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1438 status = stretch_copybit_internal(dev, dst, src, &dr, &sr, region, false); 1439 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1440 return status; 1441} 1442 1443/** Fill the rect on dst with RGBA color **/ 1444static int fill_color(struct copybit_device_t *dev, 1445 struct copybit_image_t const *dst, 1446 struct copybit_rect_t const *rect, 1447 uint32_t /*color*/) 1448{ 1449 // TODO: Implement once c2d driver supports color fill 1450 if(!dev || !dst || !rect) 1451 return -EINVAL; 1452 1453 return -EINVAL; 1454} 1455 1456/*****************************************************************************/ 1457 1458static void clean_up(copybit_context_t* ctx) 1459{ 1460 void* ret; 1461 if (!ctx) 1462 return; 1463 1464 // stop the wait_cleanup_thread 1465 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1466 ctx->stop_thread = true; 1467 // Signal waiting thread 1468 pthread_cond_signal(&ctx->wait_cleanup_cond); 1469 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1470 // waits for the cleanup thread to exit 1471 pthread_join(ctx->wait_thread_id, &ret); 1472 pthread_mutex_destroy(&ctx->wait_cleanup_lock); 1473 pthread_cond_destroy (&ctx->wait_cleanup_cond); 1474 1475 for (int i = 0; i < NUM_SURFACE_TYPES; i++) { 1476 if (ctx->dst[i]) 1477 LINK_c2dDestroySurface(ctx->dst[i]); 1478 } 1479 1480 for (int i = 0; i < MAX_RGB_SURFACES; i++) { 1481 if (ctx->blit_rgb_object[i].surface_id) 1482 LINK_c2dDestroySurface(ctx->blit_rgb_object[i].surface_id); 1483 } 1484 1485 for (int i = 0; i < MAX_YUV_2_PLANE_SURFACES; i++) { 1486 if (ctx->blit_yuv_2_plane_object[i].surface_id) 1487 LINK_c2dDestroySurface(ctx->blit_yuv_2_plane_object[i].surface_id); 1488 } 1489 1490 for (int i = 0; i < MAX_YUV_3_PLANE_SURFACES; i++) { 1491 if (ctx->blit_yuv_3_plane_object[i].surface_id) 1492 LINK_c2dDestroySurface(ctx->blit_yuv_3_plane_object[i].surface_id); 1493 } 1494 1495 if (ctx->libc2d2) { 1496 ::dlclose(ctx->libc2d2); 1497 ALOGV("dlclose(libc2d2)"); 1498 } 1499 1500 free(ctx); 1501} 1502 1503/** Close the copybit device */ 1504static int close_copybit(struct hw_device_t *dev) 1505{ 1506 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1507 if (ctx) { 1508 free_temp_buffer(ctx->temp_src_buffer); 1509 free_temp_buffer(ctx->temp_dst_buffer); 1510 } 1511 clean_up(ctx); 1512 return 0; 1513} 1514 1515/** Open a new instance of a copybit device using name */ 1516static int open_copybit(const struct hw_module_t* module, const char* name, 1517 struct hw_device_t** device) 1518{ 1519 int status = COPYBIT_SUCCESS; 1520 if (strcmp(name, COPYBIT_HARDWARE_COPYBIT0)) { 1521 return COPYBIT_FAILURE; 1522 } 1523 1524 C2D_RGB_SURFACE_DEF surfDefinition = {0}; 1525 C2D_YUV_SURFACE_DEF yuvSurfaceDef = {0} ; 1526 struct copybit_context_t *ctx; 1527 1528 ctx = (struct copybit_context_t *)malloc(sizeof(struct copybit_context_t)); 1529 if(!ctx) { 1530 ALOGE("%s: malloc failed", __FUNCTION__); 1531 return COPYBIT_FAILURE; 1532 } 1533 1534 /* initialize drawstate */ 1535 memset(ctx, 0, sizeof(*ctx)); 1536 ctx->libc2d2 = ::dlopen("libC2D2.so", RTLD_NOW); 1537 if (!ctx->libc2d2) { 1538 ALOGE("FATAL ERROR: could not dlopen libc2d2.so: %s", dlerror()); 1539 clean_up(ctx); 1540 status = COPYBIT_FAILURE; 1541 *device = NULL; 1542 return status; 1543 } 1544 *(void **)&LINK_c2dCreateSurface = ::dlsym(ctx->libc2d2, 1545 "c2dCreateSurface"); 1546 *(void **)&LINK_c2dUpdateSurface = ::dlsym(ctx->libc2d2, 1547 "c2dUpdateSurface"); 1548 *(void **)&LINK_c2dReadSurface = ::dlsym(ctx->libc2d2, 1549 "c2dReadSurface"); 1550 *(void **)&LINK_c2dDraw = ::dlsym(ctx->libc2d2, "c2dDraw"); 1551 *(void **)&LINK_c2dFlush = ::dlsym(ctx->libc2d2, "c2dFlush"); 1552 *(void **)&LINK_c2dFinish = ::dlsym(ctx->libc2d2, "c2dFinish"); 1553 *(void **)&LINK_c2dWaitTimestamp = ::dlsym(ctx->libc2d2, 1554 "c2dWaitTimestamp"); 1555 *(void **)&LINK_c2dDestroySurface = ::dlsym(ctx->libc2d2, 1556 "c2dDestroySurface"); 1557 *(void **)&LINK_c2dMapAddr = ::dlsym(ctx->libc2d2, 1558 "c2dMapAddr"); 1559 *(void **)&LINK_c2dUnMapAddr = ::dlsym(ctx->libc2d2, 1560 "c2dUnMapAddr"); 1561 *(void **)&LINK_c2dGetDriverCapabilities = ::dlsym(ctx->libc2d2, 1562 "c2dGetDriverCapabilities"); 1563 *(void **)&LINK_c2dCreateFenceFD = ::dlsym(ctx->libc2d2, 1564 "c2dCreateFenceFD"); 1565 *(void **)&LINK_c2dFillSurface = ::dlsym(ctx->libc2d2, 1566 "c2dFillSurface"); 1567 1568 if (!LINK_c2dCreateSurface || !LINK_c2dUpdateSurface || !LINK_c2dReadSurface 1569 || !LINK_c2dDraw || !LINK_c2dFlush || !LINK_c2dWaitTimestamp || 1570 !LINK_c2dFinish || !LINK_c2dDestroySurface || 1571 !LINK_c2dGetDriverCapabilities || !LINK_c2dCreateFenceFD || 1572 !LINK_c2dFillSurface) { 1573 ALOGE("%s: dlsym ERROR", __FUNCTION__); 1574 clean_up(ctx); 1575 status = COPYBIT_FAILURE; 1576 *device = NULL; 1577 return status; 1578 } 1579 1580 ctx->device.common.tag = HARDWARE_DEVICE_TAG; 1581 ctx->device.common.version = 1; 1582 ctx->device.common.module = (hw_module_t*)(module); 1583 ctx->device.common.close = close_copybit; 1584 ctx->device.set_parameter = set_parameter_copybit; 1585 ctx->device.get = get; 1586 ctx->device.blit = blit_copybit; 1587 ctx->device.set_sync = set_sync_copybit; 1588 ctx->device.stretch = stretch_copybit; 1589 ctx->device.finish = finish_copybit; 1590 ctx->device.flush_get_fence = flush_get_fence_copybit; 1591 ctx->device.clear = clear_copybit; 1592 ctx->device.fill_color = fill_color; 1593 1594 /* Create RGB Surface */ 1595 surfDefinition.buffer = (void*)0xdddddddd; 1596 surfDefinition.phys = (void*)0xdddddddd; 1597 surfDefinition.stride = 1 * 4; 1598 surfDefinition.width = 1; 1599 surfDefinition.height = 1; 1600 surfDefinition.format = C2D_COLOR_FORMAT_8888_ARGB; 1601 if (LINK_c2dCreateSurface(&(ctx->dst[RGB_SURFACE]), C2D_TARGET | C2D_SOURCE, 1602 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1603 C2D_SURFACE_WITH_PHYS | 1604 C2D_SURFACE_WITH_PHYS_DUMMY ), 1605 &surfDefinition)) { 1606 ALOGE("%s: create ctx->dst_surface[RGB_SURFACE] failed", __FUNCTION__); 1607 ctx->dst[RGB_SURFACE] = 0; 1608 clean_up(ctx); 1609 status = COPYBIT_FAILURE; 1610 *device = NULL; 1611 return status; 1612 } 1613 1614 unsigned int surface_id = 0; 1615 for (int i = 0; i < MAX_RGB_SURFACES; i++) 1616 { 1617 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1618 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1619 C2D_SURFACE_WITH_PHYS | 1620 C2D_SURFACE_WITH_PHYS_DUMMY ), 1621 &surfDefinition)) { 1622 ALOGE("%s: create RGB source surface %d failed", __FUNCTION__, i); 1623 ctx->blit_rgb_object[i].surface_id = 0; 1624 status = COPYBIT_FAILURE; 1625 break; 1626 } else { 1627 ctx->blit_rgb_object[i].surface_id = surface_id; 1628 ALOGW("%s i = %d surface_id=%d", __FUNCTION__, i, 1629 ctx->blit_rgb_object[i].surface_id); 1630 } 1631 } 1632 1633 if (status == COPYBIT_FAILURE) { 1634 clean_up(ctx); 1635 status = COPYBIT_FAILURE; 1636 *device = NULL; 1637 return status; 1638 } 1639 1640 // Create 2 plane YUV surfaces 1641 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_NV12; 1642 yuvSurfaceDef.width = 4; 1643 yuvSurfaceDef.height = 4; 1644 yuvSurfaceDef.plane0 = (void*)0xaaaaaaaa; 1645 yuvSurfaceDef.phys0 = (void*) 0xaaaaaaaa; 1646 yuvSurfaceDef.stride0 = 4; 1647 1648 yuvSurfaceDef.plane1 = (void*)0xaaaaaaaa; 1649 yuvSurfaceDef.phys1 = (void*) 0xaaaaaaaa; 1650 yuvSurfaceDef.stride1 = 4; 1651 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_2_PLANES]), 1652 C2D_TARGET | C2D_SOURCE, 1653 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1654 C2D_SURFACE_WITH_PHYS | 1655 C2D_SURFACE_WITH_PHYS_DUMMY), 1656 &yuvSurfaceDef)) { 1657 ALOGE("%s: create ctx->dst[YUV_SURFACE_2_PLANES] failed", __FUNCTION__); 1658 ctx->dst[YUV_SURFACE_2_PLANES] = 0; 1659 clean_up(ctx); 1660 status = COPYBIT_FAILURE; 1661 *device = NULL; 1662 return status; 1663 } 1664 1665 for (int i=0; i < MAX_YUV_2_PLANE_SURFACES; i++) 1666 { 1667 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1668 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1669 C2D_SURFACE_WITH_PHYS | 1670 C2D_SURFACE_WITH_PHYS_DUMMY ), 1671 &yuvSurfaceDef)) { 1672 ALOGE("%s: create YUV source %d failed", __FUNCTION__, i); 1673 ctx->blit_yuv_2_plane_object[i].surface_id = 0; 1674 status = COPYBIT_FAILURE; 1675 break; 1676 } else { 1677 ctx->blit_yuv_2_plane_object[i].surface_id = surface_id; 1678 ALOGW("%s: 2 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1679 ctx->blit_yuv_2_plane_object[i].surface_id); 1680 } 1681 } 1682 1683 if (status == COPYBIT_FAILURE) { 1684 clean_up(ctx); 1685 status = COPYBIT_FAILURE; 1686 *device = NULL; 1687 return status; 1688 } 1689 1690 // Create YUV 3 plane surfaces 1691 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_YV12; 1692 yuvSurfaceDef.plane2 = (void*)0xaaaaaaaa; 1693 yuvSurfaceDef.phys2 = (void*) 0xaaaaaaaa; 1694 yuvSurfaceDef.stride2 = 4; 1695 1696 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_3_PLANES]), 1697 C2D_TARGET | C2D_SOURCE, 1698 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1699 C2D_SURFACE_WITH_PHYS | 1700 C2D_SURFACE_WITH_PHYS_DUMMY), 1701 &yuvSurfaceDef)) { 1702 ALOGE("%s: create ctx->dst[YUV_SURFACE_3_PLANES] failed", __FUNCTION__); 1703 ctx->dst[YUV_SURFACE_3_PLANES] = 0; 1704 clean_up(ctx); 1705 status = COPYBIT_FAILURE; 1706 *device = NULL; 1707 return status; 1708 } 1709 1710 for (int i=0; i < MAX_YUV_3_PLANE_SURFACES; i++) 1711 { 1712 if (LINK_c2dCreateSurface(&(surface_id), 1713 C2D_TARGET | C2D_SOURCE, 1714 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1715 C2D_SURFACE_WITH_PHYS | 1716 C2D_SURFACE_WITH_PHYS_DUMMY), 1717 &yuvSurfaceDef)) { 1718 ALOGE("%s: create 3 plane YUV surface %d failed", __FUNCTION__, i); 1719 ctx->blit_yuv_3_plane_object[i].surface_id = 0; 1720 status = COPYBIT_FAILURE; 1721 break; 1722 } else { 1723 ctx->blit_yuv_3_plane_object[i].surface_id = surface_id; 1724 ALOGW("%s: 3 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1725 ctx->blit_yuv_3_plane_object[i].surface_id); 1726 } 1727 } 1728 1729 if (status == COPYBIT_FAILURE) { 1730 clean_up(ctx); 1731 status = COPYBIT_FAILURE; 1732 *device = NULL; 1733 return status; 1734 } 1735 1736 if (LINK_c2dGetDriverCapabilities(&(ctx->c2d_driver_info))) { 1737 ALOGE("%s: LINK_c2dGetDriverCapabilities failed", __FUNCTION__); 1738 clean_up(ctx); 1739 status = COPYBIT_FAILURE; 1740 *device = NULL; 1741 return status; 1742 } 1743 // Initialize context variables. 1744 ctx->trg_transform = C2D_TARGET_ROTATE_0; 1745 1746 ctx->temp_src_buffer.fd = -1; 1747 ctx->temp_src_buffer.base = 0; 1748 ctx->temp_src_buffer.size = 0; 1749 1750 ctx->temp_dst_buffer.fd = -1; 1751 ctx->temp_dst_buffer.base = 0; 1752 ctx->temp_dst_buffer.size = 0; 1753 1754 ctx->fb_width = 0; 1755 ctx->fb_height = 0; 1756 1757 ctx->blit_rgb_count = 0; 1758 ctx->blit_yuv_2_plane_count = 0; 1759 ctx->blit_yuv_3_plane_count = 0; 1760 ctx->blit_count = 0; 1761 1762 ctx->wait_timestamp = false; 1763 ctx->stop_thread = false; 1764 pthread_mutex_init(&(ctx->wait_cleanup_lock), NULL); 1765 pthread_cond_init(&(ctx->wait_cleanup_cond), NULL); 1766 /* Start the wait thread */ 1767 pthread_attr_t attr; 1768 pthread_attr_init(&attr); 1769 pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE); 1770 1771 pthread_create(&ctx->wait_thread_id, &attr, &c2d_wait_loop, 1772 (void *)ctx); 1773 pthread_attr_destroy(&attr); 1774 1775 *device = &ctx->device.common; 1776 return status; 1777} 1778