1/*
2* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
3*
4* Redistribution and use in source and binary forms, with or without modification, are permitted
5* provided that the following conditions are met:
6*    * Redistributions of source code must retain the above copyright notice, this list of
7*      conditions and the following disclaimer.
8*    * Redistributions in binary form must reproduce the above copyright notice, this list of
9*      conditions and the following disclaimer in the documentation and/or other materials provided
10*      with the distribution.
11*    * Neither the name of The Linux Foundation nor the names of its contributors may be used to
12*      endorse or promote products derived from this software without specific prior written
13*      permission.
14*
15* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17* NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
18* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
22* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23*/
24
25#ifndef __HW_INFO_TYPES_H__
26#define __HW_INFO_TYPES_H__
27
28#include <stdint.h>
29#include <core/display_interface.h>
30#include <core/core_interface.h>
31#include <vector>
32#include <map>
33#include <string>
34
35namespace sdm {
36const int kMaxSDELayers = 16;   // Maximum number of layers that can be handled by hardware in a
37                                // given layer stack.
38
39enum HWDeviceType {
40  kDevicePrimary,
41  kDeviceHDMI,
42  kDeviceVirtual,
43  kDeviceRotator,
44  kDeviceMax,
45};
46
47enum HWBlockType {
48  kHWPrimary,
49  kHWHDMI,
50  kHWWriteback0,
51  kHWWriteback1,
52  kHWWriteback2,
53  kHWBlockMax
54};
55
56enum HWDisplayMode {
57  kModeDefault,
58  kModeVideo,
59  kModeCommand,
60};
61
62enum HWDisplayPort {
63  kPortDefault,
64  kPortDSI,
65  kPortDTv,
66  kPortWriteBack,
67  kPortLVDS,
68  kPortEDP,
69};
70
71enum PipeType {
72  kPipeTypeUnused,
73  kPipeTypeVIG,
74  kPipeTypeRGB,
75  kPipeTypeDMA,
76  kPipeTypeCursor,
77};
78
79enum HWSubBlockType {
80  kHWVIGPipe,
81  kHWRGBPipe,
82  kHWDMAPipe,
83  kHWCursorPipe,
84  kHWRotatorInput,
85  kHWRotatorOutput,
86  kHWWBIntfOutput,
87  kHWSubBlockMax,
88};
89
90typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap;
91
92struct HWDynBwLimitInfo {
93  uint32_t cur_mode = kBwDefault;
94  uint32_t total_bw_limit[kBwModeMax] = { 0 };
95  uint32_t pipe_bw_limit[kBwModeMax] = { 0 };
96};
97
98struct HWPipeCaps {
99  PipeType type = kPipeTypeUnused;
100  uint32_t id = 0;
101  uint32_t max_rects = 1;
102};
103
104struct HWRotatorInfo {
105  enum { ROT_TYPE_MDSS, ROT_TYPE_V4L2 };
106  uint32_t type = ROT_TYPE_MDSS;
107  uint32_t num_rotator = 0;
108  bool has_downscale = false;
109  std::string device_path = "";
110
111  void Reset() { *this = HWRotatorInfo(); }
112};
113
114struct HWResourceInfo {
115  uint32_t hw_version = 0;
116  uint32_t hw_revision = 0;
117  uint32_t num_dma_pipe = 0;
118  uint32_t num_vig_pipe = 0;
119  uint32_t num_rgb_pipe = 0;
120  uint32_t num_cursor_pipe = 0;
121  uint32_t num_blending_stages = 0;
122  uint32_t num_control = 0;
123  uint32_t num_mixer_to_disp = 0;
124  uint32_t smp_total = 0;
125  uint32_t smp_size = 0;
126  uint32_t num_smp_per_pipe = 0;
127  uint32_t max_scale_up = 1;
128  uint32_t max_scale_down = 1;
129  uint64_t max_bandwidth_low = 0;
130  uint64_t max_bandwidth_high = 0;
131  uint32_t max_mixer_width = 2048;
132  uint32_t max_pipe_width = 2048;
133  uint32_t max_cursor_size = 0;
134  uint32_t max_pipe_bw =  0;
135  uint32_t max_sde_clk = 0;
136  float clk_fudge_factor = 1.0f;
137  uint32_t macrotile_nv12_factor = 0;
138  uint32_t macrotile_factor = 0;
139  uint32_t linear_factor = 0;
140  uint32_t scale_factor = 0;
141  uint32_t extra_fudge_factor = 0;
142  bool has_bwc = false;
143  bool has_ubwc = false;
144  bool has_decimation = false;
145  bool has_macrotile = false;
146  bool has_non_scalar_rgb = false;
147  bool is_src_split = false;
148  bool perf_calc = false;
149  bool has_dyn_bw_support = false;
150  bool separate_rotator = false;
151  HWDynBwLimitInfo dyn_bw_info;
152  std::vector<HWPipeCaps> hw_pipes;
153  FormatsMap supported_formats_map;
154  HWRotatorInfo hw_rot_info;
155
156  void Reset() { *this = HWResourceInfo(); }
157};
158
159struct HWSplitInfo {
160  uint32_t left_split = 0;
161  uint32_t right_split = 0;
162
163  bool operator !=(const HWSplitInfo &split_info) {
164    return ((left_split != split_info.left_split) || (right_split != split_info.right_split));
165  }
166
167  bool operator ==(const HWSplitInfo &split_info) {
168    return !(operator !=(split_info));
169  }
170};
171
172enum HWS3DMode {
173  kS3DModeNone,
174  kS3DModeLR,
175  kS3DModeRL,
176  kS3DModeTB,
177  kS3DModeFP,
178  kS3DModeMax,
179};
180
181struct HWPanelInfo {
182  HWDisplayPort port = kPortDefault;  // Display port
183  HWDisplayMode mode = kModeDefault;  // Display mode
184  bool partial_update = false;        // Partial update feature
185  int left_align = 0;                 // ROI left alignment restriction
186  int width_align = 0;                // ROI width alignment restriction
187  int top_align = 0;                  // ROI top alignment restriction
188  int height_align = 0;               // ROI height alignment restriction
189  int min_roi_width = 0;              // Min width needed for ROI
190  int min_roi_height = 0;             // Min height needed for ROI
191  bool needs_roi_merge = false;       // Merge ROI's of both the DSI's
192  bool dynamic_fps = false;           // Panel Supports dynamic fps
193  uint32_t min_fps = 0;               // Min fps supported by panel
194  uint32_t max_fps = 0;               // Max fps supported by panel
195  bool is_primary_panel = false;      // Panel is primary display
196  bool is_pluggable = false;          // Panel is pluggable
197  HWSplitInfo split_info;             // Panel split configuration
198  char panel_name[256] = {0};         // Panel name
199  HWS3DMode s3d_mode = kS3DModeNone;  // Panel's current s3d mode.
200  int panel_max_brightness = 0;       // Max panel brightness
201
202  bool operator !=(const HWPanelInfo &panel_info) {
203    return ((port != panel_info.port) || (mode != panel_info.mode) ||
204            (partial_update != panel_info.partial_update) ||
205            (left_align != panel_info.left_align) || (width_align != panel_info.width_align) ||
206            (top_align != panel_info.top_align) || (height_align != panel_info.height_align) ||
207            (min_roi_width != panel_info.min_roi_width) ||
208            (min_roi_height != panel_info.min_roi_height) ||
209            (needs_roi_merge != panel_info.needs_roi_merge) ||
210            (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) ||
211            (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) ||
212            (split_info != panel_info.split_info) ||
213            (s3d_mode != panel_info.s3d_mode));
214  }
215
216  bool operator ==(const HWPanelInfo &panel_info) {
217    return !(operator !=(panel_info));
218  }
219};
220
221struct HWSessionConfig {
222  LayerRect src_rect;
223  LayerRect dst_rect;
224  uint32_t buffer_count = 0;
225  bool secure = false;
226  uint32_t frame_rate = 0;
227  LayerTransform transform;
228
229  bool operator==(const HWSessionConfig& config) const {
230    return (src_rect == config.src_rect &&
231            dst_rect == config.dst_rect &&
232            buffer_count == config.buffer_count &&
233            secure == config.secure &&
234            frame_rate == config.frame_rate &&
235            transform == config.transform);
236  }
237
238  bool operator!=(const HWSessionConfig& config) const {
239    return !operator==(config);
240  }
241};
242
243struct HWRotateInfo {
244  int pipe_id = -1;  // Not actual pipe id, but the relative DMA id
245  int writeback_id = -1;  // Writeback block id, but this is the same as DMA id
246  LayerRect src_roi;  // Source crop of each split
247  LayerRect dst_roi;  // Destination crop of each split
248  bool valid = false;
249  int rotate_id = -1;  // Actual rotator session id with driver
250
251  void Reset() { *this = HWRotateInfo(); }
252};
253
254struct HWRotatorSession {
255  HWRotateInfo hw_rotate_info[kMaxRotatePerLayer];
256  uint32_t hw_block_count = 0;  // number of rotator hw blocks used by rotator session
257  int session_id = -1;  // A handle with Session Manager
258  HWSessionConfig hw_session_config;
259  LayerBuffer input_buffer;  // Input to rotator
260  LayerBuffer output_buffer;  // Output of rotator, crop width and stride are same
261  float input_compression = 1.0f;
262  float output_compression = 1.0f;
263  bool is_buffer_cached = false;
264};
265
266struct HWPixelExtension {
267  int extension;  // Number of pixels extension in left, right, top and bottom directions for all
268                  // color components. This pixel value for each color component should be sum of
269                  // fetch and repeat pixels.
270
271  int overfetch;  // Number of pixels need to be overfetched in left, right, top and bottom
272                  // directions from source image for scaling.
273
274  int repeat;     // Number of pixels need to be repeated in left, right, top and bottom directions
275                  // for scaling.
276};
277
278struct HWPlane {
279  int init_phase_x = 0;
280  int phase_step_x = 0;
281  int init_phase_y = 0;
282  int phase_step_y = 0;
283  HWPixelExtension left;
284  HWPixelExtension top;
285  HWPixelExtension right;
286  HWPixelExtension bottom;
287  uint32_t roi_width = 0;
288};
289
290struct ScaleData {
291  uint8_t enable_pixel_ext;
292  uint32_t src_width = 0;
293  uint32_t src_height = 0;
294  HWPlane plane[4];
295};
296
297struct HWPipeInfo {
298  uint32_t pipe_id = 0;
299  LayerRect src_roi;
300  LayerRect dst_roi;
301  uint8_t horizontal_decimation = 0;
302  uint8_t vertical_decimation = 0;
303  ScaleData scale_data;
304  uint32_t z_order = 0;
305  bool set_igc = false;
306  bool valid = false;
307
308  void Reset() { *this = HWPipeInfo(); }
309};
310
311struct HWLayerConfig {
312  HWPipeInfo left_pipe;           // pipe for left side of output
313  HWPipeInfo right_pipe;          // pipe for right side of output
314  HWRotatorSession hw_rotator_session;
315  float compression = 1.0f;
316
317  void Reset() { *this = HWLayerConfig(); }
318};
319
320struct HWLayersInfo {
321  LayerStack *stack = NULL;        // Input layer stack. Set by the caller.
322
323  uint32_t index[kMaxSDELayers];   // Indexes of the layers from the layer stack which need to be
324                                   // programmed on hardware.
325  LayerRect updated_src_rect[kMaxSDELayers];  // Updated layer src rects in s3d mode
326  LayerRect updated_dst_rect[kMaxSDELayers];  // Updated layer dst rects in s3d mode
327
328  uint32_t count = 0;              // Total number of layers which need to be set on hardware.
329
330  int sync_handle = -1;
331
332  LayerRect left_partial_update;   // Left ROI.
333  LayerRect right_partial_update;  // Right ROI.
334
335  bool use_hw_cursor = false;      // Indicates that HWCursor pipe needs to be used for cursor layer
336};
337
338struct HWLayers {
339  HWLayersInfo info;
340  HWLayerConfig config[kMaxSDELayers];
341  float output_compression = 1.0f;
342  uint32_t bandwidth = 0;
343  uint32_t clock = 0;
344};
345
346struct HWDisplayAttributes : DisplayConfigVariableInfo {
347  bool is_device_split = false;
348  uint32_t split_left = 0;
349  uint32_t v_front_porch = 0;  //!< Vertical front porch of panel
350  uint32_t v_back_porch = 0;   //!< Vertical back porch of panel
351  uint32_t v_pulse_width = 0;  //!< Vertical pulse width of panel
352  uint32_t h_total = 0;        //!< Total width of panel (hActive + hFP + hBP + hPulseWidth)
353  uint32_t s3d_config = 0;     //!< Stores the bit mask of S3D modes
354
355  void Reset() { *this = HWDisplayAttributes(); }
356
357  bool operator !=(const HWDisplayAttributes &attributes) {
358    return ((is_device_split != attributes.is_device_split) ||
359            (split_left != attributes.split_left) ||
360            (x_pixels != attributes.x_pixels) || (y_pixels != attributes.y_pixels) ||
361            (x_dpi != attributes.x_dpi) || (y_dpi != attributes.y_dpi) || (fps != attributes.fps) ||
362            (vsync_period_ns != attributes.vsync_period_ns) ||
363            (v_front_porch != attributes.v_front_porch) ||
364            (v_back_porch != attributes.v_back_porch) ||
365            (v_pulse_width != attributes.v_pulse_width));
366  }
367
368  bool operator ==(const HWDisplayAttributes &attributes) {
369    return !(operator !=(attributes));
370  }
371};
372
373}  // namespace sdm
374
375#endif  // __HW_INFO_TYPES_H__
376
377