1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPI_MSM_MDP_H_ 20#define _UAPI_MSM_MDP_H_ 21#include <linux/types.h> 22#include <linux/fb.h> 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define MSMFB_IOCTL_MAGIC 'm' 25#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) 26#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) 27#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) 30#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) 31#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) 32#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) 35#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) 36#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay) 37#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) 40#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY 41#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) 42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay) 45#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) 46#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) 47#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req) 50#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) 51#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) 52#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req) 55#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) 56#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) 57#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) 60#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) 61#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) 62#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) 65#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) 66#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) 67#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) 70#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit) 71#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) 72#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int) 75#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) 76#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, struct mdp_overlay_list) 77#define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int) 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, struct mdp_pp_feature_version) 80#define MSMFB_SET_PERSISTENCE_MODE _IOWR(MSMFB_IOCTL_MAGIC, 171, unsigned int) 81#define FB_TYPE_3D_PANEL 0x10101010 82#define MDP_IMGTYPE2_START 0x10000 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define MSMFB_DRIVER_VERSION 0xF9E8D701 85#define MDP_IMGTYPE_END 0x100 86#define MDSS_GET_MAJOR(rev) ((rev) >> 28) 87#define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF) 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89#define MDSS_GET_STEP(rev) ((rev) & 0xFFFF) 90#define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16) 91#define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2))) 92#define MDSS_MDP_REV(major,minor,step) ((((major) & 0x000F) << 28) | (((minor) & 0x0FFF) << 16) | ((step) & 0xFFFF)) 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0) 95#define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0) 96#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1) 97#define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2) 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99#define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0) 100#define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1) 101#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0) 102#define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1) 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104#define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0) 105#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0) 106#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0) 107#define MDSS_MDP_HW_REV_107_1 MDSS_MDP_REV(1, 7, 1) 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109#define MDSS_MDP_HW_REV_107_2 MDSS_MDP_REV(1, 7, 2) 110#define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0) 111#define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0) 112#define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0) 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) 115#define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0) 116#define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0) 117#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0) 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) 120#define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) 121#define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) 122enum { 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 NOTIFY_UPDATE_INIT, 125 NOTIFY_UPDATE_DEINIT, 126 NOTIFY_UPDATE_START, 127 NOTIFY_UPDATE_STOP, 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 NOTIFY_UPDATE_POWER_OFF, 130}; 131enum { 132 NOTIFY_TYPE_NO_UPDATE, 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 NOTIFY_TYPE_SUSPEND, 135 NOTIFY_TYPE_UPDATE, 136 NOTIFY_TYPE_BL_UPDATE, 137 NOTIFY_TYPE_BL_AD_ATTEN_UPDATE, 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139}; 140enum { 141 MDP_RGB_565, 142 MDP_XRGB_8888, 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 MDP_Y_CBCR_H2V2, 145 MDP_Y_CBCR_H2V2_ADRENO, 146 MDP_ARGB_8888, 147 MDP_RGB_888, 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 MDP_Y_CRCB_H2V2, 150 MDP_YCRYCB_H2V1, 151 MDP_CBYCRY_H2V1, 152 MDP_Y_CRCB_H2V1, 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 MDP_Y_CBCR_H2V1, 155 MDP_Y_CRCB_H1V2, 156 MDP_Y_CBCR_H1V2, 157 MDP_RGBA_8888, 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 MDP_BGRA_8888, 160 MDP_RGBX_8888, 161 MDP_Y_CRCB_H2V2_TILE, 162 MDP_Y_CBCR_H2V2_TILE, 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 MDP_Y_CR_CB_H2V2, 165 MDP_Y_CR_CB_GH2V2, 166 MDP_Y_CB_CR_H2V2, 167 MDP_Y_CRCB_H1V1, 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 MDP_Y_CBCR_H1V1, 170 MDP_YCRCB_H1V1, 171 MDP_YCBCR_H1V1, 172 MDP_BGR_565, 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 MDP_BGR_888, 175 MDP_Y_CBCR_H2V2_VENUS, 176 MDP_BGRX_8888, 177 MDP_RGBA_8888_TILE, 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 MDP_ARGB_8888_TILE, 180 MDP_ABGR_8888_TILE, 181 MDP_BGRA_8888_TILE, 182 MDP_RGBX_8888_TILE, 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 MDP_XRGB_8888_TILE, 185 MDP_XBGR_8888_TILE, 186 MDP_BGRX_8888_TILE, 187 MDP_YCBYCR_H2V1, 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 MDP_RGB_565_TILE, 190 MDP_BGR_565_TILE, 191 MDP_ARGB_1555, 192 MDP_RGBA_5551, 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 MDP_ARGB_4444, 195 MDP_RGBA_4444, 196 MDP_RGB_565_UBWC, 197 MDP_RGBA_8888_UBWC, 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 MDP_Y_CBCR_H2V2_UBWC, 200 MDP_RGBX_8888_UBWC, 201 MDP_Y_CRCB_H2V2_VENUS, 202 MDP_IMGTYPE_LIMIT, 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 MDP_RGB_BORDERFILL, 205 MDP_XRGB_1555, 206 MDP_RGBX_5551, 207 MDP_XRGB_4444, 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 MDP_RGBX_4444, 210 MDP_ABGR_1555, 211 MDP_BGRA_5551, 212 MDP_XBGR_1555, 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 MDP_BGRX_5551, 215 MDP_ABGR_4444, 216 MDP_BGRA_4444, 217 MDP_XBGR_4444, 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 MDP_BGRX_4444, 220 MDP_ABGR_8888, 221 MDP_XBGR_8888, 222 MDP_RGBA_1010102, 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 MDP_ARGB_2101010, 225 MDP_RGBX_1010102, 226 MDP_XRGB_2101010, 227 MDP_BGRA_1010102, 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 MDP_ABGR_2101010, 230 MDP_BGRX_1010102, 231 MDP_XBGR_2101010, 232 MDP_RGBA_1010102_UBWC, 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 MDP_RGBX_1010102_UBWC, 235 MDP_Y_CBCR_H2V2_P010, 236 MDP_Y_CBCR_H2V2_TP10_UBWC, 237 MDP_IMGTYPE_LIMIT1 = MDP_IMGTYPE_END, 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 MDP_FB_FORMAT = MDP_IMGTYPE2_START, 240 MDP_IMGTYPE_LIMIT2 241}; 242enum { 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 PMEM_IMG, 245 FB_IMG, 246}; 247enum { 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 HSIC_HUE = 0, 250 HSIC_SAT, 251 HSIC_INT, 252 HSIC_CON, 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 NUM_HSIC_PARAM, 255}; 256enum mdss_mdp_max_bw_mode { 257 MDSS_MAX_BW_LIMIT_DEFAULT = 0x1, 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 MDSS_MAX_BW_LIMIT_CAMERA = 0x2, 260 MDSS_MAX_BW_LIMIT_HFLIP = 0x4, 261 MDSS_MAX_BW_LIMIT_VFLIP = 0x8, 262}; 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264#define MDSS_MDP_ROT_ONLY 0x80 265#define MDSS_MDP_RIGHT_MIXER 0x100 266#define MDSS_MDP_DUAL_PIPE 0x200 267#define MDP_ROT_NOP 0 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269#define MDP_FLIP_LR 0x1 270#define MDP_FLIP_UD 0x2 271#define MDP_ROT_90 0x4 272#define MDP_ROT_180 (MDP_FLIP_UD | MDP_FLIP_LR) 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274#define MDP_ROT_270 (MDP_ROT_90 | MDP_FLIP_UD | MDP_FLIP_LR) 275#define MDP_DITHER 0x8 276#define MDP_BLUR 0x10 277#define MDP_BLEND_FG_PREMULT 0x20000 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279#define MDP_IS_FG 0x40000 280#define MDP_SOLID_FILL 0x00000020 281#define MDP_VPU_PIPE 0x00000040 282#define MDP_DEINTERLACE 0x80000000 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define MDP_SHARPENING 0x40000000 285#define MDP_NO_DMA_BARRIER_START 0x20000000 286#define MDP_NO_DMA_BARRIER_END 0x10000000 287#define MDP_NO_BLIT 0x08000000 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 290#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) 291#define MDP_BLIT_SRC_GEM 0x04000000 292#define MDP_BLIT_DST_GEM 0x02000000 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294#define MDP_BLIT_NON_CACHED 0x01000000 295#define MDP_OV_PIPE_SHARE 0x00800000 296#define MDP_DEINTERLACE_ODD 0x00400000 297#define MDP_OV_PLAY_NOWAIT 0x00200000 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299#define MDP_SOURCE_ROTATED_90 0x00100000 300#define MDP_OVERLAY_PP_CFG_EN 0x00080000 301#define MDP_BACKEND_COMPOSITION 0x00040000 302#define MDP_BORDERFILL_SUPPORTED 0x00010000 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define MDP_SECURE_OVERLAY_SESSION 0x00008000 305#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 306#define MDP_OV_PIPE_FORCE_DMA 0x00004000 307#define MDP_MEMORY_ID_TYPE_FB 0x00001000 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309#define MDP_BWC_EN 0x00000400 310#define MDP_DECIMATION_EN 0x00000800 311#define MDP_SMP_FORCE_ALLOC 0x00200000 312#define MDP_TRANSP_NOP 0xffffffff 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314#define MDP_ALPHA_NOP 0xff 315#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) 316#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) 317#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) 320#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) 321#define MDP_FB_PAGE_PROTECTION_INVALID (5) 322#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324struct mdp_rect { 325 uint32_t x; 326 uint32_t y; 327 uint32_t w; 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 uint32_t h; 330}; 331struct mdp_img { 332 uint32_t width; 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 uint32_t height; 335 uint32_t format; 336 uint32_t offset; 337 int memory_id; 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 uint32_t priv; 340}; 341struct mult_factor { 342 uint32_t numer; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 uint32_t denom; 345}; 346#define MDP_CCS_RGB2YUV 0 347#define MDP_CCS_YUV2RGB 1 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349#define MDP_CCS_SIZE 9 350#define MDP_BV_SIZE 3 351struct mdp_ccs { 352 int direction; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 uint16_t ccs[MDP_CCS_SIZE]; 355 uint16_t bv[MDP_BV_SIZE]; 356}; 357struct mdp_csc { 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 int id; 360 uint32_t csc_mv[9]; 361 uint32_t csc_pre_bv[3]; 362 uint32_t csc_post_bv[3]; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 uint32_t csc_pre_lv[6]; 365 uint32_t csc_post_lv[6]; 366}; 367#define MDP_BLIT_REQ_VERSION 3 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369struct color { 370 uint32_t r; 371 uint32_t g; 372 uint32_t b; 373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 uint32_t alpha; 375}; 376struct mdp_blit_req { 377 struct mdp_img src; 378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 struct mdp_img dst; 380 struct mdp_rect src_rect; 381 struct mdp_rect dst_rect; 382 struct color const_color; 383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 uint32_t alpha; 385 uint32_t transp_mask; 386 uint32_t flags; 387 int sharpening_strength; 388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 uint8_t color_space; 390 uint32_t fps; 391}; 392struct mdp_blit_req_list { 393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 uint32_t count; 395 struct mdp_blit_req req[]; 396}; 397#define MSMFB_DATA_VERSION 2 398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399struct msmfb_data { 400 uint32_t offset; 401 int memory_id; 402 int id; 403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 uint32_t flags; 405 uint32_t priv; 406 uint32_t iova; 407}; 408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409#define MSMFB_NEW_REQUEST - 1 410struct msmfb_overlay_data { 411 uint32_t id; 412 struct msmfb_data data; 413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 uint32_t version_key; 415 struct msmfb_data plane1_data; 416 struct msmfb_data plane2_data; 417 struct msmfb_data dst_data; 418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419}; 420struct msmfb_img { 421 uint32_t width; 422 uint32_t height; 423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 uint32_t format; 425}; 426#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 427struct msmfb_writeback_data { 428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429 struct msmfb_data buf_info; 430 struct msmfb_img img; 431}; 432#define MDP_PP_OPS_ENABLE 0x1 433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434#define MDP_PP_OPS_READ 0x2 435#define MDP_PP_OPS_WRITE 0x4 436#define MDP_PP_OPS_DISABLE 0x8 437#define MDP_PP_IGC_FLAG_ROM0 0x10 438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439#define MDP_PP_IGC_FLAG_ROM1 0x20 440#define MDSS_PP_DSPP_CFG 0x000 441#define MDSS_PP_SSPP_CFG 0x100 442#define MDSS_PP_LM_CFG 0x200 443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444#define MDSS_PP_WB_CFG 0x300 445#define MDSS_PP_ARG_MASK 0x3C00 446#define MDSS_PP_ARG_NUM 4 447#define MDSS_PP_ARG_SHIFT 10 448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449#define MDSS_PP_LOCATION_MASK 0x0300 450#define MDSS_PP_LOGICAL_MASK 0x00FF 451#define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) 452#define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) 453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) 455#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) 456struct mdp_qseed_cfg { 457 uint32_t table_num; 458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459 uint32_t ops; 460 uint32_t len; 461 uint32_t * data; 462}; 463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464struct mdp_sharp_cfg { 465 uint32_t flags; 466 uint32_t strength; 467 uint32_t edge_thr; 468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469 uint32_t smooth_thr; 470 uint32_t noise_thr; 471}; 472struct mdp_qseed_cfg_data { 473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474 uint32_t block; 475 struct mdp_qseed_cfg qseed_data; 476}; 477#define MDP_OVERLAY_PP_CSC_CFG 0x1 478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479#define MDP_OVERLAY_PP_QSEED_CFG 0x2 480#define MDP_OVERLAY_PP_PA_CFG 0x4 481#define MDP_OVERLAY_PP_IGC_CFG 0x8 482#define MDP_OVERLAY_PP_SHARP_CFG 0x10 483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484#define MDP_OVERLAY_PP_HIST_CFG 0x20 485#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 486#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 487#define MDP_OVERLAY_PP_PCC_CFG 0x100 488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489#define MDP_CSC_FLAG_ENABLE 0x1 490#define MDP_CSC_FLAG_YUV_IN 0x2 491#define MDP_CSC_FLAG_YUV_OUT 0x4 492#define MDP_CSC_MATRIX_COEFF_SIZE 9 493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494#define MDP_CSC_CLAMP_SIZE 6 495#define MDP_CSC_BIAS_SIZE 3 496struct mdp_csc_cfg { 497 uint32_t flags; 498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499 uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE]; 500 uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE]; 501 uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE]; 502 uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE]; 503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504 uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE]; 505}; 506struct mdp_csc_cfg_data { 507 uint32_t block; 508/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 509 struct mdp_csc_cfg csc_data; 510}; 511struct mdp_pa_cfg { 512 uint32_t flags; 513/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 514 uint32_t hue_adj; 515 uint32_t sat_adj; 516 uint32_t val_adj; 517 uint32_t cont_adj; 518/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 519}; 520struct mdp_pa_mem_col_cfg { 521 uint32_t color_adjust_p0; 522 uint32_t color_adjust_p1; 523/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 524 uint32_t hue_region; 525 uint32_t sat_region; 526 uint32_t val_region; 527}; 528/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 529#define MDP_SIX_ZONE_LUT_SIZE 384 530#define MDP_PP_PA_HUE_ENABLE 0x10 531#define MDP_PP_PA_SAT_ENABLE 0x20 532#define MDP_PP_PA_VAL_ENABLE 0x40 533/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 534#define MDP_PP_PA_CONT_ENABLE 0x80 535#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 536#define MDP_PP_PA_SKIN_ENABLE 0x200 537#define MDP_PP_PA_SKY_ENABLE 0x400 538/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 539#define MDP_PP_PA_FOL_ENABLE 0x800 540#define MDP_PP_PA_MEM_PROT_HUE_EN 0x1 541#define MDP_PP_PA_MEM_PROT_SAT_EN 0x2 542#define MDP_PP_PA_MEM_PROT_VAL_EN 0x4 543/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 544#define MDP_PP_PA_MEM_PROT_CONT_EN 0x8 545#define MDP_PP_PA_MEM_PROT_SIX_EN 0x10 546#define MDP_PP_PA_MEM_PROT_BLEND_EN 0x20 547#define MDP_PP_PA_HUE_MASK 0x1000 548/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 549#define MDP_PP_PA_SAT_MASK 0x2000 550#define MDP_PP_PA_VAL_MASK 0x4000 551#define MDP_PP_PA_CONT_MASK 0x8000 552#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 553/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 554#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 555#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 556#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 557#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 558/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 559#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 560#define MDP_PP_PA_MEM_PROTECT_EN 0x400000 561#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 562#define MDP_PP_PA_LEFT_HOLD 0x1 563/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 564#define MDP_PP_PA_RIGHT_HOLD 0x2 565struct mdp_pa_v2_data { 566 uint32_t flags; 567 uint32_t global_hue_adj; 568/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 569 uint32_t global_sat_adj; 570 uint32_t global_val_adj; 571 uint32_t global_cont_adj; 572 struct mdp_pa_mem_col_cfg skin_cfg; 573/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 574 struct mdp_pa_mem_col_cfg sky_cfg; 575 struct mdp_pa_mem_col_cfg fol_cfg; 576 uint32_t six_zone_len; 577 uint32_t six_zone_thresh; 578/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 579 uint32_t * six_zone_curve_p0; 580 uint32_t * six_zone_curve_p1; 581}; 582struct mdp_pa_mem_col_data_v1_7 { 583/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 584 uint32_t color_adjust_p0; 585 uint32_t color_adjust_p1; 586 uint32_t color_adjust_p2; 587 uint32_t blend_gain; 588/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 589 uint8_t sat_hold; 590 uint8_t val_hold; 591 uint32_t hue_region; 592 uint32_t sat_region; 593/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 594 uint32_t val_region; 595}; 596struct mdp_pa_data_v1_7 { 597 uint32_t mode; 598/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 599 uint32_t global_hue_adj; 600 uint32_t global_sat_adj; 601 uint32_t global_val_adj; 602 uint32_t global_cont_adj; 603/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 604 struct mdp_pa_mem_col_data_v1_7 skin_cfg; 605 struct mdp_pa_mem_col_data_v1_7 sky_cfg; 606 struct mdp_pa_mem_col_data_v1_7 fol_cfg; 607 uint32_t six_zone_thresh; 608/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 609 uint32_t six_zone_adj_p0; 610 uint32_t six_zone_adj_p1; 611 uint8_t six_zone_sat_hold; 612 uint8_t six_zone_val_hold; 613/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 614 uint32_t six_zone_len; 615 uint32_t * six_zone_curve_p0; 616 uint32_t * six_zone_curve_p1; 617}; 618/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 619struct mdp_pa_v2_cfg_data { 620 uint32_t version; 621 uint32_t block; 622 uint32_t flags; 623/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 624 struct mdp_pa_v2_data pa_v2_data; 625 void * cfg_payload; 626}; 627enum { 628/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 629 mdp_igc_rec601 = 1, 630 mdp_igc_rec709, 631 mdp_igc_srgb, 632 mdp_igc_custom, 633/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 634 mdp_igc_rec_max, 635}; 636struct mdp_igc_lut_data { 637 uint32_t block; 638/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 639 uint32_t version; 640 uint32_t len, ops; 641 uint32_t * c0_c1_data; 642 uint32_t * c2_data; 643/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 644 void * cfg_payload; 645}; 646struct mdp_igc_lut_data_v1_7 { 647 uint32_t table_fmt; 648/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 649 uint32_t len; 650 uint32_t * c0_c1_data; 651 uint32_t * c2_data; 652}; 653/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 654struct mdp_histogram_cfg { 655 uint32_t ops; 656 uint32_t block; 657 uint8_t frame_cnt; 658/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 659 uint8_t bit_mask; 660 uint16_t num_bins; 661}; 662struct mdp_hist_lut_data_v1_7 { 663/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 664 uint32_t len; 665 uint32_t * data; 666}; 667struct mdp_hist_lut_data { 668/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 669 uint32_t block; 670 uint32_t version; 671 uint32_t hist_lut_first; 672 uint32_t ops; 673/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 674 uint32_t len; 675 uint32_t * data; 676 void * cfg_payload; 677}; 678/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 679struct mdp_pcc_coeff { 680 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; 681}; 682struct mdp_pcc_coeff_v1_7 { 683/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 684 uint32_t c, r, g, b, rg, gb, rb, rgb; 685}; 686struct mdp_pcc_data_v1_7 { 687 struct mdp_pcc_coeff_v1_7 r, g, b; 688/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 689}; 690struct mdp_pcc_cfg_data { 691 uint32_t version; 692 uint32_t block; 693/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 694 uint32_t ops; 695 struct mdp_pcc_coeff r, g, b; 696 void * cfg_payload; 697}; 698/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 699enum { 700 mdp_lut_igc, 701 mdp_lut_pgc, 702 mdp_lut_hist, 703/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 704 mdp_lut_rgb, 705 mdp_lut_max, 706}; 707struct mdp_overlay_pp_params { 708/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 709 uint32_t config_ops; 710 struct mdp_csc_cfg csc_cfg; 711 struct mdp_qseed_cfg qseed_cfg[2]; 712 struct mdp_pa_cfg pa_cfg; 713/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 714 struct mdp_pa_v2_data pa_v2_cfg; 715 struct mdp_igc_lut_data igc_cfg; 716 struct mdp_sharp_cfg sharp_cfg; 717 struct mdp_histogram_cfg hist_cfg; 718/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 719 struct mdp_hist_lut_data hist_lut_cfg; 720 struct mdp_pa_v2_cfg_data pa_v2_cfg_data; 721 struct mdp_pcc_cfg_data pcc_cfg_data; 722}; 723/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 724enum mdss_mdp_blend_op { 725 BLEND_OP_NOT_DEFINED = 0, 726 BLEND_OP_OPAQUE, 727 BLEND_OP_PREMULTIPLIED, 728/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 729 BLEND_OP_COVERAGE, 730 BLEND_OP_MAX, 731}; 732#define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci)) 733/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 734#define MAX_PLANES 4 735struct mdp_scale_data { 736 uint8_t enable_pxl_ext; 737 int init_phase_x[MAX_PLANES]; 738/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 739 int phase_step_x[MAX_PLANES]; 740 int init_phase_y[MAX_PLANES]; 741 int phase_step_y[MAX_PLANES]; 742 int num_ext_pxls_left[MAX_PLANES]; 743/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 744 int num_ext_pxls_right[MAX_PLANES]; 745 int num_ext_pxls_top[MAX_PLANES]; 746 int num_ext_pxls_btm[MAX_PLANES]; 747 int left_ftch[MAX_PLANES]; 748/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 749 int left_rpt[MAX_PLANES]; 750 int right_ftch[MAX_PLANES]; 751 int right_rpt[MAX_PLANES]; 752 int top_rpt[MAX_PLANES]; 753/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 754 int btm_rpt[MAX_PLANES]; 755 int top_ftch[MAX_PLANES]; 756 int btm_ftch[MAX_PLANES]; 757 uint32_t roi_w[MAX_PLANES]; 758/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 759}; 760enum mdp_overlay_pipe_type { 761 PIPE_TYPE_AUTO = 0, 762 PIPE_TYPE_VIG, 763/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 764 PIPE_TYPE_RGB, 765 PIPE_TYPE_DMA, 766 PIPE_TYPE_CURSOR, 767 PIPE_TYPE_MAX, 768/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 769}; 770struct mdp_overlay { 771 struct msmfb_img src; 772 struct mdp_rect src_rect; 773/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 774 struct mdp_rect dst_rect; 775 uint32_t z_order; 776 uint32_t is_fg; 777 uint32_t alpha; 778/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 779 uint32_t blend_op; 780 uint32_t transp_mask; 781 uint32_t flags; 782 uint32_t pipe_type; 783/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 784 uint32_t id; 785 uint8_t priority; 786 uint32_t user_data[6]; 787 uint32_t bg_color; 788/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 789 uint8_t horz_deci; 790 uint8_t vert_deci; 791 struct mdp_overlay_pp_params overlay_pp_cfg; 792 struct mdp_scale_data scale; 793/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 794 uint8_t color_space; 795 uint32_t frame_rate; 796}; 797struct msmfb_overlay_3d { 798/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 799 uint32_t is_3d; 800 uint32_t width; 801 uint32_t height; 802}; 803/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 804struct msmfb_overlay_blt { 805 uint32_t enable; 806 uint32_t offset; 807 uint32_t width; 808/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 809 uint32_t height; 810 uint32_t bpp; 811}; 812struct mdp_histogram { 813/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 814 uint32_t frame_cnt; 815 uint32_t bin_cnt; 816 uint32_t * r; 817 uint32_t * g; 818/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 819 uint32_t * b; 820}; 821#define MISR_CRC_BATCH_SIZE 32 822enum { 823/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 824 DISPLAY_MISR_EDP, 825 DISPLAY_MISR_DSI0, 826 DISPLAY_MISR_DSI1, 827 DISPLAY_MISR_HDMI, 828/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 829 DISPLAY_MISR_LCDC, 830 DISPLAY_MISR_MDP, 831 DISPLAY_MISR_ATV, 832 DISPLAY_MISR_DSI_CMD, 833/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 834 DISPLAY_MISR_MAX 835}; 836enum { 837 MISR_OP_NONE, 838/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 839 MISR_OP_SFM, 840 MISR_OP_MFM, 841 MISR_OP_BM, 842 MISR_OP_MAX 843/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 844}; 845struct mdp_misr { 846 uint32_t block_id; 847 uint32_t frame_count; 848/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 849 uint32_t crc_op_mode; 850 uint32_t crc_value[MISR_CRC_BATCH_SIZE]; 851}; 852enum { 853/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 854 MDP_BLOCK_RESERVED = 0, 855 MDP_BLOCK_OVERLAY_0, 856 MDP_BLOCK_OVERLAY_1, 857 MDP_BLOCK_VG_1, 858/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 859 MDP_BLOCK_VG_2, 860 MDP_BLOCK_RGB_1, 861 MDP_BLOCK_RGB_2, 862 MDP_BLOCK_DMA_P, 863/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 864 MDP_BLOCK_DMA_S, 865 MDP_BLOCK_DMA_E, 866 MDP_BLOCK_OVERLAY_2, 867 MDP_LOGICAL_BLOCK_DISP_0 = 0x10, 868/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 869 MDP_LOGICAL_BLOCK_DISP_1, 870 MDP_LOGICAL_BLOCK_DISP_2, 871 MDP_BLOCK_MAX, 872}; 873/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 874struct mdp_histogram_start_req { 875 uint32_t block; 876 uint8_t frame_cnt; 877 uint8_t bit_mask; 878/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 879 uint16_t num_bins; 880}; 881struct mdp_histogram_data { 882 uint32_t block; 883/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 884 uint32_t bin_cnt; 885 uint32_t * c0; 886 uint32_t * c1; 887 uint32_t * c2; 888/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 889 uint32_t * extra_info; 890}; 891#define GC_LUT_ENTRIES_V1_7 512 892struct mdp_ar_gc_lut_data { 893/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 894 uint32_t x_start; 895 uint32_t slope; 896 uint32_t offset; 897}; 898/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 899#define MDP_PP_PGC_ROUNDING_ENABLE 0x10 900struct mdp_pgc_lut_data { 901 uint32_t version; 902 uint32_t block; 903/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 904 uint32_t flags; 905 uint8_t num_r_stages; 906 uint8_t num_g_stages; 907 uint8_t num_b_stages; 908/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 909 struct mdp_ar_gc_lut_data * r_data; 910 struct mdp_ar_gc_lut_data * g_data; 911 struct mdp_ar_gc_lut_data * b_data; 912 void * cfg_payload; 913/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 914}; 915#define PGC_LUT_ENTRIES 1024 916struct mdp_pgc_lut_data_v1_7 { 917 uint32_t len; 918/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 919 uint32_t * c0_data; 920 uint32_t * c1_data; 921 uint32_t * c2_data; 922}; 923/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 924struct mdp_rgb_lut_data { 925 uint32_t flags; 926 uint32_t lut_type; 927 struct fb_cmap cmap; 928/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 929}; 930enum { 931 mdp_rgb_lut_gc, 932 mdp_rgb_lut_hist, 933/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 934}; 935struct mdp_lut_cfg_data { 936 uint32_t lut_type; 937 union { 938/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 939 struct mdp_igc_lut_data igc_lut_data; 940 struct mdp_pgc_lut_data pgc_lut_data; 941 struct mdp_hist_lut_data hist_lut_data; 942 struct mdp_rgb_lut_data rgb_lut_data; 943/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 944 } data; 945}; 946struct mdp_bl_scale_data { 947 uint32_t min_lvl; 948/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 949 uint32_t scale; 950}; 951struct mdp_pa_cfg_data { 952 uint32_t block; 953/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 954 struct mdp_pa_cfg pa_data; 955}; 956#define MDP_DITHER_DATA_V1_7_SZ 16 957struct mdp_dither_data_v1_7 { 958/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 959 uint32_t g_y_depth; 960 uint32_t r_cr_depth; 961 uint32_t b_cb_depth; 962 uint32_t len; 963/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 964 uint32_t data[MDP_DITHER_DATA_V1_7_SZ]; 965 uint32_t temporal_en; 966}; 967struct mdp_dither_cfg_data { 968/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 969 uint32_t version; 970 uint32_t block; 971 uint32_t flags; 972 uint32_t mode; 973/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 974 uint32_t g_y_depth; 975 uint32_t r_cr_depth; 976 uint32_t b_cb_depth; 977 void * cfg_payload; 978/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 979}; 980#define MDP_GAMUT_TABLE_NUM 8 981#define MDP_GAMUT_TABLE_NUM_V1_7 4 982#define MDP_GAMUT_SCALE_OFF_TABLE_NUM 3 983/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 984#define MDP_GAMUT_TABLE_V1_7_SZ 1229 985#define MDP_GAMUT_SCALE_OFF_SZ 16 986#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32 987struct mdp_gamut_cfg_data { 988/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 989 uint32_t block; 990 uint32_t flags; 991 uint32_t version; 992 uint32_t gamut_first; 993/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 994 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; 995 uint16_t * r_tbl[MDP_GAMUT_TABLE_NUM]; 996 uint16_t * g_tbl[MDP_GAMUT_TABLE_NUM]; 997 uint16_t * b_tbl[MDP_GAMUT_TABLE_NUM]; 998/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 999 void * cfg_payload; 1000}; 1001enum { 1002 mdp_gamut_fine_mode = 0x1, 1003/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1004 mdp_gamut_coarse_mode, 1005}; 1006struct mdp_gamut_data_v1_7 { 1007 uint32_t mode; 1008/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1009 uint32_t map_en; 1010 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7]; 1011 uint32_t * c0_data[MDP_GAMUT_TABLE_NUM_V1_7]; 1012 uint32_t * c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7]; 1013/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1014 uint32_t tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; 1015 uint32_t * scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; 1016}; 1017struct mdp_calib_config_data { 1018/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1019 uint32_t ops; 1020 uint32_t addr; 1021 uint32_t data; 1022}; 1023/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1024struct mdp_calib_config_buffer { 1025 uint32_t ops; 1026 uint32_t size; 1027 uint32_t * buffer; 1028/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1029}; 1030struct mdp_calib_dcm_state { 1031 uint32_t ops; 1032 uint32_t dcm_state; 1033/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1034}; 1035enum { 1036 DCM_UNINIT, 1037 DCM_UNBLANK, 1038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1039 DCM_ENTER, 1040 DCM_EXIT, 1041 DCM_BLANK, 1042 DTM_ENTER, 1043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1044 DTM_EXIT, 1045}; 1046#define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000 1047#define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000 1048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1049#define MDSS_PP_SPLIT_MASK 0x30000000 1050#define MDSS_MAX_BL_BRIGHTNESS 255 1051#define AD_BL_LIN_LEN 256 1052#define AD_BL_ATT_LUT_LEN 33 1053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1054#define MDSS_AD_MODE_AUTO_BL 0x0 1055#define MDSS_AD_MODE_AUTO_STR 0x1 1056#define MDSS_AD_MODE_TARG_STR 0x3 1057#define MDSS_AD_MODE_MAN_STR 0x7 1058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1059#define MDSS_AD_MODE_CALIB 0xF 1060#define MDP_PP_AD_INIT 0x10 1061#define MDP_PP_AD_CFG 0x20 1062struct mdss_ad_init { 1063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1064 uint32_t asym_lut[33]; 1065 uint32_t color_corr_lut[33]; 1066 uint8_t i_control[2]; 1067 uint16_t black_lvl; 1068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1069 uint16_t white_lvl; 1070 uint8_t var; 1071 uint8_t limit_ampl; 1072 uint8_t i_dither; 1073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1074 uint8_t slope_max; 1075 uint8_t slope_min; 1076 uint8_t dither_ctl; 1077 uint8_t format; 1078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1079 uint8_t auto_size; 1080 uint16_t frame_w; 1081 uint16_t frame_h; 1082 uint8_t logo_v; 1083/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1084 uint8_t logo_h; 1085 uint32_t alpha; 1086 uint32_t alpha_base; 1087 uint32_t al_thresh; 1088/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1089 uint32_t bl_lin_len; 1090 uint32_t bl_att_len; 1091 uint32_t * bl_lin; 1092 uint32_t * bl_lin_inv; 1093/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1094 uint32_t * bl_att_lut; 1095}; 1096#define MDSS_AD_BL_CTRL_MODE_EN 1 1097#define MDSS_AD_BL_CTRL_MODE_DIS 0 1098/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1099struct mdss_ad_cfg { 1100 uint32_t mode; 1101 uint32_t al_calib_lut[33]; 1102 uint16_t backlight_min; 1103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1104 uint16_t backlight_max; 1105 uint16_t backlight_scale; 1106 uint16_t amb_light_min; 1107 uint16_t filter[2]; 1108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1109 uint16_t calib[4]; 1110 uint8_t strength_limit; 1111 uint8_t t_filter_recursion; 1112 uint16_t stab_itr; 1113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1114 uint32_t bl_ctrl_mode; 1115}; 1116struct mdss_ad_init_cfg { 1117 uint32_t ops; 1118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1119 union { 1120 struct mdss_ad_init init; 1121 struct mdss_ad_cfg cfg; 1122 } params; 1123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1124}; 1125struct mdss_ad_input { 1126 uint32_t mode; 1127 union { 1128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1129 uint32_t amb_light; 1130 uint32_t strength; 1131 uint32_t calib_bl; 1132 } in; 1133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1134 uint32_t output; 1135}; 1136#define MDSS_CALIB_MODE_BL 0x1 1137struct mdss_calib_cfg { 1138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1139 uint32_t ops; 1140 uint32_t calib_mask; 1141}; 1142enum { 1143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1144 mdp_op_pcc_cfg, 1145 mdp_op_csc_cfg, 1146 mdp_op_lut_cfg, 1147 mdp_op_qseed_cfg, 1148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1149 mdp_bl_scale_cfg, 1150 mdp_op_pa_cfg, 1151 mdp_op_pa_v2_cfg, 1152 mdp_op_dither_cfg, 1153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1154 mdp_op_gamut_cfg, 1155 mdp_op_calib_cfg, 1156 mdp_op_ad_cfg, 1157 mdp_op_ad_input, 1158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1159 mdp_op_calib_mode, 1160 mdp_op_calib_buffer, 1161 mdp_op_calib_dcm_state, 1162 mdp_op_max, 1163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1164}; 1165enum { 1166 WB_FORMAT_NV12, 1167 WB_FORMAT_RGB_565, 1168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1169 WB_FORMAT_RGB_888, 1170 WB_FORMAT_xRGB_8888, 1171 WB_FORMAT_ARGB_8888, 1172 WB_FORMAT_BGRA_8888, 1173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1174 WB_FORMAT_BGRX_8888, 1175 WB_FORMAT_ARGB_8888_INPUT_ALPHA 1176}; 1177struct msmfb_mdp_pp { 1178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1179 uint32_t op; 1180 union { 1181 struct mdp_pcc_cfg_data pcc_cfg_data; 1182 struct mdp_csc_cfg_data csc_cfg_data; 1183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1184 struct mdp_lut_cfg_data lut_cfg_data; 1185 struct mdp_qseed_cfg_data qseed_cfg_data; 1186 struct mdp_bl_scale_data bl_scale_data; 1187 struct mdp_pa_cfg_data pa_cfg_data; 1188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1189 struct mdp_pa_v2_cfg_data pa_v2_cfg_data; 1190 struct mdp_dither_cfg_data dither_cfg_data; 1191 struct mdp_gamut_cfg_data gamut_cfg_data; 1192 struct mdp_calib_config_data calib_cfg; 1193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1194 struct mdss_ad_init_cfg ad_init_cfg; 1195 struct mdss_calib_cfg mdss_calib_cfg; 1196 struct mdss_ad_input ad_input; 1197 struct mdp_calib_config_buffer calib_buffer; 1198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1199 struct mdp_calib_dcm_state calib_dcm; 1200 } data; 1201}; 1202#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 1203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1204enum { 1205 metadata_op_none, 1206 metadata_op_base_blend, 1207 metadata_op_frame_rate, 1208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1209 metadata_op_vic, 1210 metadata_op_wb_format, 1211 metadata_op_wb_secure, 1212 metadata_op_get_caps, 1213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1214 metadata_op_crc, 1215 metadata_op_get_ion_fd, 1216 metadata_op_max 1217}; 1218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1219struct mdp_blend_cfg { 1220 uint32_t is_premultiplied; 1221}; 1222struct mdp_mixer_cfg { 1223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1224 uint32_t writeback_format; 1225 uint32_t alpha; 1226}; 1227struct mdss_hw_caps { 1228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1229 uint32_t mdp_rev; 1230 uint8_t rgb_pipes; 1231 uint8_t vig_pipes; 1232 uint8_t dma_pipes; 1233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1234 uint8_t max_smp_cnt; 1235 uint8_t smp_per_pipe; 1236 uint32_t features; 1237}; 1238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1239struct msmfb_metadata { 1240 uint32_t op; 1241 uint32_t flags; 1242 union { 1243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1244 struct mdp_misr misr_request; 1245 struct mdp_blend_cfg blend_cfg; 1246 struct mdp_mixer_cfg mixer_cfg; 1247 uint32_t panel_frame_rate; 1248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1249 uint32_t video_info_code; 1250 struct mdss_hw_caps caps; 1251 uint8_t secure_en; 1252 int fbmem_ionfd; 1253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1254 } data; 1255}; 1256#define MDP_MAX_FENCE_FD 32 1257#define MDP_BUF_SYNC_FLAG_WAIT 1 1258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1259#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10 1260struct mdp_buf_sync { 1261 uint32_t flags; 1262 uint32_t acq_fen_fd_cnt; 1263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1264 uint32_t session_id; 1265 int * acq_fen_fd; 1266 int * rel_fen_fd; 1267 int * retire_fen_fd; 1268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1269}; 1270struct mdp_async_blit_req_list { 1271 struct mdp_buf_sync sync; 1272 uint32_t count; 1273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1274 struct mdp_blit_req req[]; 1275}; 1276#define MDP_DISPLAY_COMMIT_OVERLAY 1 1277struct mdp_display_commit { 1278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1279 uint32_t flags; 1280 uint32_t wait_for_finish; 1281 struct fb_var_screeninfo var; 1282 struct mdp_rect l_roi; 1283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1284 struct mdp_rect r_roi; 1285}; 1286struct mdp_overlay_list { 1287 uint32_t num_overlays; 1288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1289 struct mdp_overlay * * overlay_list; 1290 uint32_t flags; 1291 uint32_t processed_overlays; 1292}; 1293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1294struct mdp_page_protection { 1295 uint32_t page_protection; 1296}; 1297struct mdp_mixer_info { 1298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1299 int pndx; 1300 int pnum; 1301 int ptype; 1302 int mixer_num; 1303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1304 int z_order; 1305}; 1306#define MAX_PIPE_PER_MIXER 7 1307struct msmfb_mixer_info_req { 1308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1309 int mixer_num; 1310 int cnt; 1311 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; 1312}; 1313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1314enum { 1315 DISPLAY_SUBSYSTEM_ID, 1316 ROTATOR_SUBSYSTEM_ID, 1317}; 1318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1319enum { 1320 MDP_IOMMU_DOMAIN_CP, 1321 MDP_IOMMU_DOMAIN_NS, 1322}; 1323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1324enum { 1325 MDP_WRITEBACK_MIRROR_OFF, 1326 MDP_WRITEBACK_MIRROR_ON, 1327 MDP_WRITEBACK_MIRROR_PAUSE, 1328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1329 MDP_WRITEBACK_MIRROR_RESUME, 1330}; 1331enum mdp_color_space { 1332 MDP_CSC_ITU_R_601, 1333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1334 MDP_CSC_ITU_R_601_FR, 1335 MDP_CSC_ITU_R_709, 1336}; 1337enum { 1338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1339 mdp_igc_v1_7 = 1, 1340 mdp_igc_vmax, 1341 mdp_hist_lut_v1_7, 1342 mdp_hist_lut_vmax, 1343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1344 mdp_pgc_v1_7, 1345 mdp_pgc_vmax, 1346 mdp_dither_v1_7, 1347 mdp_dither_vmax, 1348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1349 mdp_gamut_v1_7, 1350 mdp_gamut_vmax, 1351 mdp_pa_v1_7, 1352 mdp_pa_vmax, 1353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1354 mdp_pcc_v1_7, 1355 mdp_pcc_vmax, 1356 mdp_pp_legacy, 1357}; 1358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1359enum { 1360 IGC = 1, 1361 PCC, 1362 GC, 1363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1364 PA, 1365 GAMUT, 1366 DITHER, 1367 QSEED, 1368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1369 HIST_LUT, 1370 HIST, 1371 PP_FEATURE_MAX, 1372}; 1373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1374struct mdp_pp_feature_version { 1375 uint32_t pp_feature; 1376 uint32_t version_info; 1377}; 1378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1379#endif 1380 1381