| 4e087de51ad0e7ba4a7199d3664e1d096f8dc510 |
|
10-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Reserve enough space to finish occlusion queries on Gen6.
After realizing that brw_finish_batch emitted some final PIPE_CONTROLs
to record occlusion queries, Chris noted that we probably hadn't
reserved enough space to actually emit them.
Reserving a full 60 bytes seems a bit harsh, since we only need that
much if occlusion queries are actually active. Plus, 28 bytes would be
sufficient for Gen7, and 24 for Gen4-5.
We could optimize this in the future, but it doesn't seem too critical.
NOTE: This is a candidate for stable release branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53311
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| f28a7d0e77ffbeb2a27bda132d4334b3649be3a2 |
|
30-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Work around differences between C and C++ scoping rules.
In C++, if a struct is defined inside another struct, or its name is
first seen inside a struct or function, the struct is nested inside
the namespace of the struct or function it appears in. In C, all
structs are visible from toplevel.
This patch explicitly moves the decalartions of intel_batchbuffer to
toplevel, so that it does not get nested inside a namespace when
header files are included from C++.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 434fc8bde41f07687ad8941ceba03c4b3e0e75bb |
|
27-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add extern "C" declarations to headers
These declarations are necessary to allow C++ code to call C code
without causing unresolved symbols (which would make the driver fail
to load).
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 709f50928e1d4df755ffb90ec9f33ba6c9605a32 |
|
19-Jan-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Emit Ivybridge VS workaround flushes.
I recently discovered this text in the BSpec. It seems wise to comply,
though I haven't observed it to fix anything yet.
Fixes a regression in glean/fbo since 28cfa1fa213fe.
NOTE: This is a candidate for stable release branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45221
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| da8f052560120010b7f37a300f03c0847cca3aa5 |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Return error value from intel_batchbuffer_flush().
This will let the caller do something sensible on error, if it cares.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 3faf56ffbdebef04345ebb1fa8e0d50b4beeedb2 |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add an interface for saving/restoring the batchbuffer state.
This will be used to avoid the prepare() step in the i965 driver's
state setup. Instead, we can just speculatively emit the primitive
into the batchbuffer, then check if the batch is too big, rollback and
flush, and replay the primitive.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| b095b683f8451b54cca52593dc331f82844c9c30 |
|
28-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Fix compiler warnings from the depth stall flush commit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 2a6a1c4bc291b76674f62bd989d1487f10268ef0 |
|
22-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence many "intel_batchbuffer.h:97:39: warning: comparison between signed and unsigned integer expressions"
v2: Remove the assertion in intel_batchbuffer_space:
assert((intel->batch.state_batch_offset - intel->batch.reserved_space)
>= intel->batch.used*4);
After reviewing all the places where this is called, I'm (fairly)
comfortable that this assertion was redundant. Having the assertion
adds ~20KiB to a driver build:
text data bss dec hex filename
903173 26392 1552 931117 e352d i965_dri.so
924093 26392 1552 952037 e86e5 i965_dri.so
Based on feedback from Eric Anholt.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| f6e5230b2614cc91e4c849c07781b2230878d274 |
|
18-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6: Apply documented workaround for nonpipelined state packets.
Fixes a 100% reproducible GPU hang in topogun-1.06-orc-84k.trace.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| dfada714f8db3deea2fea3583c3c166a78db1117 |
|
18-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6: Use an BO instead of writing to address 0 for PIPE_CONTROL W/A.
This was spectacularly unsafe. On my system, address 0 happens to be
the hardware status page for the render ring, and the first quadword
of that happens to contain nothing we ever look at, but I sure didn't
look forward to having to debug some day when, for example, the kernel
happened to bind the ringbuffer before binding the hwsp.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| aac120977d1ead319141d48d65c9bba626ec03b8 |
|
20-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i965: Move repeat-instruction-suppression to batchbuffer core
Move the tracking of the last emitted instructions into the core
batchbuffer routines and take advantage of the shadow batch copy to
avoid extra memory allocations and copies.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| c27285610c9f9b50d06bf0f2725da195937cb48d |
|
13-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for using the BLT ring on gen6.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 689def8bbcd2851adc89bebc84fd99bd627ff173 |
|
20-Sep-2010 |
Eric Anholt <eric@anholt.net> |
intel: For batch, use GTT mapping instead of writing to a malloc and copying.
No measurable performance difference on cairo-perf-trace, but
simplifies the code and should have cache benefit in general.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 321014156b3f7842a84d9b9915389c9f6f6486f5 |
|
11-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for streaming indirect state rather than caching objects.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 855515859ec1d94737ea91167220ba7b568c144d |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Only do batchbuffer debug if --enable-debug is used.
This saves 6.6KB on the 965 driver, and appears to speed
firefox-talos-gfx up by 1-2%. Unlike many other asserts in the
driver, when we make a mistake that would trigger one of these it
generally shows up all the time for developers, so turning it off for
release seems fine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 7392002041f6c7ac6eb788d7b154f2b44eb6f403 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Replace batch macro contents with function calls.
This manages to cut down another 3800 bytes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 342a7f23bf76e21b049cba9ab97bf4aa640a5bfd |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Move the assertions about reloc delta from the macros to the function.
Cuts another 1800 bytes from the driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 8a9d8bd52af4414e59320c68238b8929edf3ff80 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Check that the batch is mapped per BEGIN, not each OUT.
Shaves 800 bytes off the driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 06d1472ffa0648efa9374fa227894fbf0b0be054 |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Tell the kernel when we actually need fence registers on our BOs.
This improves tiled texture performance of OA on my 945 from 25.3fps
to 29.0fps, whereas untiled is 28.2fps, by avoiding stalls for fence
register changes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 70be48dff6bb68c61285641e4d976bfd53e0f00c |
|
29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Untested Sandybridge SF setup.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 8e0f40d28777f1ae599a95312788fe29a0515a0d |
|
04-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.
This should do all the things that MI_FLUSH did, but it can be pipelined
so that further rendering isn't blocked on the flush completion unless
necessary.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 60a39b6799c72430851d92f93758e2f25487a0f4 |
|
17-Oct-2009 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Disallow relocations to the byte beyond the end of the buffer
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 470ec8d42e1941c0ad773084693323f96a83e64d |
|
02-Oct-2009 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Assert that relocation offsets are within the target
This should catch the common programming error where we attempt to
emit a relocation to beyond the end of the target buffer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| bc3b8a39a7090d95942faf378e776e89c490e250 |
|
10-Dec-2008 |
Eric Anholt <eric@anholt.net> |
intel: Add batchbuffer assertions to hopefully catch future mistakes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 0cade4de4f74f6b0e86fb6622e2fc370c73fd840 |
|
20-Oct-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't keep intel->pClipRects, and instead just calculate it when needed.
This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time. Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
|
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 3628185f566e178a12b493fb89abf52b4b281f99 |
|
06-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 1e645b365900cf1c71ca5594bd6b549a1f203040 |
|
26-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into drm-gem
Conflicts:
src/mesa/drivers/dri/common/dri_bufmgr.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
|
| b52398571b7f5c537c2f5e1c87f1b8bdf3d8ea9b |
|
10-Jul-2008 |
Dave Airlie <airlied@linux.ie> |
intel: fix batch flushing problem with cliprects handling.
pointed out and debugged by stringfellow on #dri-devel
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 93f701bc3619864ac6f067d37212e96545a57e16 |
|
26-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 145523ba3acb95a9ff390430a9e0a3fa958cae1b |
|
11-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel] update GEM api. Add bo_subdata and bo_get_subdata driver hooks.
Track DRM GEM name changes.
Add driver hooks for bo_subdata and bo_get_subdata so that GEM can use pread
and pwrite.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| fda5687241f4ce5cab3bf2eac437b52d4b37dd10 |
|
08-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel] intel_batchbuffer_flush using uninit 'used' to check for buffer empty
Make sure 'used' tracks the right value through the whole function.
Also, use GLint for intel_batchbuffer_space in case we do bad things
in the future.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| ab50ddaa9173ae108833db0edb209045788efc41 |
|
07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae |
|
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.
Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them. The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 8517079cbcbbf31291b05420f3b776df712dfd47 |
|
14-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Fix driver from cliprects changes, and clean up state emission.
The fix for pageflipping with cliprects ended up causing a batch flush at
an inopportune time, which is fixed by moving it up.
Additionally, the recovery code for handling batch wraps at bad times is
replaced by just checking for the space up front, and using a no_batch_wrap
assert like on 965 to make sure that we weren't wrong about how much space that
was.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| ab2933df65628d8f1f0a3f49129442bc8d2c3a2b |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Only flush batch when changing draw buffers, not every cliprect update.
The previous code would reference freed memory on window moves.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| a04b632350e5d0e9994fc667afc59407a39da0ba |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| beddf653a914903156712aa472b5deaddb7bbaed |
|
09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Clean up cliprect handling in intel drivers.
In particular, batch buffers are no longer flushed when switching from
CLIPRECTS to NO_CLIPRECTS or vice versa, and 965 just uses DRM cliprect
handling for primitives instead of trying to sneak in its own to avoid the
DRM stuff. The disadvantage is that we will re-execute state updates per
cliprect, but the advantage is that we will be able to accumulate larger
batch buffers, which were proving to be a major overhead.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| e3a6e60040b7f6ea7965e52f8f9881ed31e0347c |
|
08-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Convert the driver to dri_bufmgr interface and enable TTM.
This is currently believed to work but be a significant performance loss.
Performance recovery should be soon to follow.
The dri_bo_fake_disable_backing_store() call was added to allow backing store
disable like bufmgr_fake.c did, which is a significant performance win (though
it's missing the no-fence-subdata part).
This commit is a squash merge of the 965-ttm branch, which had some history
I wanted to avoid pulling due to noisiness and brokenness at many points
for git-bisecting.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| a8fee3a498c8c4966d57a5273408477f3aa3ce73 |
|
15-Nov-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
i915: Catch cases where not all state is emitted for a new batchbuffer.
This could lead to incorrect rendering or even lockups.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| e886ae4c58bc98897d6901e3f30deea008bc7f8a |
|
28-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Revert "WIP 965 conversion to dri_bufmgr."
This reverts commit b2f1aa2389473ed09170713301b042661d70a48e.
Somehow I ended up with my branch's save-this-while-I-work-on-master commit
actually on master.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|
| b2f1aa2389473ed09170713301b042661d70a48e |
|
27-Sep-2007 |
Eric Anholt <eric@anholt.net> |
WIP 965 conversion to dri_bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.h
|