| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 412 EVT IntVT = ValueVTs[0]; local
414 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
416 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
417 unsigned BitWidth = IntVT.getSizeInBits();
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| H A D | SelectionDAGBuilder.cpp | 190 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); local
191 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V);
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| H A D | FastISel.cpp | 231 EVT IntVT = TLI.getPointerTy(DL); local
234 uint32_t IntBitWidth = IntVT.getSizeInBits();
244 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg,
1473 EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits());
1474 if (!TLI.isTypeLegal(IntVT))
1477 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(),
1483 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true,
1484 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT());
1488 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST,
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| H A D | SelectionDAG.cpp | 4055 EVT IntVT = VT.getScalarType(); local
4056 if (!IntVT.isInteger())
4057 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
4059 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
4064 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
4065 DAG.getConstant(Magic, dl, IntVT));
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| H A D | DAGCombiner.cpp | 7550 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), SrcEltVT.getSizeInBits()); local
7551 BV = ConstantFoldBITCASTofBUILD_VECTOR(BV, IntVT).getNode();
7552 SrcEltVT = IntVT;
9191 EVT IntVT = Int.getValueType(); local
9192 if (IntVT.isInteger() && !IntVT.isVector()) {
9198 SignMask = APInt::getSplat(IntVT.getSizeInBits(), SignMask);
9201 SignMask = APInt::getSignBit(IntVT.getSizeInBits());
9204 Int = DAG.getNode(ISD::XOR, DL0, IntVT, Int,
9205 DAG.getConstant(SignMask, DL0, IntVT));
9296 EVT IntVT = Int.getValueType(); local
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1551 MVT IntVT = MVT::i32; local
1559 IntVT = MVT::getVectorVT(MVT::i32, NElts);
1565 SDValue jq = DAG.getConstant(1, DL, IntVT);
1579 jq = DAG.getSExtOrTrunc(jq, DL, IntVT);
1584 DAG.getSExtOrTrunc(LHS, DL, IntVT) : DAG.getZExtOrTrunc(LHS, DL, IntVT);
1588 DAG.getSExtOrTrunc(RHS, DL, IntVT) : DAG.getZExtOrTrunc(RHS, DL, IntVT);
1612 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2908 MVT IntVT = Is64Bit ? MVT::i64 : MVT::i32; local
2909 RegParmTypes.push_back(IntVT);
25187 MVT IntVT = is64BitFP ? MVT::i64 : MVT::i32;
25200 IntVT = MVT::i32;
25203 SDValue OnesOrZeroesI = DAG.getBitcast(IntVT, OnesOrZeroesF);
25204 SDValue ANDed = DAG.getNode(ISD::AND, DL, IntVT, OnesOrZeroesI,
25205 DAG.getConstant(1, DL, IntVT));
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7507 EVT IntVT = BV->getValueType(0); local
7512 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst);
7513 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT,
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5831 EVT IntVT = Op.getValueType(); local
5838 SDVTList VTs = DAG.getVTList(IntVT);
|