Searched defs:PhysReg (Results 1 - 19 of 19) sorted by relevance

/external/llvm/lib/CodeGen/
H A DLiveRangeCalc.h113 /// PhysReg, when set, is used to verify live-in lists on basic blocks.
115 SlotIndex Kill, unsigned PhysReg);
171 /// PhysReg, when set, is used to verify live-in lists on basic blocks.
172 void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg = 0);
183 void extendToUses(LiveRange &LR, unsigned PhysReg) { argument
184 extendToUses(LR, PhysReg, ~0u);
H A DLiveRegMatrix.cpp75 unsigned PhysReg, Callable Func) {
77 for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
89 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
97 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) { argument
99 << " to " << PrintReg(PhysReg, TRI) << ':');
101 VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
103 foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
115 unsigned PhysReg = VRM->getPhys(VirtReg.reg); local
117 << " from " << PrintReg(PhysReg, TRI) << ':');
120 foreachUnit(TRI, VirtReg, PhysReg, [
74 foreachUnit(const TargetRegisterInfo *TRI, LiveInterval &VRegInterval, unsigned PhysReg, Callable Func) argument
139 checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg) argument
157 checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg) argument
179 checkInterference(LiveInterval &VirtReg, unsigned PhysReg) argument
[all...]
H A DRegAllocBasic.cpp111 bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
163 // Spill or split all live virtual registers currently unified under PhysReg
166 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, argument
173 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
185 DEBUG(dbgs() << "spilling " << TRI->getName(PhysReg) <<
189 // Spill each interfering vreg allocated to PhysReg or an alias.
227 while (unsigned PhysReg = Order.next()) {
228 // Check for interference in PhysReg
229 switch (Matrix->checkInterference(VirtReg, PhysReg)) {
231 // PhysReg i
[all...]
H A DRegisterClassInfo.cpp99 unsigned PhysReg = RawOrder[i]; local
101 if (Reserved.test(PhysReg))
103 unsigned Cost = TRI->getCostPerUse(PhysReg);
106 if (CSRNum[PhysReg])
107 // PhysReg aliases a CSR, save it for later.
108 CSRAlias.push_back(PhysReg);
112 RCI.Order[N++] = PhysReg;
121 unsigned PhysReg = CSRAlias[i]; local
122 unsigned Cost = TRI->getCostPerUse(PhysReg);
125 RCI.Order[N++] = PhysReg;
[all...]
H A DRegisterCoalescer.h66 CoalescerPair(unsigned VirtReg, unsigned PhysReg, argument
68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
H A DInterferenceCache.cpp56 InterferenceCache::Entry *InterferenceCache::get(unsigned PhysReg) { argument
57 unsigned E = PhysRegEntries[PhysReg];
58 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) {
74 Entries[E].reset(PhysReg, LIUArray, TRI, MF);
75 PhysRegEntries[PhysReg] = E;
89 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i)
100 PhysReg = physReg;
106 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
115 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i) {
187 if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) {
[all...]
H A DInterferenceCache.h39 /// of PhysReg in all basic blocks.
41 /// PhysReg - The register currently represented.
42 unsigned PhysReg; member in class:llvm::InterferenceCache::Entry
63 /// RegUnitInfo - Information tracked about each RegUnit in PhysReg.
86 /// Info for each RegUnit in PhysReg. It is very rare ofr a PHysReg to have
97 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {}
101 PhysReg = 0;
107 unsigned getPhysReg() const { return PhysReg; }
148 // get - Get a valid entry for PhysReg.
149 Entry *get(unsigned PhysReg);
202 setPhysReg(InterferenceCache &Cache, unsigned PhysReg) argument
[all...]
H A DLiveRangeCalc.cpp223 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) { argument
239 if (findReachingDefs(LR, *UseMBB, Use, PhysReg))
259 SlotIndex Use, unsigned PhysReg) {
276 errs() << "Use of " << PrintReg(PhysReg)
284 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
285 !MBB->isLiveIn(PhysReg)) {
287 errs() << "The register " << PrintReg(PhysReg)
258 findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use, unsigned PhysReg) argument
H A DShrinkWrap.cpp232 unsigned PhysReg = MO.getReg(); local
233 if (!PhysReg)
235 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
237 UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
H A DVirtRegMap.cpp170 void addLiveInsForSubRanges(const LiveInterval &LI, unsigned PhysReg) const;
242 unsigned PhysReg) const {
280 MBB->addLiveIn(PhysReg, LaneMask);
295 // assigned PhysReg must be marked as live-in to those blocks.
296 unsigned PhysReg = VRM->getPhys(VirtReg); local
297 assert(PhysReg != VirtRegMap::NO_PHYS_REG && "Unmapped virtual register.");
300 addLiveInsForSubRanges(LI, PhysReg);
310 MBB->addLiveIn(PhysReg);
316 // Sort and unique MBB LiveIns as we've not checked if SubReg/PhysReg were in
372 unsigned PhysReg local
[all...]
H A DMachineRegisterInfo.cpp417 bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg, argument
419 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg));
423 for (MCRegAliasIterator AI(PhysReg, getTargetRegisterInfo(), true);
474 bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const {
475 if (UsedPhysRegMask.test(PhysReg))
478 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) {
488 bool MachineRegisterInfo::isPhysRegUsed(unsigned PhysReg) const {
489 if (UsedPhysRegMask.test(PhysReg))
492 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid();
H A DRegAllocFast.cpp73 unsigned PhysReg; // Currently held here. member in struct:__anon12260::RAFast::LiveReg
78 : LastUse(nullptr), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false){}
124 void markRegUsedInInstr(unsigned PhysReg) { argument
125 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
130 bool isRegUsedInInstr(unsigned PhysReg) const {
131 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
177 void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState);
178 unsigned calcSpillCost(unsigned PhysReg) const;
179 void assignVirtToPhysReg(LiveReg&, unsigned PhysReg);
186 LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysReg);
345 unsigned PhysReg = MO.getReg(); local
407 definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState) argument
498 assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) argument
507 assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) argument
547 unsigned PhysReg = *I; local
674 setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) argument
748 unsigned PhysReg = LRI->PhysReg; local
771 unsigned PhysReg = LRI->PhysReg; local
981 unsigned PhysReg = LRI->PhysReg; local
1032 unsigned PhysReg = LRI->PhysReg; local
[all...]
H A DMachineBasicBlock.cpp290 OS << ' ' << PrintReg(LI.PhysReg, TRI);
338 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
350 [Reg] (const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
357 return LI0.PhysReg < LI1.PhysReg;
364 unsigned PhysReg = I->PhysReg; local
366 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
368 Out->PhysReg
375 addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC) argument
[all...]
H A DRegAllocGreedy.cpp261 unsigned PhysReg; member in struct:__anon12262::RAGreedy::GlobalSplitCandidate
266 // Interference for PhysReg.
274 PhysReg = Reg;
294 /// Candidate info for each PhysReg in AllocationOrder.
355 unsigned canReassign(LiveInterval &VirtReg, unsigned PhysReg);
360 bool mayRecolorAllInterferences(unsigned PhysReg, LiveInterval &VirtReg,
382 unsigned PhysReg, unsigned &CostPerUseLimit,
408 /// In case of a physical register Reg == PhysReg.
409 unsigned PhysReg; member in struct:__anon12262::RAGreedy::HintInfo
410 HintInfo(BlockFrequency Freq, unsigned Reg, unsigned PhysReg) argument
620 unsigned PhysReg; local
662 unsigned PhysReg; local
723 canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg, bool IsHint, EvictionCost &MaxCost) argument
805 evictInterference(LiveInterval &VirtReg, unsigned PhysReg, SmallVectorImpl<unsigned> &NewVRegs) argument
1637 calcGapWeights(unsigned PhysReg, SmallVectorImpl<float> &GapWeight) argument
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp113 unsigned &PhysReg, int &Cost) {
124 PhysReg = Reg;
129 PhysReg = Reg;
132 if (PhysReg != 0) {
466 unsigned PhysReg = 0;
469 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost);
470 assert((PhysReg == 0 || !isChain) &&
478 PhysReg = 0;
487 : SDep(OpSU, SDep::Data, PhysReg);
110 CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, unsigned &PhysReg, int &Cost) argument
H A DFunctionLoweringInfo.cpp150 std::pair<unsigned, const TargetRegisterClass *> PhysReg = local
153 if (PhysReg.first == SP)
/external/llvm/include/llvm/CodeGen/
H A DMachineOperand.h471 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
475 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { argument
477 assert(PhysReg < (1u << 30) && "Not a physical register");
478 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
481 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
482 bool clobbersPhysReg(unsigned PhysReg) const {
483 return clobbersPhysReg(getRegMask(), PhysReg);
H A DMachineBasicBlock.h76 MCPhysReg PhysReg; member in struct:llvm::MachineBasicBlock::RegisterMaskPair
79 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask) argument
80 : PhysReg(PhysReg), LaneMask(LaneMask) {}
345 void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask = ~0u) { argument
346 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
357 /// Add PhysReg as live in to this block, and ensure that there is a copy of
358 /// PhysReg to a virtual register of class RC. Return the virtual register
359 /// that is a copy of the live in PhysReg.
360 unsigned addLiveIn(MCPhysReg PhysReg, cons
[all...]
/external/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp632 struct PhysRegOp PhysReg; member in union:__anon12657::MipsOperand::__anon12658
1109 return PhysReg.Num;
1357 OS << "PhysReg<" << PhysReg.Num << ">";

Completed in 2123 milliseconds