/art/runtime/interpreter/mterp/x86/ |
H A D | op_move.S | 6 shrl $$4, rINST # rINST <- B
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H A D | op_ushr_long.S | 20 shrl %cl, rIBASE
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H A D | op_div_long_2addr.S | 9 shrl $$4, %eax # eax <- B
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H A D | op_ushr_long_2addr.S | 17 shrl %cl, rIBASE
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/art/runtime/interpreter/mterp/x86_64/ |
H A D | op_move.S | 6 shrl $$4, rINST # rINST <- B
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/art/compiler/utils/x86/ |
H A D | assembler_x86.h | 553 void shrl(Register reg, const Immediate& imm); 554 void shrl(Register operand, Register shifter); 555 void shrl(const Address& address, const Immediate& imm); 556 void shrl(const Address& address, Register shifter);
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H A D | assembler_x86.cc | 1405 void X86Assembler::shrl(Register reg, const Immediate& imm) { function in class:art::x86::X86Assembler 1410 void X86Assembler::shrl(Register operand, Register shifter) { function in class:art::x86::X86Assembler 1415 void X86Assembler::shrl(const Address& address, const Immediate& imm) { function in class:art::x86::X86Assembler 1420 void X86Assembler::shrl(const Address& address, Register shifter) { function in class:art::x86::X86Assembler
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/art/runtime/arch/x86/ |
H A D | quick_entrypoints_x86.S | 861 shrl LITERAL(ROSALLOC_BRACKET_QUANTUM_SIZE_SHIFT), %edi // Calculate the rosalloc bracket index 1202 shrl LITERAL(7), %eax 1243 shrl LITERAL(7), %eax
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.h | 593 void shrl(CpuRegister reg, const Immediate& imm); 594 void shrl(CpuRegister operand, CpuRegister shifter);
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H A D | assembler_x86_64_test.cc | 416 assembler->shrl(*reg, shifter); 417 str << "shrl %cl, %" << assembler_test->GetSecondaryRegisterName(*reg) << "\n"; 424 DriverFn(&shrl_fn, "shrl"); 428 DriverStr(Repeatri(&x86_64::X86_64Assembler::shrl, 1U, "shrl ${imm}, %{reg}"), "shrli");
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H A D | assembler_x86_64.cc | 1845 void X86_64Assembler::shrl(CpuRegister reg, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler 1855 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { function in class:art::x86_64::X86_64Assembler
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/art/runtime/arch/x86_64/ |
H A D | quick_entrypoints_x86_64.S | 1201 shrl LITERAL(7), %edi 1202 // shrl LITERAL(7), %rdi 1242 shrl LITERAL(7), %edi 1243 // shrl LITERAL(7), %rdi
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/art/runtime/interpreter/mterp/out/ |
H A D | mterp_x86_64.S | 400 shrl $4, rINST # rINST <- B 485 shrl $4, rINST # rINST <- B 3381 shrl $4, rINST # rINST <- B 3982 shrl %cl, %eax # ex: addl %ecx,%eax 3986 shrl %cl, %eax # ex: addl %ecx,%eax 4692 shrl %cl, %eax # ex: sarl %cl, %eax 4696 shrl %cl, %eax # ex: sarl %cl, %eax 5620 shrl %cl, %eax # ex: addl %ecx,%eax
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H A D | mterp_x86.S | 420 shrl $4, rINST # rINST <- B 507 shrl $4, rINST # rINST <- B 3484 shrl $4, rINST # rINST <- B 4203 shrl %cl, %eax # ex: addl %ecx,%eax 4503 shrl %cl, rIBASE 4934 shrl %cl, %eax # ex: sarl %cl, %eax 5030 shrl $4, %eax # eax <- B 5060 shrl $4, %eax # eax <- B 5221 shrl %cl, rIBASE 5878 shrl [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_x86.cc | 3343 __ shrl(edx, Immediate(31)); 3716 __ shrl(first_reg, second_reg); 3729 __ shrl(first_reg, imm); 3852 __ shrl(low, Immediate(shift - 32)); 3857 __ shrl(high, Immediate(shift)); 3864 __ shrl(loc.AsRegisterPairHigh<Register>(), shifter); 4529 __ shrl(temp, Immediate(gc::accounting::CardTable::kCardShift)); 6912 __ shrl(temp_reg, Immediate(LockWord::kReadBarrierStateShift));
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H A D | intrinsics_x86.cc | 1350 __ shrl(ecx, Immediate(1)); 2297 __ shrl(reg, imm_shift);
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H A D | intrinsics_x86_64.cc | 1452 __ shrl(rcx, Immediate(2)); 2313 __ shrl(reg, imm_shift);
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H A D | code_generator_x86_64.cc | 3421 __ shrl(edx, Immediate(31)); 3773 __ shrl(first_reg, second_reg); 3782 __ shrl(first_reg, imm); 6376 __ shrl(temp_reg, Immediate(LockWord::kReadBarrierStateShift));
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